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Change subject: util/smmstoretool: explain what happens when no store is found
......................................................................
Patch Set 3: Code-Review+2
(1 comment)
File util/smmstoretool/storage.c:
https://review.coreboot.org/c/coreboot/+/82692/comment/9eebc377_a2eb5c04?us… :
PS2, Line 53: fprintf(stderr,
: "Variable store has not been found in the binary and will "
: "be initialized now.\nIt is expected if release binary is "
: "used, as variable store normally is initialized on the "
: "first boot of the platform.\n");
> I'd format the message differently (also somewhat updated it, e.g. "binary" was too generic): […]
Done
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Change subject: cpu/x86/mp_init: Add code to restart APs
......................................................................
Patch Set 2:
(1 comment)
File src/include/cpu/x86/mp.h:
https://review.coreboot.org/c/coreboot/+/82696/comment/157646f9_aa3dc859?us… :
PS2, Line 140: ACM ,
Please remove the space.
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Change subject: security/intel/txt: Restart APs after successful SCHECK
......................................................................
Patch Set 1:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/82697/comment/de737ef1_bf50ca20?us… :
PS1, Line 8:
How can this be tested?
File src/security/intel/txt/ramstage.c:
https://review.coreboot.org/c/coreboot/+/82697/comment/6990b6a6_f519fc7f?us… :
PS1, Line 184: restart_aps();
Log something, because it’ll take some time?
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Change subject: cpu/x86/mp_init: Add code to restart APs
......................................................................
Patch Set 1:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/82696/comment/41e6374f_ea91979c?us… :
PS1, Line 8:
Please elaborate, why this is needed.
File src/cpu/x86/mp_init.c:
https://review.coreboot.org/c/coreboot/+/82696/comment/98b0d0c0_80a9a3bf?us… :
PS1, Line 1209: /* Make sure SIPI data hits RAM so the APs that come up will see
: * the startup code even if the caches are disabled. */
Please use the recommended multi-line commenting styles [1].
[1]: https://doc.coreboot.org/contributing/coding_style.html#commentinghttps://review.coreboot.org/c/coreboot/+/82696/comment/5fae32c8_8d43e4ed?us… :
PS1, Line 1214: mdelay(1000);
That’s quite a long delay. Please add a comment, what demands that.
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Attention is currently required from: Michał Żygowski.
Hello Michał Żygowski,
I'd like you to do a code review.
Please visit
https://review.coreboot.org/c/coreboot/+/82696?usp=email
to review the following change.
Change subject: cpu/x86/mp_init: Add code to restart APs
......................................................................
cpu/x86/mp_init: Add code to restart APs
Change-Id: Ief2a7629d3075de29b363d05330e3a76cef48971
Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com>
---
M src/cpu/x86/mp_init.c
M src/include/cpu/x86/mp.h
2 files changed, 50 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/82696/1
diff --git a/src/cpu/x86/mp_init.c b/src/cpu/x86/mp_init.c
index bb51697..750a669 100644
--- a/src/cpu/x86/mp_init.c
+++ b/src/cpu/x86/mp_init.c
@@ -1177,3 +1177,46 @@
return ret;
}
+
+
+/* AP restart code */
+
+static struct mp_flight_record ap_restart_steps[] = {
+ /* Wait for APs to finish then optionally start looking for work. */
+ MP_FR_BLOCK_APS(ap_wait_for_instruction, NULL),
+};
+
+enum cb_err restart_aps(void)
+{
+ struct mp_params mp_params;
+ atomic_t *ap_count;
+
+ if (!CONFIG(PARALLEL_MP_AP_WORK))
+ return CB_ERR_NOT_IMPLEMENTED;
+
+ mp_params.num_cpus = mp_state.cpu_count;
+ mp_params.num_records = ARRAY_SIZE(ap_restart_steps);
+ mp_params.flight_plan = &ap_restart_steps[0];
+
+ mp_info.num_records = ARRAY_SIZE(ap_restart_steps);
+ mp_info.records = &ap_restart_steps[0];
+
+ /* Load the SIPI vector. */
+ ap_count = load_sipi_vector(&mp_params);
+ if (ap_count == NULL)
+ return CB_ERR;
+
+ /* Make sure SIPI data hits RAM so the APs that come up will see
+ * the startup code even if the caches are disabled. */
+ wbinvd();
+
+ if (start_aps(NULL, global_num_aps, ap_count) != CB_SUCCESS) {
+ mdelay(1000);
+ printk(BIOS_DEBUG, "%d/%d eventually checked in?\n",
+ atomic_read(ap_count), global_num_aps);
+ return CB_ERR;
+ }
+
+ /* Walk the flight plan for the BSP. */
+ return bsp_do_flight_plan(&mp_params);
+}
diff --git a/src/include/cpu/x86/mp.h b/src/include/cpu/x86/mp.h
index dd86dce..f80d309 100644
--- a/src/include/cpu/x86/mp.h
+++ b/src/include/cpu/x86/mp.h
@@ -136,6 +136,13 @@
enum cb_err mp_park_aps(void);
/*
+ * Restart APs after they have been parked. Used by Intel TXT, which requires
+ * parking APs before running ACM , to restart APs and let coreboot program
+ * MTRRs on APs. For use only after mp_init.
+ */
+enum cb_err restart_aps(void);
+
+/*
* SMM helpers to use with initializing CPUs.
*/
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Hello Michał Żygowski,
I'd like you to do a code review.
Please visit
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to review the following change.
Change subject: security/intel/txt: Handle TPM properly when vboot enabled
......................................................................
security/intel/txt: Handle TPM properly when vboot enabled
Change-Id: I19dc3d910c23fcfd8732465c488f47dd86a96781
Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com>
---
M src/security/intel/txt/Kconfig
M src/security/tpm/Kconfig
2 files changed, 2 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/82695/1
diff --git a/src/security/intel/txt/Kconfig b/src/security/intel/txt/Kconfig
index 637a6a7..69ba95a 100644
--- a/src/security/intel/txt/Kconfig
+++ b/src/security/intel/txt/Kconfig
@@ -16,6 +16,7 @@
select ENABLE_VMX if CPU_INTEL_COMMON
select AP_IN_SIPI_WAIT
select TPM_MEASURED_BOOT_INIT_BOOTBLOCK if TPM_MEASURED_BOOT
+ select TPM_STARTUP_IGNORE_POSTINIT
depends on TPM
depends on PLATFORM_HAS_DRAM_CLEAR
depends on (SOC_INTEL_COMMON_BLOCK_SA || HAVE_CF9_RESET)
diff --git a/src/security/tpm/Kconfig b/src/security/tpm/Kconfig
index ea13fa4..22e37ff 100644
--- a/src/security/tpm/Kconfig
+++ b/src/security/tpm/Kconfig
@@ -131,7 +131,7 @@
config TPM_MEASURED_BOOT_INIT_BOOTBLOCK
bool
- depends on TPM_MEASURED_BOOT && !VBOOT
+ depends on TPM_MEASURED_BOOT
help
Initialize TPM inside the bootblock instead of ramstage. This is
useful with some form of hardware assisted root of trust
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Change subject: security/intel/txt: Add missing information and improve logging
......................................................................
Set Ready For Review
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Change subject: payloads/iPXE: Hook up TRUST_CMD switch
......................................................................
payloads/iPXE: Hook up TRUST_CMD switch
Change-Id: Ia4f5d4140eeb8625c5ee41e38f048658db28a199
Signed-off-by: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com>
---
M payloads/external/Makefile.mk
M payloads/external/iPXE/Kconfig
M payloads/external/iPXE/Makefile
3 files changed, 13 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/79684/12
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