coreboot-gerrit May 2024

coreboot-gerrit@coreboot.org

1 participants
3266 discussions

[S] Change in coreboot[main]: mb/qemu-{i440fx,q35}: reduce default ROM size to 8M
by Krystian Hebel (Code Review) 29 May '24

29 May '24

Attention is currently required from: Maciej Pijanowski, Michał Kopeć, Michał Żygowski, Patrick Rudolph, Sergii Dmytruk. Krystian Hebel has posted comments on this change by Krystian Hebel. ( https://review.coreboot.org/c/coreboot/+/82639?usp=email ) Change subject: mb/qemu-{i440fx,q35}: reduce default ROM size to 8M ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/82639/comment/66b9a081_df9495a6?us… : PS1, Line 9: QEMU doesn't allow to use bigger images with '-drive if=pflash', which > What is the effect here? Do we know why it is not supported? No idea why, I guess this was a design decision made by QEMU. I added the error message produced to the commit message. -- To view, visit https://review.coreboot.org/c/coreboot/+/82639?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If36cb754a8e75e23bce49ff568dd88e5db279bb8 Gerrit-Change-Number: 82639 Gerrit-PatchSet: 2 Gerrit-Owner: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-Attention: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Comment-Date: Wed, 29 May 2024 17:55:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com>

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[S] Change in coreboot[main]: vc/edk2-stable202302: Add config guards to support FSP 2.4
by Appukuttan V K (Code Review) 29 May '24

29 May '24

Attention is currently required from: Appukuttan V K, Paul Menzel, Ronak Kanabar. Hello Ronak Kanabar, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/82425?usp=email to look at the new patch set (#20). Change subject: vc/edk2-stable202302: Add config guards to support FSP 2.4 ...................................................................... vc/edk2-stable202302: Add config guards to support FSP 2.4 This commit updates the FspApi.h header file to conditionally include different structures based on the platform architecture or FSP specification version. This changes are done to ensure that this header file can be used with both x86_32 and x86_64 architectures and also with different FSP specification versions. The following modifications are made: - Guard x86_32 architecture specific structures under PLATFORM_USES_FSP2_X86_32 config. - Guard FSP 2.4 specific structures under PLATFORM_USES_FSP2_4 config. - Introduce a new field `EnableMultiPhaseSiliconInit` in the FSPS_ARCH2_UPD structure for configurations that use FSP 2.4. BUG=b:343428206 TEST=Verified x86_32 and x86_64 builds on Meteor Lake board (Rex) Change-Id: Idc849de73723036323f81dfd055730f6669cd52e Signed-off-by: Appukuttan V K <appukuttan.vk(a)intel.com> --- M src/vendorcode/intel/edk2/edk2-stable202302/IntelFsp2Pkg/Include/FspEas/FspApi.h 1 file changed, 18 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/82425/20 -- To view, visit https://review.coreboot.org/c/coreboot/+/82425?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idc849de73723036323f81dfd055730f6669cd52e Gerrit-Change-Number: 82425 Gerrit-PatchSet: 20 Gerrit-Owner: Appukuttan V K <appukuttan.vk(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Appukuttan V K <appukuttan.vk(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com>

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[M] Change in coreboot[main]: acpi/acpi.c: fix XSDT handling on QEMU
by Krystian Hebel (Code Review) 29 May '24

29 May '24

Attention is currently required from: Cliff Huang, Lance Zhao, Tim Wawrzynczak. Krystian Hebel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/82698?usp=email ) Change subject: acpi/acpi.c: fix XSDT handling on QEMU ...................................................................... acpi/acpi.c: fix XSDT handling on QEMU c2830c9 "acpi.c: Add XSDT on QEMU" added a code that copied RSDT to XSDT since QEMU doesn't generate the latter. However, this new code didn't move 'current' pointer forward if XSDT pointer was already non-zero, such as after warm reset. As a result, SSDT was written in place of XSDT, which resulted in panic in edk2 after a reboot. This change covers SSDT generation with the same check for existing XSDT address as is used for tables generated by QEMU. Change-Id: I7f38467b7de3f35fc3ec3854a840de8345cd0fe5 Signed-off-by: Krystian Hebel <krystian.hebel(a)3mdeb.com> --- M src/acpi/acpi.c 1 file changed, 29 insertions(+), 29 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/82698/1 diff --git a/src/acpi/acpi.c b/src/acpi/acpi.c index 39eadc3..61ce5d9 100644 --- a/src/acpi/acpi.c +++ b/src/acpi/acpi.c @@ -1506,37 +1506,37 @@ */ for (int i = 0; existing_rsdt->entry[i]; i++) acpi_add_table(rsdp, (void *)(uintptr_t)existing_rsdt->entry[i]); + + /* Add BOOT0000 for Linux google firmware driver */ + printk(BIOS_DEBUG, "ACPI: * SSDT\n"); + ssdt = (acpi_header_t *)current; + current += sizeof(acpi_header_t); + + memset((void *)ssdt, 0, sizeof(acpi_header_t)); + + memcpy(&ssdt->signature, "SSDT", 4); + ssdt->revision = get_acpi_table_revision(SSDT); + memcpy(&ssdt->oem_id, OEM_ID, 6); + memcpy(&ssdt->oem_table_id, oem_table_id, 8); + ssdt->oem_revision = 42; + memcpy(&ssdt->asl_compiler_id, ASLC, 4); + ssdt->asl_compiler_revision = asl_revision; + ssdt->length = sizeof(acpi_header_t); + + acpigen_set_current((char *)current); + + /* Write object to declare coreboot tables */ + acpi_ssdt_write_cbtable(); + + /* (Re)calculate length and checksum. */ + ssdt->length = current - (unsigned long)ssdt; + ssdt->checksum = acpi_checksum((void *)ssdt, ssdt->length); + + acpi_create_ssdt_generator(ssdt, NULL); + + acpi_add_table(rsdp, ssdt); } - /* Add BOOT0000 for Linux google firmware driver */ - printk(BIOS_DEBUG, "ACPI: * SSDT\n"); - ssdt = (acpi_header_t *)current; - current += sizeof(acpi_header_t); - - memset((void *)ssdt, 0, sizeof(acpi_header_t)); - - memcpy(&ssdt->signature, "SSDT", 4); - ssdt->revision = get_acpi_table_revision(SSDT); - memcpy(&ssdt->oem_id, OEM_ID, 6); - memcpy(&ssdt->oem_table_id, oem_table_id, 8); - ssdt->oem_revision = 42; - memcpy(&ssdt->asl_compiler_id, ASLC, 4); - ssdt->asl_compiler_revision = asl_revision; - ssdt->length = sizeof(acpi_header_t); - - acpigen_set_current((char *)current); - - /* Write object to declare coreboot tables */ - acpi_ssdt_write_cbtable(); - - /* (Re)calculate length and checksum. */ - ssdt->length = current - (unsigned long)ssdt; - ssdt->checksum = acpi_checksum((void *)ssdt, ssdt->length); - - acpi_create_ssdt_generator(ssdt, NULL); - - acpi_add_table(rsdp, ssdt); - return fw; } -- To view, visit https://review.coreboot.org/c/coreboot/+/82698?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7f38467b7de3f35fc3ec3854a840de8345cd0fe5 Gerrit-Change-Number: 82698 Gerrit-PatchSet: 1 Gerrit-Owner: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com>

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[S] Change in coreboot[main]: mb/qemu-{i440fx,q35}: reduce default ROM size to 8M
by Krystian Hebel (Code Review) 29 May '24

29 May '24

Attention is currently required from: Krystian Hebel, Michał Kopeć, Michał Żygowski, Patrick Rudolph, Sergii Dmytruk. Hello Michał Kopeć, Michał Żygowski, Patrick Rudolph, Sergii Dmytruk, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/82639?usp=email to look at the new patch set (#2). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: mb/qemu-{i440fx,q35}: reduce default ROM size to 8M ...................................................................... mb/qemu-{i440fx,q35}: reduce default ROM size to 8M QEMU doesn't allow to use bigger images with '-drive if=pflash', which is required to make use of writable flash introduced in CB:82555. This changes both default size in Kconfig as well as FMAP layouts. Error thrown by QEMU when trying to use too big ROM: qemu-system-x86_64: combined size of system firmware exceeds 8388608 bytes Change-Id: If36cb754a8e75e23bce49ff568dd88e5db279bb8 Signed-off-by: Krystian Hebel <krystian.hebel(a)3mdeb.com> --- M src/mainboard/emulation/qemu-i440fx/Kconfig R src/mainboard/emulation/qemu-i440fx/vboot-rwa-8M.fmd M src/mainboard/emulation/qemu-q35/Kconfig D src/mainboard/emulation/qemu-q35/vboot-rwa-16M.fmd C src/mainboard/emulation/qemu-q35/vboot-rwa-8M.fmd R src/mainboard/emulation/qemu-q35/vboot-rwab-8M.fmd 6 files changed, 15 insertions(+), 34 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/82639/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/82639?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If36cb754a8e75e23bce49ff568dd88e5db279bb8 Gerrit-Change-Number: 82639 Gerrit-PatchSet: 2 Gerrit-Owner: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Attention: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com>

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[XL] Change in coreboot[main]: vc/intel/fsp/mtl: Add x86_64 FSP headers
by Subrata Banik (Code Review) 29 May '24

29 May '24

Attention is currently required from: Appukuttan V K, Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Kapil Porwal, Tarun. Subrata Banik has posted comments on this change by Appukuttan V K. ( https://review.coreboot.org/c/coreboot/+/82473?usp=email ) Change subject: vc/intel/fsp/mtl: Add x86_64 FSP headers ...................................................................... Patch Set 9: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/82473/comment/61713dc9_944c3e1d?us… : PS6, Line 9: header files what is the FSP version ? https://review.coreboot.org/c/coreboot/+/82473/comment/949d875a_11c8df8f?us… : PS6, Line 11: when FSP2.4 is in use. please write the motivation behind the fact that the 32-bit FSP will support FSP2.3 spec while 64-bit FSP would migrate to FSP2.4 spec -- To view, visit https://review.coreboot.org/c/coreboot/+/82473?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib41b57e794311db729ac65a968f562aa127e86c3 Gerrit-Change-Number: 82473 Gerrit-PatchSet: 9 Gerrit-Owner: Appukuttan V K <appukuttan.vk(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Appukuttan V K <appukuttan.vk(a)intel.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Wed, 29 May 2024 17:17:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: vc/intel/fsp/mtl: Organize FSP headers into x86_32 directory
by Subrata Banik (Code Review) 29 May '24

29 May '24

Attention is currently required from: Appukuttan V K. Subrata Banik has posted comments on this change by Appukuttan V K. ( https://review.coreboot.org/c/coreboot/+/82424?usp=email ) Change subject: vc/intel/fsp/mtl: Organize FSP headers into x86_32 directory ...................................................................... Patch Set 14: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/82424?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id30186a8b1b5a9082f498e18a3378f5e9907b668 Gerrit-Change-Number: 82424 Gerrit-PatchSet: 14 Gerrit-Owner: Appukuttan V K <appukuttan.vk(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Appukuttan V K <appukuttan.vk(a)intel.com> Gerrit-Comment-Date: Wed, 29 May 2024 17:16:34 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: soc/intel/meteorlake: Adjust FSP parameters for FSP2.4 compatibility
by Subrata Banik (Code Review) 29 May '24

29 May '24

Attention is currently required from: Appukuttan V K. Subrata Banik has posted comments on this change by Appukuttan V K. ( https://review.coreboot.org/c/coreboot/+/82177?usp=email ) Change subject: soc/intel/meteorlake: Adjust FSP parameters for FSP2.4 compatibility ...................................................................... Patch Set 19: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/82177?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ide220f60184135a6488f4472f69a471e2b383e2a Gerrit-Change-Number: 82177 Gerrit-PatchSet: 19 Gerrit-Owner: Appukuttan V K <appukuttan.vk(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Appukuttan V K <appukuttan.vk(a)intel.com> Gerrit-Comment-Date: Wed, 29 May 2024 16:59:47 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[master]: Makefile: Add targets to add and remove symlinks
by Felix Held (Code Review) 29 May '24

29 May '24

Attention is currently required from: Christian Walter. Felix Held has posted comments on this change by Christian Walter. ( https://review.coreboot.org/c/coreboot/+/65093?usp=email ) Change subject: Makefile: Add targets to add and remove symlinks ...................................................................... Patch Set 17: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/65093/comment/31eb1dc9_e5e4d6b7?us… : PS5, Line 11: to e.g. develop a new SoC completely seperated from the tree. > Done using site-local to keep not yet public soc and mainboard support (possibly using submodule) sounds like a significantly better idea than using symlinks which i'd consider a rather bad and probably avoidable practice. since it's probably actively used, it probably won't be easy to get rid of this questionable mechanism again :( -- To view, visit https://review.coreboot.org/c/coreboot/+/65093?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3fa119675ecca1626d70375a61e8a71abec6a53b Gerrit-Change-Number: 65093 Gerrit-PatchSet: 17 Gerrit-Owner: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: Ron Minnich <rminnich(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-CC: Martin Roth <martinroth(a)google.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Comment-Date: Wed, 29 May 2024 16:56:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Martin Roth <martinroth(a)google.com> Comment-In-Reply-To: Marc Jones <marc(a)marcjonesconsulting.com> Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Martin L Roth <gaumless(a)gmail.com> Comment-In-Reply-To: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Comment-In-Reply-To: Christian Walter <christian.walter(a)9elements.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz>

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[S] Change in coreboot[main]: soc/intel/meteorlake: Adjust FSP parameters for FSP2.4 compatibility
by Appukuttan V K (Code Review) 29 May '24

29 May '24

Appukuttan V K has posted comments on this change by Appukuttan V K. ( https://review.coreboot.org/c/coreboot/+/82177?usp=email ) Change subject: soc/intel/meteorlake: Adjust FSP parameters for FSP2.4 compatibility ...................................................................... Patch Set 19: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/82177/comment/46bd1efa_f22e8c35?us… : PS18, Line 10: the FSP2.4 : specification > Maybe something like: […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/82177?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ide220f60184135a6488f4472f69a471e2b383e2a Gerrit-Change-Number: 82177 Gerrit-PatchSet: 19 Gerrit-Owner: Appukuttan V K <appukuttan.vk(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 29 May 2024 16:54:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>

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[S] Change in coreboot[main]: soc/intel/meteorlake: Adjust FSP parameters for FSP2.4 compatibility
by Appukuttan V K (Code Review) 29 May '24

29 May '24

Attention is currently required from: Appukuttan V K, Subrata Banik. Hello Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Kapil Porwal, Paul Menzel, Ronak Kanabar, Subrata Banik, Tarun, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/82177?usp=email to look at the new patch set (#19). Change subject: soc/intel/meteorlake: Adjust FSP parameters for FSP2.4 compatibility ...................................................................... soc/intel/meteorlake: Adjust FSP parameters for FSP2.4 compatibility This commit updates the type definitions for FSP parameters in the Meteor Lake platform to ensure compatibility with the FSP2.4 specification, that supports 64-bit builds for the first time and this also ensures that parameter types works for both 32-bit and 64-bit builds. - In fsp_params.c, FSPS_ARCH_UPD macro is changed to FSPS_ARCHx_UPD which supports FSP2.4 and older specifications. Special handling is added for FspEventHandler assignment to handle as the variable type is different in both cases. - In meminit.c, the type for SPD pointers is changed from uint32_t to efi_uintn_t to support both 32-bit and 64-bit builds. BUG=b:329034258 TEST=Verified x86_32 and x86_64 builds on Meteor Lake board (Rex) Change-Id: Ide220f60184135a6488f4472f69a471e2b383e2a Signed-off-by: Appukuttan V K <appukuttan.vk(a)intel.com> --- M src/soc/intel/meteorlake/fsp_params.c M src/soc/intel/meteorlake/meminit.c M src/soc/intel/meteorlake/romstage/fsp_params.c 3 files changed, 15 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/82177/19 -- To view, visit https://review.coreboot.org/c/coreboot/+/82177?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ide220f60184135a6488f4472f69a471e2b383e2a Gerrit-Change-Number: 82177 Gerrit-PatchSet: 19 Gerrit-Owner: Appukuttan V K <appukuttan.vk(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Appukuttan V K <appukuttan.vk(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com>

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coreboot-gerrit May 2024