coreboot-gerrit April 2024

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[XS] Change in coreboot[main]: mb/google/nissa/var/anraggar: Add cbj_sleeve to control mic jack
by Jianeng Ceng (Code Review) 08 Apr '24

08 Apr '24

Attention is currently required from: Dinesh Gehlot, Eric Lai, Kapil Porwal, Nick Vaccaro, Subrata Banik. Jianeng Ceng has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81774?usp=email ) Change subject: mb/google/nissa/var/anraggar: Add cbj_sleeve to control mic jack ...................................................................... mb/google/nissa/var/anraggar: Add cbj_sleeve to control mic jack Added a new GPIO port cbj-sleeve for kernel driver to call. After entering the system, it is pulled high by the kernel to enable the MIC function. BUG=None TEST=MIC function is normal Change-Id: I093be6a3e357aae389fcbe8291a9701c40b62e15 Signed-off-by: Jianeng Ceng <cengjianeng(a)huaqin.corp-partner.google.com> --- M src/mainboard/google/brya/Kconfig M src/mainboard/google/brya/variants/anraggar/overridetree.cb 2 files changed, 4 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/81774/1 diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig index 732a9ea..0fa3553 100644 --- a/src/mainboard/google/brya/Kconfig +++ b/src/mainboard/google/brya/Kconfig @@ -2,6 +2,7 @@ config BOARD_GOOGLE_BRYA_COMMON def_bool n + select DRIVERS_I2C_RT5645 select DRIVERS_GENERIC_ALC1015 select DRIVERS_GENERIC_GPIO_KEYS select DRIVERS_GENERIC_MAX98357A diff --git a/src/mainboard/google/brya/variants/anraggar/overridetree.cb b/src/mainboard/google/brya/variants/anraggar/overridetree.cb index c7942c1..2f5b1d2 100644 --- a/src/mainboard/google/brya/variants/anraggar/overridetree.cb +++ b/src/mainboard/google/brya/variants/anraggar/overridetree.cb @@ -348,15 +348,13 @@ end end device ref i2c3 on - chip drivers/i2c/generic + chip drivers/i2c/rt5645 register "hid" = ""10EC5650"" register "name" = ""RT58"" register "desc" = ""Realtek RT5650"" register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)" - register "property_count" = "1" - register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER" - register "property_list[0].name" = ""realtek,jd-mode"" - register "property_list[0].integer" = "2" + register "cbj_sleeve" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)" + register "jd_mode" = "2" device i2c 1a on end end end -- To view, visit https://review.coreboot.org/c/coreboot/+/81774?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I093be6a3e357aae389fcbe8291a9701c40b62e15 Gerrit-Change-Number: 81774 Gerrit-PatchSet: 1 Gerrit-Owner: Jianeng Ceng <cengjianeng(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-MessageType: newchange

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[M] Change in coreboot[main]: drivers/i2c/rt5645: Add RT5645 amp driver
by Jianeng Ceng (Code Review) 08 Apr '24

08 Apr '24

Jianeng Ceng has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81773?usp=email ) Change subject: drivers/i2c/rt5645: Add RT5645 amp driver ...................................................................... drivers/i2c/rt5645: Add RT5645 amp driver Add RT5645 AMP support. BUG=None TEST=RT5645 driver can probe properly. Change-Id: I602fcc4dd8576043943f6e20884edc4703350320 Signed-off-by: Jianeng Ceng <cengjianeng(a)huaqin.corp-partner.google.com> --- A .tmpconfig.lintUF0w3T A src/drivers/i2c/rt5645/Kconfig A src/drivers/i2c/rt5645/Makefile.mk A src/drivers/i2c/rt5645/chip.h A src/drivers/i2c/rt5645/rt5645.c 5 files changed, 155 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/81773/1 diff --git a/.tmpconfig.lintUF0w3T b/.tmpconfig.lintUF0w3T new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/.tmpconfig.lintUF0w3T diff --git a/src/drivers/i2c/rt5645/Kconfig b/src/drivers/i2c/rt5645/Kconfig new file mode 100644 index 0000000..76cfee8 --- /dev/null +++ b/src/drivers/i2c/rt5645/Kconfig @@ -0,0 +1,5 @@ +## SPDX-License-Identifier: GPL-2.0-only + +config DRIVERS_I2C_RT5645 + bool + depends on HAVE_ACPI_TABLES diff --git a/src/drivers/i2c/rt5645/Makefile.mk b/src/drivers/i2c/rt5645/Makefile.mk new file mode 100644 index 0000000..69d5f7e --- /dev/null +++ b/src/drivers/i2c/rt5645/Makefile.mk @@ -0,0 +1,3 @@ +## SPDX-License-Identifier: GPL-2.0-only + +ramstage-$(CONFIG_DRIVERS_I2C_RT5645) += rt5645.c diff --git a/src/drivers/i2c/rt5645/chip.h b/src/drivers/i2c/rt5645/chip.h new file mode 100644 index 0000000..2fc3473 --- /dev/null +++ b/src/drivers/i2c/rt5645/chip.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <acpi/acpi_device.h> + +struct drivers_i2c_rt5645_config { + const char *desc; /* Device Description */ + const char *name; /* ACPI _HID */ + const char *hid; /* ACPI _HID */ + struct acpi_gpio cbj_sleeve; /* sleeve power gate GPIO */ + struct acpi_gpio hp_detect; + unsigned int uid; + unsigned int bus_speed; + /* Allow GPIO based interrupt or PIRQ */ + struct acpi_gpio irq_gpio; + struct acpi_irq irq; + uint32_t jd_mode; +}; diff --git a/src/drivers/i2c/rt5645/rt5645.c b/src/drivers/i2c/rt5645/rt5645.c new file mode 100644 index 0000000..daeaa81 --- /dev/null +++ b/src/drivers/i2c/rt5645/rt5645.c @@ -0,0 +1,130 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <acpi/acpi_device.h> +#include <acpi/acpigen.h> +#include <console/console.h> +#include <device/device.h> +#include <device/path.h> +#include "chip.h" + +#define RT5645_ACPI_NAME "RT58" +#define RT5645_DP_INT(key, val) \ + acpi_dp_add_integer(dp, "realtek," key, (val)) + +static int i2c_generic_write_gpio(struct acpi_gpio *gpio, int *curr_index) +{ + int ret = -1; + + if (gpio->pin_count == 0) + return ret; + + acpi_device_write_gpio(gpio); + ret = *curr_index; + (*curr_index)++; + + return ret; +} + +static void rt5645_fill_ssdt(const struct device *dev) +{ + struct drivers_i2c_rt5645_config *config = dev->chip_info; + const char *path; + const char *scope = acpi_device_scope(dev); + int cbj_sleeve_index = -1, irq_gpio_index = -1, hp_detect_index = -1; + struct acpi_i2c i2c = { + .address = dev->path.i2c.device, + .mode_10bit = dev->path.i2c.mode_10bit, + .speed = config->bus_speed ? : I2C_SPEED_FAST, + .resource = scope, + }; + struct acpi_dp *dp; + int curr_index = 0; + + if (!config) + return; + + const char *name = acpi_device_name(dev); + if (!scope || !name) + return; + + /* Device */ + acpigen_write_scope(scope); + acpigen_write_device(name); + + if (config->hid) + acpigen_write_name_string("_HID", config->hid); + else + acpigen_write_name_string("_HID", "10EC5650"); + acpigen_write_name_integer("_UID", 0); + acpigen_write_name_string("_DDN", dev->chip_ops->name); + acpigen_write_STA(acpi_device_status(dev)); + + /* Resources */ + acpigen_write_name("_CRS"); + acpigen_write_resourcetemplate_header(); + acpi_device_write_i2c(&i2c); + + /* Use either Interrupt() or GpioInt() */ + if (config->irq_gpio.pin_count) + irq_gpio_index = i2c_generic_write_gpio(&config->irq_gpio, + &curr_index); + else + acpi_device_write_interrupt(&config->irq); + + /* Add I2C GPIO index */ + cbj_sleeve_index = i2c_generic_write_gpio(&config->cbj_sleeve, + &curr_index); + hp_detect_index = i2c_generic_write_gpio(&config->hp_detect, + &curr_index); + acpigen_write_resourcetemplate_footer(); + + /* _DSD for devicetree properties */ + /* This points to the first pin in the first gpio entry in _CRS */ + path = acpi_device_path(dev); + dp = acpi_dp_new_table("_DSD"); + if (config->irq_gpio.pin_count) + acpi_dp_add_gpio(dp, "irq-gpios", path, irq_gpio_index, 0, + config->irq_gpio.active_low); + if (config->cbj_sleeve.pin_count) + acpi_dp_add_gpio(dp, "cbj-sleeve-gpios", path, cbj_sleeve_index, 0, + config->cbj_sleeve.active_low); + if (config->hp_detect.pin_count) + acpi_dp_add_gpio(dp, "hp-detect-gpios", path, hp_detect_index, 0, + config->hp_detect.active_low); + RT5645_DP_INT("jd-mode", config->jd_mode); + acpi_dp_write(dp); + + acpigen_pop_len(); /* Device */ + acpigen_pop_len(); /* Scope */ + + printk(BIOS_INFO, "%s: %s\n", path, dev->chip_ops->name); +} + +static const char *rt5645_acpi_name(const struct device *dev) +{ + struct drivers_i2c_rt5645_config *config = dev->chip_info; + static char name[5]; + if (config->name) + return config->name; + + snprintf(name, sizeof(name), "D%03.3X", dev->chip_ops->name); + return name; + //return RT5645_ACPI_NAME; +} + +static struct device_operations rt5645_ops = { + .read_resources = noop_read_resources, + .set_resources = noop_set_resources, + .acpi_name = rt5645_acpi_name, + .acpi_fill_ssdt = rt5645_fill_ssdt, +}; + +static void rt5645_enable(struct device *dev) +{ + dev->ops = &rt5645_ops; +} + +struct chip_operations drivers_i2c_rt5645_ops = { + .name = "ASoC RT5645 Codec driver", + .enable_dev = rt5645_enable +}; -- To view, visit https://review.coreboot.org/c/coreboot/+/81773?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I602fcc4dd8576043943f6e20884edc4703350320 Gerrit-Change-Number: 81773 Gerrit-PatchSet: 1 Gerrit-Owner: Jianeng Ceng <cengjianeng(a)huaqin.corp-partner.google.com> Gerrit-MessageType: newchange

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[XS] Change in coreboot[main]: mb/google/corsola: Set orientation to LB_FB_ORIENTATION_RIGHT_UP
by Ruihai Zhou (Code Review) 08 Apr '24

08 Apr '24

Attention is currently required from: Hung-Te Lin, Xuxin Xiong, Yang Wu, Yidi Lin, Yu-Ping Wu. Ruihai Zhou has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81752?usp=email ) Change subject: mb/google/corsola: Set orientation to LB_FB_ORIENTATION_RIGHT_UP ...................................................................... Patch Set 3: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/81752?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie101cc8b983d3d16587f88fa787ed622e59d27eb Gerrit-Change-Number: 81752 Gerrit-PatchSet: 3 Gerrit-Owner: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Ruihai Zhou <zhouruihai(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Xuxin Xiong <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Xuxin Xiong <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-Attention: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Mon, 08 Apr 2024 10:26:36 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[main]: mb/google/brya: Remove baseboard-specific FMD names
by Subrata Banik (Code Review) 08 Apr '24

08 Apr '24

Attention is currently required from: Dinesh Gehlot, Kapil Porwal, Nick Vaccaro, Sumeet R Pawnikar. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81676?usp=email ) Change subject: mb/google/brya: Remove baseboard-specific FMD names ...................................................................... Patch Set 4: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/81676/comment/89373b00_d0b814de : PS4, Line 15: Nivviks > There is no regression observed in boot-time w/ and w/o this change in both normal and recovery mode. can you please check a brya board (like marasov may be ?) as well ? -- To view, visit https://review.coreboot.org/c/coreboot/+/81676?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9151a4bcbe9cc084cc19b1a3e91c0321fe4dcc37 Gerrit-Change-Number: 81676 Gerrit-PatchSet: 4 Gerrit-Owner: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Mon, 08 Apr 2024 10:05:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Dinesh Gehlot <digehlot(a)google.com> Gerrit-MessageType: comment

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[M] Change in coreboot[main]: mb/google/brya: Remove baseboard-specific FMD names
by Dinesh Gehlot (Code Review) 08 Apr '24

08 Apr '24

Attention is currently required from: Kapil Porwal, Nick Vaccaro, Subrata Banik, Sumeet R Pawnikar. Dinesh Gehlot has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81676?usp=email ) Change subject: mb/google/brya: Remove baseboard-specific FMD names ...................................................................... Patch Set 4: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/81676/comment/78e185a9_d17036e9 : PS4, Line 15: Nivviks > can you please test the below scenarios […] There is no regression observed in boot-time w/ and w/o this change in both normal and recovery mode. -- To view, visit https://review.coreboot.org/c/coreboot/+/81676?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9151a4bcbe9cc084cc19b1a3e91c0321fe4dcc37 Gerrit-Change-Number: 81676 Gerrit-PatchSet: 4 Gerrit-Owner: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Mon, 08 Apr 2024 09:52:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: mb/google/corsola: Add new board Skitty
by Shawn Ku (Code Review) 08 Apr '24

08 Apr '24

Attention is currently required from: Herbert Wu, Hung-Te Lin, Shawn Ku, Yidi Lin, Yu-Ping Wu. Shawn Ku has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81772?usp=email ) Change subject: mb/google/corsola: Add new board Skitty ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/81772?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2f12bccfda591a5baf8d23d217b6f1f81b059d15 Gerrit-Change-Number: 81772 Gerrit-PatchSet: 2 Gerrit-Owner: Herbert Wu <herbert1_wu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Shawn Ku <shawnku(a)chromium.org> Gerrit-Reviewer: Shawn Ku <shawnku(a)google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Herbert Wu <herbert1_wu(a)pegatron.corp-partner.google.com> Gerrit-Attention: Shawn Ku <shawnku(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Mon, 08 Apr 2024 09:12:35 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: mb/google/corsola: Add new board Skitty
by Herbert Wu (Code Review) 08 Apr '24

08 Apr '24

Attention is currently required from: Hung-Te Lin, Yidi Lin, Yu-Ping Wu. Hello Hung-Te Lin, Yidi Lin, Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81772?usp=email to look at the new patch set (#2). Change subject: mb/google/corsola: Add new board Skitty ...................................................................... mb/google/corsola: Add new board Skitty Add a new board 'Skitty' BUG=b:331702790 BRANCH=corsola TEST=none Change-Id: I2f12bccfda591a5baf8d23d217b6f1f81b059d15 Signed-off-by: Herbert Wu <herbert1_wu(a)pegatron.corp-partner.google.com> --- M src/mainboard/google/corsola/Kconfig M src/mainboard/google/corsola/Kconfig.name 2 files changed, 6 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/81772/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/81772?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2f12bccfda591a5baf8d23d217b6f1f81b059d15 Gerrit-Change-Number: 81772 Gerrit-PatchSet: 2 Gerrit-Owner: Herbert Wu <herbert1_wu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[main]: drivers/intel/fsp2_0: Support FSP 2.4 64-bits
by Appukuttan V K (Code Review) 08 Apr '24

08 Apr '24

Attention is currently required from: Andrey Petrov, Appukuttan V K, Arthur Heymans, Bora Guvendik, Christian Walter, Felix Held, Fred Reitberger, Jason Glenesk, Johnny Lin, Jérémy Compostella, Matt DeVillier, Patrick Rudolph, Paul Menzel, Ronak Kanabar, Shuo Liu, Subrata Banik, Tim Chu, Wonkyu Kim. Appukuttan V K has uploaded a new patch set (#36) to the change originally created by Jérémy Compostella. ( https://review.coreboot.org/c/coreboot/+/80277?usp=email ) The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: drivers/intel/fsp2_0: Support FSP 2.4 64-bits ...................................................................... drivers/intel/fsp2_0: Support FSP 2.4 64-bits FSP 2.4 brings FSP 64-bits support which requires some adjustments in coreboot: FSP/UEFI uses the Microsoft x64 calling convention. Appropriate attribute has to be set to all functions calling or called by the FSP. BUG=b:329034258 TEST=verified on Lunar Lake RVP board (lnlrvp) Change-Id: If0397f5cc8d0f4f1872bd37a001fe42e0c37ec99 Signed-off-by: Jeremy Compostella <jeremy.compostella(a)intel.com> --- M src/drivers/intel/fsp2_0/include/fsp/soc_binding.h M src/drivers/intel/fsp2_0/include/fsp/util.h M src/drivers/intel/fsp2_0/ppi/mp_service1.c M src/drivers/intel/fsp2_0/ppi/mp_service2.c M src/include/efi/efi_datatype.h 5 files changed, 25 insertions(+), 22 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/80277/36 -- To view, visit https://review.coreboot.org/c/coreboot/+/80277?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If0397f5cc8d0f4f1872bd37a001fe42e0c37ec99 Gerrit-Change-Number: 80277 Gerrit-PatchSet: 36 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Appukuttan V K <appukuttan.vk(a)intel.com> Gerrit-CC: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-CC: Dinesh Gehlot <digehlot(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Appukuttan V K <appukuttan.vk(a)intel.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[main]: soc/intel/xeon_sp: Add iio_ioapic.c
by Shuo Liu (Code Review) 08 Apr '24

08 Apr '24

Attention is currently required from: Arthur Heymans, Christian Walter, Felix Held, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Tim Chu. Hello Arthur Heymans, Christian Walter, Felix Held, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Tim Chu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81681?usp=email to look at the new patch set (#4). Change subject: soc/intel/xeon_sp: Add iio_ioapic.c ...................................................................... soc/intel/xeon_sp: Add iio_ioapic.c Move the soc_get_ioapic_info for platforms with IIO IO-APICs to a separate file from src/soc/intel/xeon_sp/acpi.c. TEST=Build intel/archerticy CRB Change-Id: I59022b7685539491604724ef3b550da1cfd53f13 Signed-off-by: Shuo Liu <shuo.liu(a)intel.com> --- M src/soc/intel/xeon_sp/Makefile.mk M src/soc/intel/xeon_sp/acpi.c A src/soc/intel/xeon_sp/iio_ioapic.c 3 files changed, 42 insertions(+), 39 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/81681/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/81681?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I59022b7685539491604724ef3b550da1cfd53f13 Gerrit-Change-Number: 81681 Gerrit-PatchSet: 4 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[main]: soc/intel/xeon_sp: Add iio_ioapic.c
by Shuo Liu (Code Review) 08 Apr '24

08 Apr '24

Attention is currently required from: Arthur Heymans, Christian Walter, Felix Held, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Tim Chu. Shuo Liu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81681?usp=email ) Change subject: soc/intel/xeon_sp: Add iio_ioapic.c ...................................................................... Patch Set 3: (4 comments) Patchset: PS3: Thanks for the good catches, updated! File src/soc/intel/xeon_sp/iio_ioapic.c: https://review.coreboot.org/c/coreboot/+/81681/comment/26991c1b_81959378 : PS1, Line 10: XEON_SP_HAVE_IIO_IOAPIC > drop? Done https://review.coreboot.org/c/coreboot/+/81681/comment/7d4bb5b7_8dc9730f : PS1, Line 10: 8 + 1 > probably should be CONFIG_MAX_SOCKET * MAX_IIO_STACK + 1 ? Done https://review.coreboot.org/c/coreboot/+/81681/comment/21accb3a_8ca97f72 : PS1, Line 30: XEON_SP_HAVE_IIO_IOAPIC > condition is always false Done -- To view, visit https://review.coreboot.org/c/coreboot/+/81681?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I59022b7685539491604724ef3b550da1cfd53f13 Gerrit-Change-Number: 81681 Gerrit-PatchSet: 3 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Mon, 08 Apr 2024 08:16:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Rudolph <patrick.rudolph(a)9elements.com> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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