coreboot-gerrit April 2024

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[XS] Change in coreboot[main]: Makefile.mk: Account for large code model sections in cbfs_struct
by Felix Singer (Code Review) 08 Apr '24

08 Apr '24

Attention is currently required from: Arthur Heymans. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81777?usp=email ) Change subject: Makefile.mk: Account for large code model sections in cbfs_struct ...................................................................... Patch Set 1: (1 comment) File Makefile.mk: https://review.coreboot.org/c/coreboot/+/81777/comment/20f0a58c_919d6a27 : PS1, Line 371: --set-section-flags .bss*=alloc,contents,load $(2).tmp $(2); A backslash is missing at the end of the line -- To view, visit https://review.coreboot.org/c/coreboot/+/81777?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie07779ef548337772183ffe2d642f971d8cceae7 Gerrit-Change-Number: 81777 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Mon, 08 Apr 2024 12:59:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[main]: soc/intel/xeon_sp: Add iio_ioapic.c
by Arthur Heymans (Code Review) 08 Apr '24

08 Apr '24

Attention is currently required from: Christian Walter, Felix Held, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Shuo Liu, Tim Chu. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81681?usp=email ) Change subject: soc/intel/xeon_sp: Add iio_ioapic.c ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/81681?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I59022b7685539491604724ef3b550da1cfd53f13 Gerrit-Change-Number: 81681 Gerrit-PatchSet: 4 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Mon, 08 Apr 2024 12:22:05 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[main]: security/tpm: replace CONFIG(TPMx) checks with runtime check
by Sergii Dmytruk (Code Review) 08 Apr '24

08 Apr '24

Sergii Dmytruk has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69161?usp=email ) Change subject: security/tpm: replace CONFIG(TPMx) checks with runtime check ...................................................................... Patch Set 36: (1 comment) File src/drivers/tpm/ppi.c: https://review.coreboot.org/c/coreboot/+/69161/comment/e5ba15f0_a3330bc1 : PS36, Line 574: BIOS_WARN > No, a missing identifier should still be found long before it gets to any optimization passes. […] CB:81800 -- To view, visit https://review.coreboot.org/c/coreboot/+/69161?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id9cc25aad8d1d7bfad12b7a92059b1b3641bbfa9 Gerrit-Change-Number: 69161 Gerrit-PatchSet: 36 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Jan Samek <samekh(a)email.cz> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Comment-Date: Mon, 08 Apr 2024 12:05:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Rudolph <patrick.rudolph(a)9elements.com> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Comment-In-Reply-To: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: configs: enable TPM PPI for asrock_b85m_pro4.tpm2_txt_placeholder_acms
by Sergii Dmytruk (Code Review) 08 Apr '24

08 Apr '24

Sergii Dmytruk has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81800?usp=email ) Change subject: configs: enable TPM PPI for asrock_b85m_pro4.tpm2_txt_placeholder_acms ...................................................................... configs: enable TPM PPI for asrock_b85m_pro4.tpm2_txt_placeholder_acms This is a good board for compiling TPM PPI sources for the following reasons (based on `config TPM_PPI` definition): - uses TPM - the board is not related to ChromeOS - ACPI tables are enabled - it doesn't use EDK2 payload At the moment drivers/tpm/ppi.c seems to not be compiled by CI at all, see CB:69161 and CB:81590. `CONFIG_TPM_PPI` is off by default but at least several configurations under `configs/` (Protectli, MSI) should exercise the file because they use EDK2 payload which changes default value. This is however negated by abuild disabling all payloads and thus effectively preventing `CONFIG_TPM_PPI` from being set. This board not using EDK2 also ensures that `CONFIG_TPM_PPI=y` will not disappear after some future `make savedefconfig`. Change-Id: I316747a79b3142e9d6188c5986b344c7751d92d7 Signed-off-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> --- M configs/config.asrock_b85m_pro4.tpm2_txt_placeholder_acms 1 file changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/81800/1 diff --git a/configs/config.asrock_b85m_pro4.tpm2_txt_placeholder_acms b/configs/config.asrock_b85m_pro4.tpm2_txt_placeholder_acms index 4edeb0c..da33450 100644 --- a/configs/config.asrock_b85m_pro4.tpm2_txt_placeholder_acms +++ b/configs/config.asrock_b85m_pro4.tpm2_txt_placeholder_acms @@ -1,8 +1,11 @@ # Known-working configuration to boot with TXT enabled. Since BIOS # and SINIT ACM blobs are missing, use something else as placeholder. # Used ACMs were extracted from a Supermicro X10SLH firmware update. +# +# CONFIG_TPM_PPI=y tests building PPI implementation. CONFIG_VENDOR_ASROCK=y CONFIG_BOARD_ASROCK_B85M_PRO4=y +CONFIG_TPM_PPI=y CONFIG_TPM2=y CONFIG_INTEL_TXT=y CONFIG_INTEL_TXT_BIOSACM_FILE="3rdparty/blobs/cpu/intel/stm/stm.bin" -- To view, visit https://review.coreboot.org/c/coreboot/+/81800?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I316747a79b3142e9d6188c5986b344c7751d92d7 Gerrit-Change-Number: 81800 Gerrit-PatchSet: 1 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[main]: drivers/i2c/rt5645: Add RT5645 amp driver
by Dolan Liu (Code Review) 08 Apr '24

08 Apr '24

Attention is currently required from: Eric Lai, Jianeng Ceng, Subrata Banik. Dolan Liu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81773?usp=email ) Change subject: drivers/i2c/rt5645: Add RT5645 amp driver ...................................................................... Patch Set 2: (2 comments) Patchset: PS2: @Eric @Subrata if need more person review on here, please help to loop the proper owner, thanks File src/drivers/i2c/rt5645/chip.h: https://review.coreboot.org/c/coreboot/+/81773/comment/27a952c6_2ee3b558 : PS2, Line 7: const char *name; /* ACPI _HID */ `acpi name` in comments -- To view, visit https://review.coreboot.org/c/coreboot/+/81773?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I602fcc4dd8576043943f6e20884edc4703350320 Gerrit-Change-Number: 81773 Gerrit-PatchSet: 2 Gerrit-Owner: Jianeng Ceng <cengjianeng(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Dolan Liu <liuyong5(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jianeng Ceng <cengjianeng(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Mon, 08 Apr 2024 11:59:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[main]: drivers/i2c/rt5645: Add RT5645 amp driver
by Dolan Liu (Code Review) 08 Apr '24

08 Apr '24

Attention is currently required from: Dolan Liu, Eric Lai, Jianeng Ceng, Subrata Banik. Dolan Liu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81773?usp=email ) Change subject: drivers/i2c/rt5645: Add RT5645 amp driver ...................................................................... Patch Set 2: Code-Review+1 (4 comments) File src/drivers/i2c/rt5645/rt5645.c: https://review.coreboot.org/c/coreboot/+/81773/comment/ec60fe73_886fcb1c : PS2, Line 59: acpigen_write_name_string("_DDN", dev->chip_ops->name); better to use the `config->desc` if defined https://review.coreboot.org/c/coreboot/+/81773/comment/95d787c8_f047d418 : PS2, Line 100: printk(BIOS_INFO, "%s: %s\n", path, dev->chip_ops->name); if chip_ops->name change to `&config->desc`, this should be changed to the same https://review.coreboot.org/c/coreboot/+/81773/comment/79ae880c_22f2f097 : PS2, Line 110: snprintf(name, sizeof(name), "D%03.3X", dev->chip_ops->name); better to print `dev->path.i2c.device` https://review.coreboot.org/c/coreboot/+/81773/comment/ffdb2505_f57b3054 : PS2, Line 112: //return RT5645_ACPI_NAME; remove this -- To view, visit https://review.coreboot.org/c/coreboot/+/81773?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I602fcc4dd8576043943f6e20884edc4703350320 Gerrit-Change-Number: 81773 Gerrit-PatchSet: 2 Gerrit-Owner: Jianeng Ceng <cengjianeng(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Dolan Liu <liuyong5(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Dolan Liu <liuyong5(a)huaqin.corp-partner.google.com> Gerrit-Attention: Jianeng Ceng <cengjianeng(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Mon, 08 Apr 2024 11:50:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: util/crossgcc: Update LLVM from 17.0.6 to 18.1.3
by Arthur Heymans (Code Review) 08 Apr '24

08 Apr '24

Attention is currently required from: Felix Singer, Martin L Roth, Zebreus. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80314?usp=email ) Change subject: util/crossgcc: Update LLVM from 17.0.6 to 18.1.3 ...................................................................... Patch Set 12: (1 comment) Patchset: PS12: https://review.coreboot.org/c/coreboot/+/81777 should fix the last issue. -- To view, visit https://review.coreboot.org/c/coreboot/+/80314?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I03a44e0c23a925396f614f282882405dc886ba58 Gerrit-Change-Number: 80314 Gerrit-PatchSet: 12 Gerrit-Owner: Zebreus <lennarteichhorn(a)googlemail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Zebreus <lennarteichhorn(a)googlemail.com> Gerrit-Comment-Date: Mon, 08 Apr 2024 11:48:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: Makefile.mk: Account for large code model sections in cbfs_struct
by Arthur Heymans (Code Review) 08 Apr '24

08 Apr '24

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81777?usp=email ) Change subject: Makefile.mk: Account for large code model sections in cbfs_struct ...................................................................... Makefile.mk: Account for large code model sections in cbfs_struct Starting with version 18 LLVM puts code and data generated with -ffunction-section -mcmodel=large inside sections with an 'l' prefix. Change-Id: Ie07779ef548337772183ffe2d642f971d8cceae7 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M Makefile.mk 1 file changed, 3 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/81777/1 diff --git a/Makefile.mk b/Makefile.mk index d7110a9..a47df95 100644 --- a/Makefile.mk +++ b/Makefile.mk @@ -366,7 +366,9 @@ $(eval $(2): $(1) $(obj)/build.h $(obj)/fmap_config.h $(KCONFIG_AUTOHEADER); \ printf " CC+STRIP $(1)\n"; \ $(CC_ramstage) -MMD $(CPPFLAGS_ramstage) $(CFLAGS_ramstage) --param asan-globals=0 $$(ramstage-c-ccopts) -include $(KCONFIG_AUTOHEADER) -MT $(2) -o $(2).tmp -c $(1) && \ - $(OBJCOPY_ramstage) -O binary --only-section='.data*' --only-section='.bss*' --set-section-flags .bss*=alloc,contents,load $(2).tmp $(2); \ + $(OBJCOPY_ramstage) -O binary --only-section='.data*' --only-section='.bss*' \ + --only-section='.ldata*' --only-section='.lbss*' \ + --set-section-flags .bss*=alloc,contents,load $(2).tmp $(2); rm -f $(2).tmp) \ $(eval DEPENDENCIES += $(2).d) -- To view, visit https://review.coreboot.org/c/coreboot/+/81777?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie07779ef548337772183ffe2d642f971d8cceae7 Gerrit-Change-Number: 81777 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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[M] Change in coreboot[main]: driver/i2c/rt5645: add RT5645 codec driver
by Dolan Liu (Code Review) 08 Apr '24

08 Apr '24

Dolan Liu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81776?usp=email ) Change subject: driver/i2c/rt5645: add RT5645 codec driver ...................................................................... driver/i2c/rt5645: add RT5645 codec driver Add rt5645 codec support. Realtek rt5645 kernel upstream link: https://lore.kernel.org/all/20240404035747.118064-1-derek.fang@realtek.com/ Test: Test on anraggar, RT5645 driver can probe properly Change-Id: I23407b451c728fb0cfad813552afc6d24e95608a --- A src/drivers/i2c/rt5645/Kconfig A src/drivers/i2c/rt5645/Makefile.mk A src/drivers/i2c/rt5645/chip.h A src/drivers/i2c/rt5645/rt5645.c 4 files changed, 154 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/81776/1 diff --git a/src/drivers/i2c/rt5645/Kconfig b/src/drivers/i2c/rt5645/Kconfig new file mode 100644 index 0000000..21fb4fb --- /dev/null +++ b/src/drivers/i2c/rt5645/Kconfig @@ -0,0 +1,3 @@ +config DRIVERS_I2C_RT5645 + bool + depends on HAVE_ACPI_TABLES diff --git a/src/drivers/i2c/rt5645/Makefile.mk b/src/drivers/i2c/rt5645/Makefile.mk new file mode 100644 index 0000000..69d5f7e --- /dev/null +++ b/src/drivers/i2c/rt5645/Makefile.mk @@ -0,0 +1,3 @@ +## SPDX-License-Identifier: GPL-2.0-only + +ramstage-$(CONFIG_DRIVERS_I2C_RT5645) += rt5645.c diff --git a/src/drivers/i2c/rt5645/chip.h b/src/drivers/i2c/rt5645/chip.h new file mode 100644 index 0000000..6bb11a0 --- /dev/null +++ b/src/drivers/i2c/rt5645/chip.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <acpi/acpi_device.h> + +struct drivers_i2c_rt5645_config { + const char *desc; /* Device Description */ + const char *name; /* ACPI Device Name */ + const char *hid; /* ACPI _HID */ + struct acpi_gpio hp_mic; /* sleeve power gate GPIO */ + struct acpi_gpio hp_detect; + unsigned int uid; + unsigned int bus_speed; + /* Allow GPIO based interrupt or PIRQ */ + struct acpi_gpio irq_gpio; + struct acpi_irq irq; + uint32_t jd_mode; +}; diff --git a/src/drivers/i2c/rt5645/rt5645.c b/src/drivers/i2c/rt5645/rt5645.c new file mode 100644 index 0000000..fc4653b --- /dev/null +++ b/src/drivers/i2c/rt5645/rt5645.c @@ -0,0 +1,131 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <acpi/acpi_device.h> +#include <acpi/acpigen.h> +#include <console/console.h> +#include <device/device.h> +#include <device/path.h> +#include "chip.h" + +#define RT5645_ACPI_NAME "RT58" +#define RT5645_DP_INT(key, val) \ + acpi_dp_add_integer(dp, "realtek," key, (val)) + +static int i2c_generic_write_gpio(struct acpi_gpio *gpio, int *curr_index) +{ + int ret = -1; + + if (gpio->pin_count == 0) + return ret; + + acpi_device_write_gpio(gpio); + ret = *curr_index; + (*curr_index)++; + + return ret; +} + +static void rt5645_fill_ssdt(const struct device *dev) +{ + struct drivers_i2c_rt5645_config *config = dev->chip_info; + const char *path; + int hp_mic_index = -1, irq_gpio_index = -1, hp_detect_index=-1; + const char *scope = acpi_device_scope(dev); + struct acpi_i2c i2c = { + .address = dev->path.i2c.device, + .mode_10bit = dev->path.i2c.mode_10bit, + .speed = config->bus_speed ? : I2C_SPEED_FAST, + .resource = scope, + }; + struct acpi_dp *dp; + int curr_index = 0; + + if (!config) + return; + + const char *name = acpi_device_name(dev); + if (!scope || !name) + return; + + /* Device */ + acpigen_write_scope(scope); + acpigen_write_device(name); + + if (config->hid) + acpigen_write_name_string("_HID", config->hid); + else + acpigen_write_name_string("_HID", "10EC5650"); + acpigen_write_name_integer("_UID", 0); + if (config->desc) + acpigen_write_name_string("_DDN", config->desc); + else + acpigen_write_name_string("_DDN", dev->chip_ops->name); + acpigen_write_STA(acpi_device_status(dev)); + + /* Resources */ + acpigen_write_name("_CRS"); + acpigen_write_resourcetemplate_header(); + acpi_device_write_i2c(&i2c); + + /* Add I2C GPIO Index */ + /* Use either Interrupt() or GpioInt() */ + if (config->irq_gpio.pin_count) + irq_gpio_index = i2c_generic_write_gpio(&config->irq_gpio, + &curr_index); + else + acpi_device_write_interrupt(&config->irq); + + hp_mic_index = i2c_generic_write_gpio(&config->hp_mic, + &curr_index); + hp_detect_index = i2c_generic_write_gpio(&config->hp_detect, + &curr_index); + acpigen_write_resourcetemplate_footer(); + + /* _DSD for devicetree properties */ + /* This points to the first pin in the first gpio entry in _CRS */ + path = acpi_device_path(dev); + dp = acpi_dp_new_table("_DSD"); + if (config->irq_gpio.pin_count) + acpi_dp_add_gpio(dp, "irq-gpios", path, irq_gpio_index, 0, + config->irq_gpio.active_low); + if (config->hp_mic.pin_count) + acpi_dp_add_gpio(dp, "hp-mic-gpios", path, hp_mic_index, 0, config->hp_mic.active_low); + if (config->hp_detect.pin_count) + acpi_dp_add_gpio(dp, "hp-detect-gpios", path, hp_detect_index, 0, config->hp_detect.active_low); + RT5645_DP_INT("jd-mode", config->jd_mode); + acpi_dp_write(dp); + + acpigen_pop_len(); /* Device */ + acpigen_pop_len(); /* Scope */ + + printk(BIOS_INFO, "%s: %s\n", path, dev->chip_ops->name); +} + +static const char *rt5645_acpi_name(const struct device *dev) +{ + struct drivers_i2c_rt5645_config *config = dev->chip_info; + static char name[5]; + + if (config->name) + return config->name; + + snprintf(name, sizeof(name), "D%03.3X", dev->path.i2c.device); + return name; +} + +static struct device_operations rt5645_ops = { + .read_resources = noop_read_resources, + .set_resources = noop_set_resources, + .acpi_name = rt5645_acpi_name, + .acpi_fill_ssdt = rt5645_fill_ssdt, +}; + +static void rt5645_enable(struct device *dev) +{ + dev->ops = &rt5645_ops; +} + +struct chip_operations drivers_i2c_rt5645_ops = { + .name="ASoC RT5645 Codec driver", + .enable_dev = rt5645_enable +}; -- To view, visit https://review.coreboot.org/c/coreboot/+/81776?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I23407b451c728fb0cfad813552afc6d24e95608a Gerrit-Change-Number: 81776 Gerrit-PatchSet: 1 Gerrit-Owner: Dolan Liu <liuyong5(a)huaqin.corp-partner.google.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[main]: drivers/i2c/rt5645: Add RT5645 amp driver
by Jianeng Ceng (Code Review) 08 Apr '24

08 Apr '24

Jianeng Ceng has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/81773?usp=email ) Change subject: drivers/i2c/rt5645: Add RT5645 amp driver ...................................................................... drivers/i2c/rt5645: Add RT5645 amp driver Add RT5645 AMP support. BUG=None TEST=RT5645 driver can probe properly. Change-Id: I602fcc4dd8576043943f6e20884edc4703350320 Signed-off-by: Jianeng Ceng <cengjianeng(a)huaqin.corp-partner.google.com> --- A src/drivers/i2c/rt5645/Kconfig A src/drivers/i2c/rt5645/Makefile.mk A src/drivers/i2c/rt5645/chip.h A src/drivers/i2c/rt5645/rt5645.c 4 files changed, 155 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/81773/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/81773?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I602fcc4dd8576043943f6e20884edc4703350320 Gerrit-Change-Number: 81773 Gerrit-PatchSet: 2 Gerrit-Owner: Jianeng Ceng <cengjianeng(a)huaqin.corp-partner.google.com> Gerrit-MessageType: newpatchset

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