Attention is currently required from: Nico Huber.
Keith Hui has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81883?usp=email )
Change subject: superio/nuvoton/nct6779d: Add power_on_after_fail support
......................................................................
Patch Set 1:
(2 comments)
Patchset:
PS1:
> We could also make it a common function for Nuvoton SIOs?
Yes, this as far as I can see can be shared among at least 3 nuvoton SIOs. Will investigate. May even expand this patch as such.
File src/superio/nuvoton/nct6779d/superio.c:
https://review.coreboot.org/c/coreboot/+/81883/comment/38848d20_a46a7620 :
PS1, Line 37: */
> Same for the `cmos.layout` in case it's used. Not sure if it's worth that […]
Heh, I tend to optimize for runtime code size. However, this is defined at src/mainboard/Kconfig and hopefully no one is going to change it.
Not sure if gcc can pick up on code like:
int b;
switch (a) {
case 0: b=0; break;
case 1: b=1; break;
case 2: b=2; break;
default:
}
(which is essentially what nct5572d does)
and optimize it to something more reasonable, such as my code.
--
To view, visit https://review.coreboot.org/c/coreboot/+/81883?usp=email
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: Ia08cf8daac971397e832996ed364d41e9e7b1c5d
Gerrit-Change-Number: 81883
Gerrit-PatchSet: 1
Gerrit-Owner: Keith Hui <buurin(a)gmail.com>
Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Nico Huber <nico.h(a)gmx.de>
Gerrit-Comment-Date: Sat, 13 Apr 2024 22:53:03 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de>
Gerrit-MessageType: comment
Attention is currently required from: Fabian Groffen, Keith Hui.
Keith Hui has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75145?usp=email )
Change subject: mb/asus/p8z77-m: Drop GPIO by I/O
......................................................................
Patch Set 4: Code-Review+2
--
To view, visit https://review.coreboot.org/c/coreboot/+/75145?usp=email
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I22654f3c77082bf163ab7000ec467ab7085a0534
Gerrit-Change-Number: 75145
Gerrit-PatchSet: 4
Gerrit-Owner: Fabian Groffen <grobian(a)gentoo.org>
Gerrit-Reviewer: Keith Hui <buurin(a)gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
Gerrit-Attention: Keith Hui <buurin(a)gmail.com>
Gerrit-Attention: Fabian Groffen <grobian(a)gentoo.org>
Gerrit-Comment-Date: Sat, 13 Apr 2024 22:42:09 +0000
Gerrit-HasComments: No
Gerrit-Has-Labels: Yes
Gerrit-MessageType: comment
Attention is currently required from: Fabian Groffen, Keith Hui.
Keith Hui has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75144?usp=email )
Change subject: mb/asus/p8z77-m: Disable WDT1
......................................................................
Patch Set 4: Code-Review+2
--
To view, visit https://review.coreboot.org/c/coreboot/+/75144?usp=email
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: Ie33c219eae60f55d272b261480283a02c2d502e5
Gerrit-Change-Number: 75144
Gerrit-PatchSet: 4
Gerrit-Owner: Fabian Groffen <grobian(a)gentoo.org>
Gerrit-Reviewer: Keith Hui <buurin(a)gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
Gerrit-Attention: Keith Hui <buurin(a)gmail.com>
Gerrit-Attention: Fabian Groffen <grobian(a)gentoo.org>
Gerrit-Comment-Date: Sat, 13 Apr 2024 22:41:47 +0000
Gerrit-HasComments: No
Gerrit-Has-Labels: Yes
Gerrit-MessageType: comment
Attention is currently required from: Fabian Groffen, Keith Hui, Paul Menzel.
Keith Hui has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75142?usp=email )
Change subject: mb/asus/p8z77-m: Squelch PNP error about 2e.b irq 70
......................................................................
Patch Set 4: Code-Review+2
--
To view, visit https://review.coreboot.org/c/coreboot/+/75142?usp=email
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I2231afd67031c963045b6e7930d239368c723aa5
Gerrit-Change-Number: 75142
Gerrit-PatchSet: 4
Gerrit-Owner: Fabian Groffen <grobian(a)gentoo.org>
Gerrit-Reviewer: Keith Hui <buurin(a)gmail.com>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
Gerrit-Attention: Keith Hui <buurin(a)gmail.com>
Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Attention: Fabian Groffen <grobian(a)gentoo.org>
Gerrit-Comment-Date: Sat, 13 Apr 2024 22:41:36 +0000
Gerrit-HasComments: No
Gerrit-Has-Labels: Yes
Gerrit-MessageType: comment
Attention is currently required from: Fabian Groffen, Keith Hui.
Keith Hui has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75139?usp=email )
Change subject: mb/asus/p8z77-m: Disable deep sleep
......................................................................
Patch Set 4: Code-Review+2
--
To view, visit https://review.coreboot.org/c/coreboot/+/75139?usp=email
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I660f2efebf197df055ee7b9c349e4c2b64bda6cf
Gerrit-Change-Number: 75139
Gerrit-PatchSet: 4
Gerrit-Owner: Fabian Groffen <grobian(a)gentoo.org>
Gerrit-Reviewer: Keith Hui <buurin(a)gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
Gerrit-Attention: Keith Hui <buurin(a)gmail.com>
Gerrit-Attention: Fabian Groffen <grobian(a)gentoo.org>
Gerrit-Comment-Date: Sat, 13 Apr 2024 22:41:10 +0000
Gerrit-HasComments: No
Gerrit-Has-Labels: Yes
Gerrit-MessageType: comment
Attention is currently required from: Fabian Groffen, Keith Hui, Paul Menzel.
Keith Hui has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75138?usp=email )
Change subject: mb/asus/p8z77-m: Enable Port 80 UART
......................................................................
Patch Set 4: Code-Review+2
--
To view, visit https://review.coreboot.org/c/coreboot/+/75138?usp=email
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: Iebd433e2762a69241257e1b4f859319536a8d8f5
Gerrit-Change-Number: 75138
Gerrit-PatchSet: 4
Gerrit-Owner: Fabian Groffen <grobian(a)gentoo.org>
Gerrit-Reviewer: Keith Hui <buurin(a)gmail.com>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
Gerrit-Attention: Keith Hui <buurin(a)gmail.com>
Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Attention: Fabian Groffen <grobian(a)gentoo.org>
Gerrit-Comment-Date: Sat, 13 Apr 2024 22:40:40 +0000
Gerrit-HasComments: No
Gerrit-Has-Labels: Yes
Gerrit-MessageType: comment
Keith Hui has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81888?usp=email )
Change subject: mb/packardbell/ms2290: Correct header included
......................................................................
mb/packardbell/ms2290: Correct header included
It uses ibexpeak southbridge and should include its pch.h,
not bd82x6x's.
TEST=Timeless binary did not change.
Change-Id: Iafa83b7f3c1cd2d8ab9af51aa331ca673d9a66df
Signed-off-by: Keith Hui <buurin(a)gmail.com>
---
M src/mainboard/packardbell/ms2290/mainboard.c
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/81888/1
diff --git a/src/mainboard/packardbell/ms2290/mainboard.c b/src/mainboard/packardbell/ms2290/mainboard.c
index 855bbb3..07297aa 100644
--- a/src/mainboard/packardbell/ms2290/mainboard.c
+++ b/src/mainboard/packardbell/ms2290/mainboard.c
@@ -2,7 +2,7 @@
#include <device/device.h>
#include <northbridge/intel/ironlake/ironlake.h>
-#include <southbridge/intel/bd82x6x/pch.h>
+#include <southbridge/intel/ibexpeak/pch.h>
#include <ec/acpi/ec.h>
#include <drivers/intel/gma/int15.h>
#include <pc80/keyboard.h>
--
To view, visit https://review.coreboot.org/c/coreboot/+/81888?usp=email
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: Iafa83b7f3c1cd2d8ab9af51aa331ca673d9a66df
Gerrit-Change-Number: 81888
Gerrit-PatchSet: 1
Gerrit-Owner: Keith Hui <buurin(a)gmail.com>
Gerrit-MessageType: newchange
Attention is currently required from: Fabian Groffen, Felix Singer, Patrick Rudolph.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/77046?usp=email )
Change subject: mb/gigabyte/ga-h77m-d3h: Add Sandy/Ivy Bridge board GA-H77M-D3H
......................................................................
Patch Set 7:
(8 comments)
File src/mainboard/gigabyte/ga-h77m-d3h/acpi/mainboard.asl:
https://review.coreboot.org/c/coreboot/+/77046/comment/bc3f171b_39d211a6 :
PS7, Line 3: Scope (\_SB)
: {
: Device (PWRB)
: {
: Name (_HID, EisaId ("PNP0C0C"))
: }
: }
:
Does this also come from the B75 board? I remember checking the ACPI spec, and there's no reason to declare the power button in ASL unless it needs custom logic. So this file can also be removed.
File src/mainboard/gigabyte/ga-h77m-d3h/acpi/pci.asl:
https://review.coreboot.org/c/coreboot/+/77046/comment/e608032b_5a227387 :
PS7, Line 7: Name (_ADR, 0x001E0000)
> I admit copying this from ga-b75m-d3h. I have that board too, and assumed this would be ok/correct. […]
Then I would simply remove this file
File src/mainboard/gigabyte/ga-h77m-d3h/acpi/thermal.asl:
PS7:
> no, it's from the b75m variant with identical superio
I remember similar code caused ACPI errors for me on one of the H61 boards. I'd say it's best to remove it unless it can be tested.
File src/mainboard/gigabyte/ga-h77m-d3h/acpi_tables.c:
https://review.coreboot.org/c/coreboot/+/77046/comment/84d6c564_d52cb530 :
PS7, Line 10: gnvs->tpsv = PASSIVE_TEMPERATURE;
After removing `thermal.asl`, these values would no longer be used anywhere, so this entire can also be dropped.
File src/mainboard/gigabyte/ga-h77m-d3h/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/77046/comment/5081cc79_b4bcccc2 :
PS7, Line 5: subsystemid 0x1458 0x5000
> if you don't mind my asking, where is this inherited from? A git grep shows dozens of occurrences, […]
See this very file, two lines above this one.
File src/mainboard/gigabyte/ga-h77m-d3h/dsdt.asl:
https://review.coreboot.org/c/coreboot/+/77046/comment/5769f94f_484a01e2 :
PS7, Line 10: // OEM revision
> I created this port by adapting ga-b75m-d3h.
Still, it's most likely autoport copy-paste. I'd drop the comment anyway.
File src/mainboard/gigabyte/ga-h77m-d3h/early_init.c:
https://review.coreboot.org/c/coreboot/+/77046/comment/69f1543b_cc84aa00 :
PS7, Line 21: ite_reg_write(SIO_GPIO, 0x25, 0x40); // gpio pin function -> gp16
: ite_reg_write(SIO_GPIO, 0x27, 0x10); // gpio pin function -> gp34
: ite_reg_write(SIO_GPIO, 0x2c, 0x80); // smbus isolation on parallel port
: ite_reg_write(SIO_GPIO, 0x62, 0x0a); // simple iobase 0xa00
: ite_reg_write(SIO_GPIO, 0x72, 0x20); // watchdog timeout clear!
: ite_reg_write(SIO_GPIO, 0x73, 0x00); // watchdog timeout clear!
: ite_reg_write(SIO_GPIO, 0xcb, 0x00); // simple io set4 direction -> in
: ite_reg_write(SIO_GPIO, 0xe9, 0x27); // bus select disable
: ite_reg_write(SIO_GPIO, 0xf0, 0x10); // ?
: ite_reg_write(SIO_GPIO, 0xf1, 0x42); // ?
: ite_reg_write(SIO_GPIO, 0xf6, 0x1c); // hwmon alert beep -> gp36(pin12)
:
: /* EC SIO settings */
: ite_reg_write(IT8728F_EC, 0xf1, 0xc0);
: ite_reg_write(IT8728F_EC, 0xf6, 0xf0);
: ite_reg_write(IT8728F_EC, 0xf9, 0x48);
: ite_reg_write(IT8728F_EC, 0x60, 0x0a);
: ite_reg_write(IT8728F_EC, 0x61, 0x30);
: ite_reg_write(IT8728F_EC, 0x62, 0x0a);
: ite_reg_write(IT8728F_EC, 0x63, 0x20);
: ite_reg_write(IT8728F_EC, 0x30, 0x01);
Were these values copied as-is from the other board?
File src/mainboard/gigabyte/ga-h77m-d3h/gpio.c:
PS7:
Was this file copied as-is from the other board? I hope not, because bad GPIO configuration can break things...
If so, flash vendor firmware and run autoport to generate this file.
--
To view, visit https://review.coreboot.org/c/coreboot/+/77046?usp=email
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: Icb3e74326a0a7aaf770d1917a2a0931feadd7eab
Gerrit-Change-Number: 77046
Gerrit-PatchSet: 7
Gerrit-Owner: Fabian Groffen <grobian(a)gentoo.org>
Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de>
Gerrit-CC: Keith Hui <buurin(a)gmail.com>
Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com>
Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de>
Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com>
Gerrit-Attention: Fabian Groffen <grobian(a)gentoo.org>
Gerrit-Comment-Date: Sat, 13 Apr 2024 21:41:19 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com>
Comment-In-Reply-To: Fabian Groffen <grobian(a)gentoo.org>
Gerrit-MessageType: comment