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Hello Gwendal Grignou, Kapil Porwal, Paul Menzel, Paz Zcharya, Shelley Chen, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/80738?usp=email
to look at the new patch set (#11).
The following approvals got outdated and were removed:
Verified+1 by build bot (Jenkins)
Change subject: vc/google/chromeos: Implement dynamic ChromeOS boot logo selection
......................................................................
vc/google/chromeos: Implement dynamic ChromeOS boot logo selection
* Introduces logic to display context-specific boot splash logos.
* Logo selection considers:
* Chromebook-Plus hardware compliance (using factory_config).
* VPD-based product segmentation (soft-branded vs. regular
chromebook).
* Default Chromebook logo as fallback for regular Chromebook.
This patch fixes the problem where existing logic was unable to pick
correct ChromeOS boot splash logo based on the product segmentation.
Relation between product segment and boot splash screen:
1. Chromebook-Plus Hard-branded device: Renders "cb_plus_logo.bmp" logo
2. Chromebook-Plus Soft-branded device: Renders "cb_plus_logo.bmp" logo
3. Regular Chromebook device: Renders "cb_logo.bmp"
BUG=b:324107408
TEST=Verified logo selection based on compliance and product
requirements.
Change-Id: I9bb1e868764738333977bd8c990bea4253c9d37b
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
---
M src/vendorcode/google/chromeos/chromeos.h
M src/vendorcode/google/chromeos/splash.c
M src/vendorcode/google/chromeos/tpm_factory_config.c
3 files changed, 50 insertions(+), 14 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/80738/11
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Jérémy Compostella has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80703?usp=email )
The change is no longer submittable: All-Comments-Resolved is unsatisfied now.
Change subject: cpu/x86/smm/smm_module_loader.c: Pass full SMRAM region info to SMM runtime
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/80703/comment/57d02b60_fa945103 :
PS2, Line 7: cpu/x86/smm/smm_module_loader.c: Pass full SMRAM region info to SMM runtime
I would suggest something like:
`cpu/x86/smm: Pass full SMRAM region info to SMM runtime`
This prefix is generally to give an idea of the sub-tree being touched. The modified filename is not necessary IMO and makes the headline unnecessarily long. git provides the details of which files are modified anyway.
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Change subject: arch/x86/car.ld: Move FSP RC heap region into car_region
......................................................................
Patch Set 1:
(1 comment)
File src/arch/x86/car.ld:
https://review.coreboot.org/c/coreboot/+/80810/comment/55ae4a8c_7b1d7631 :
PS1, Line 11: #if CONFIG_FSP_M_RC_HEAP_SIZE > 0
I believe that I introduced a cbfstool change a while back which allow empty regions. My point is you should not need this `#if`
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Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/80804?usp=email )
Change subject: acpi/acpigen_pci_root_resource_producer: zero-pad ranges
......................................................................
acpi/acpigen_pci_root_resource_producer: zero-pad ranges
Print bus number, IO and MMIO ranges as fixed length zero-padded
hexadecimal numbers. The bus numbers are 1 byte long, the IO range
values are 2 bytes long and the MMIO range values can be up to 8 bytes
long, so use '%02x', '%04llx' and '%016llx' in the corresponding parts
of the format string.
Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de>
Suggested-by: Patrick Rudolph <patrick.rudolph(a)9elements.com>
Change-Id: Iea45094a3988d57f8640a98fd7214d33ed1d7ccb
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80804
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com>
---
M src/acpi/acpigen_pci_root_resource_producer.c
1 file changed, 3 insertions(+), 3 deletions(-)
Approvals:
Matt DeVillier: Looks good to me, approved
build bot (Jenkins): Verified
diff --git a/src/acpi/acpigen_pci_root_resource_producer.c b/src/acpi/acpigen_pci_root_resource_producer.c
index c9efe0e..78e1a89 100644
--- a/src/acpi/acpigen_pci_root_resource_producer.c
+++ b/src/acpi/acpigen_pci_root_resource_producer.c
@@ -11,7 +11,7 @@
static void write_ssdt_domain_io_producer_range_helper(const char *domain_name,
resource_t base, resource_t limit)
{
- printk(BIOS_DEBUG, "%s _CRS: adding IO range [%llx-%llx]\n", domain_name, base, limit);
+ printk(BIOS_DEBUG, "%s _CRS: adding IO range [%04llx-%04llx]\n", domain_name, base, limit);
acpigen_resource_producer_io(base, limit);
}
@@ -38,7 +38,7 @@
static void write_ssdt_domain_mmio_producer_range(const char *domain_name,
resource_t base, resource_t limit)
{
- printk(BIOS_DEBUG, "%s _CRS: adding MMIO range [%llx-%llx]\n",
+ printk(BIOS_DEBUG, "%s _CRS: adding MMIO range [%016llx-%016llx]\n",
domain_name, base, limit);
acpigen_resource_producer_mmio(base, limit,
MEM_RSRC_FLAG_MEM_READ_WRITE | MEM_RSRC_FLAG_MEM_ATTR_NON_CACHE);
@@ -54,7 +54,7 @@
acpigen_write_resourcetemplate_header();
/* PCI bus number range in domain */
- printk(BIOS_DEBUG, "%s _CRS: adding busses [%x-%x] in segment group %x\n",
+ printk(BIOS_DEBUG, "%s _CRS: adding busses [%02x-%02x] in segment group %x\n",
acpi_device_name(domain), domain->downstream->secondary,
domain->downstream->max_subordinate, domain->downstream->segment_group);
acpigen_resource_producer_bus_number(domain->downstream->secondary,
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Change subject: mb/system76/rpl: Add TCSS ACPI for all boards
......................................................................
Patch Set 1: Code-Review+2
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Change subject: mb/system76/adl,rpl: Add 50ms timeout for PCIe 3.0 RPs
......................................................................
Patch Set 4: Code-Review+2
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Change subject: mb/system76/adl: Remove duplicate PchHdaAudioLinkHdaEnable
......................................................................
Patch Set 1: Code-Review+2
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Change subject: mb/system76/adl,rpl: Enable PchHdaSdiEnable
......................................................................
Patch Set 1: Code-Review+2
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Change subject: drivers/vpd: Add vpd_get_feature_level() API
......................................................................
Patch Set 1:
(1 comment)
File src/drivers/vpd/vpd_device_feature.c:
https://review.coreboot.org/c/coreboot/+/80805/comment/21f165ec_003d371e :
PS1, Line 10: static char device_info[VPD_FEATURE_DEVICE_INFO_LEN];
> > > Could |device_info| be in the stack and give as an argument to the function? The function is cal […]
Acknowledged
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