coreboot-gerrit March 2024

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[S] Change in coreboot[main]: soc/rockchip: Remove blank lines before '}' and after '{'
by Elyes Haouas (Code Review) 23 Mar '24

23 Mar '24

Elyes Haouas has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81459?usp=email ) Change subject: soc/rockchip: Remove blank lines before '}' and after '{' ...................................................................... soc/rockchip: Remove blank lines before '}' and after '{' Change-Id: I140daa5b862ffd3a5b5468d7cb9dbdd81426855e Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M src/soc/rockchip/common/edp.c M src/soc/rockchip/common/vop.c M src/soc/rockchip/rk3288/clock.c M src/soc/rockchip/rk3288/sdram.c 4 files changed, 0 insertions(+), 10 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/81459/1 diff --git a/src/soc/rockchip/common/edp.c b/src/soc/rockchip/common/edp.c index 422b306..4fbe0d6 100644 --- a/src/soc/rockchip/common/edp.c +++ b/src/soc/rockchip/common/edp.c @@ -147,7 +147,6 @@ } while (!stopwatch_expired(&sw)); return -1; - } static int rk_edp_is_aux_reply(struct rk_edp *edp) @@ -213,7 +212,6 @@ while (length) { len = MIN(length, 16); for (try_times = 0; try_times < 10; try_times++) { - /* Clear AUX CH data buffer */ val = BUF_CLR; write32(&edp->regs->buf_data_ctl, val); @@ -251,7 +249,6 @@ break; else printk(BIOS_WARNING, "read dpcd Aux Transaction fail!\n"); - } if (retval) @@ -629,7 +626,6 @@ return -1; } return 0; - } static int rk_edp_select_i2c_device(struct rk_edp *edp, diff --git a/src/soc/rockchip/common/vop.c b/src/soc/rockchip/common/vop.c index 5674339..b1b76d7 100644 --- a/src/soc/rockchip/common/vop.c +++ b/src/soc/rockchip/common/vop.c @@ -94,7 +94,6 @@ struct rockchip_vop_regs *preg = vop_regs[vop_id]; switch (mode) { - case VOP_MODE_HDMI: clrsetbits32(&preg->sys_ctrl, M_ALL_OUT_EN, V_HDMI_OUT_EN(1)); diff --git a/src/soc/rockchip/rk3288/clock.c b/src/soc/rockchip/rk3288/clock.c index 5b1350a..c3a9ac2 100644 --- a/src/soc/rockchip/rk3288/clock.c +++ b/src/soc/rockchip/rk3288/clock.c @@ -304,7 +304,6 @@ write32(&cru_ptr->cru_mode_con, RK_CLRSETBITS(GPLL_MODE_MSK, GPLL_MODE_NORM) | RK_CLRSETBITS(CPLL_MODE_MSK, CPLL_MODE_NORM)); - } void rkclk_configure_cpu(enum apll_frequencies apll_freq) @@ -665,5 +664,4 @@ default: return -1; /* Should never happen. */ } - } diff --git a/src/soc/rockchip/rk3288/sdram.c b/src/soc/rockchip/rk3288/sdram.c index 2efe19b..0237ca2 100644 --- a/src/soc/rockchip/rk3288/sdram.c +++ b/src/soc/rockchip/rk3288/sdram.c @@ -683,7 +683,6 @@ for (i = 0; i < 4; i++) clrbits32(&ddr_publ_regs->datx8[i].dxgcr, DQSRTT | DQRTT); - } } @@ -798,7 +797,6 @@ DXDLLCR_DLLSRST); } setbits32(&ddr_pctl_regs->dfistcfg0, 1 << 2); - } static int data_training(u32 channel, @@ -1074,7 +1072,6 @@ u32 ch; if (!size_mb) { - u32 sys_reg = read32(&rk3288_pmu->sys_reg[2]); u32 ch_num = SYS_REG_DEC_NUM_CH(sys_reg); -- To view, visit https://review.coreboot.org/c/coreboot/+/81459?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I140daa5b862ffd3a5b5468d7cb9dbdd81426855e Gerrit-Change-Number: 81459 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

1 0

[S] Change in coreboot[main]: nb: Remove blank lines before '}' and after '{'
by Elyes Haouas (Code Review) 23 Mar '24

23 Mar '24

Elyes Haouas has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81458?usp=email ) Change subject: nb: Remove blank lines before '}' and after '{' ...................................................................... nb: Remove blank lines before '}' and after '{' Change-Id: Ia926daa46cba120bc659db8f3dd3df75b0e7ed44 Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M src/northbridge/amd/pi/00730F01/northbridge.c M src/northbridge/intel/e7505/raminit.c M src/northbridge/intel/gm45/memmap.c M src/northbridge/intel/haswell/acpi.c M src/northbridge/intel/haswell/gma.c M src/northbridge/intel/i440bx/memmap.c M src/northbridge/intel/i440bx/raminit.c M src/northbridge/intel/i945/early_init.c M src/northbridge/intel/i945/gma.c M src/northbridge/intel/i945/raminit.c M src/northbridge/intel/i945/rcven.c M src/northbridge/intel/ironlake/northbridge.c M src/northbridge/intel/ironlake/raminit.c M src/northbridge/intel/pineview/memmap.c M src/northbridge/intel/sandybridge/raminit.c M src/northbridge/intel/sandybridge/raminit_common.c M src/northbridge/intel/sandybridge/raminit_mrc.c M src/northbridge/intel/sandybridge/raminit_native.c M src/northbridge/intel/x4x/raminit.c 19 files changed, 0 insertions(+), 45 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/81458/1 diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c index 430eeef..1be9421 100644 --- a/src/northbridge/amd/pi/00730F01/northbridge.c +++ b/src/northbridge/amd/pi/00730F01/northbridge.c @@ -241,7 +241,6 @@ } if (dev->path.type == DEVICE_PATH_PCI) { - if ((dev->upstream->secondary == 0x0) && (dev->path.pci.devfn == 0x0)) *root_level = depth; diff --git a/src/northbridge/intel/e7505/raminit.c b/src/northbridge/intel/e7505/raminit.c index 892bfad..444ab16 100644 --- a/src/northbridge/intel/e7505/raminit.c +++ b/src/northbridge/intel/e7505/raminit.c @@ -340,7 +340,6 @@ if (value > 2) die("Bad SPD value\n"); if (value == 2) { - pgsz.side2 = pgsz.side1; // Assume symmetric banks until we know differently value = smbus_read_byte(dimm_socket_address, SPD_NUM_COLUMNS); if (value < 0) @@ -413,14 +412,12 @@ struct dimm_size sz = sdram_spd_get_page_size(dimm_socket_address); if (sz.side1 > 0) { - value = smbus_read_byte(dimm_socket_address, SPD_NUM_ROWS); die_on_spd_error(value); sz.side1 += value & 0xf; if (sz.side2 > 0) { - // Double-sided DIMM if (value & 0xF0) sz.side2 += value >> 4; // Asymmetric @@ -496,7 +493,6 @@ // since we only support dual-channel. for (i = 0; i < MAX_DIMM_SOCKETS_PER_CHANNEL; i++) { - uint16_t channel0_dimm = ctrl->channel0[i]; uint16_t channel1_dimm = ctrl->channel1[i]; uint8_t bDualChannel = 1; @@ -565,7 +561,6 @@ // NOTE: unpopulated DIMMs cause read to fail spd_value = smbus_read_byte(channel1_dimm, SPD_MODULE_ATTRIBUTES); if (!(spd_value & MODULE_REGISTERED) || (spd_value < 0)) { - printk(BIOS_DEBUG, "Skipping un-matched DIMMs - only dual-channel operation supported\n"); continue; } @@ -580,7 +575,6 @@ if (!are_spd_values_equal (dual_channel_parameters[j], channel0_dimm, channel1_dimm)) { - bDualChannel = 0; break; } @@ -653,7 +647,6 @@ * Seems like rows 4-7 overlap with 0-3. */ for (i = 0; i < (MAX_NUM_CHANNELS * MAX_DIMM_SOCKETS_PER_CHANNEL); ++i) { - uint8_t dimm_end_64M_multiple = pci_read_config8(MCHDEV, DRB_ROW_0 + i); if (dimm_end_64M_multiple > dimm_start_64M_multiple) { @@ -800,7 +793,6 @@ pci_write_config32(MCHDEV, DRB_ROW_4, 0); for (i = 0; i < MAX_DIMM_SOCKETS_PER_CHANNEL; i++) { - uint16_t dimm_socket_address = ctrl->channel0[i]; struct dimm_size sz; @@ -1020,7 +1012,6 @@ uint32_t dimm_compatible_cas_latencies; for (i = 0; i < MAX_DIMM_SOCKETS; i++) { - uint16_t dimm_socket_address; if (!(dimm_mask & (1 << i))) @@ -1098,7 +1089,6 @@ dram_timing |= DRT_CAS_2_0; dram_read_timing |= 0x0222; } else if (system_compatible_cas_latencies & SPD_CAS_LATENCY_2_5) { - uint32_t dram_row_attributes = pci_read_config32(MCHDEV, DRA); @@ -1111,7 +1101,6 @@ && (dram_row_attributes & 0xff00) && (dram_row_attributes & 0xff0000) && (dram_row_attributes & 0xff000000)) { - // All slots populated dram_read_timing |= 0x0882; } else { @@ -1179,7 +1168,6 @@ */ for (i = 0; i < MAX_DIMM_SOCKETS; i++) { - uint32_t dimm_refresh_mode; int value; uint16_t dimm_socket_address; @@ -1250,7 +1238,6 @@ uint32_t row_attributes = 0; for (i = 0; i < MAX_DIMM_SOCKETS_PER_CHANNEL; i++) { - uint16_t dimm_socket_address = ctrl->channel0[i]; struct dimm_size page_size; struct dimm_size sdram_width; @@ -1300,7 +1287,6 @@ pci_write_config8(MCHDEV, 0x8e, 0xb0); for (i = 0; i < MAX_DIMM_SOCKETS_PER_CHANNEL; i++) { - uint8_t socket_mask = 1 << i; if (dimm_mask & socket_mask) @@ -1702,7 +1688,6 @@ /* If this is a warm boot, some initialisation can be skipped */ if (!e7505_mch_is_ready()) { - /* The real MCH initialisation. */ timestamp_add_now(TS_INITRAM_START); diff --git a/src/northbridge/intel/gm45/memmap.c b/src/northbridge/intel/gm45/memmap.c index 35ec41d..d036399 100644 --- a/src/northbridge/intel/gm45/memmap.c +++ b/src/northbridge/intel/gm45/memmap.c @@ -127,5 +127,4 @@ MTRR_TYPE_WRBACK); postcar_frame_add_mtrr(pcf, northbridge_get_tseg_base(), northbridge_get_tseg_size(), MTRR_TYPE_WRBACK); - } diff --git a/src/northbridge/intel/haswell/acpi.c b/src/northbridge/intel/haswell/acpi.c index 8d179aa..f3c107b 100644 --- a/src/northbridge/intel/haswell/acpi.c +++ b/src/northbridge/intel/haswell/acpi.c @@ -36,7 +36,6 @@ /* VTVC0BAR has to be set, enabled, and in 32-bit space */ if (vtvc0bar && vtvc0en && !mchbar_read32(VTVC0BAR + 4)) { - const unsigned long tmp = current; current += acpi_create_dmar_drhd(current, DRHD_INCLUDE_PCI_ALL, 0, vtvc0bar); current += acpi_create_dmar_ds_ioapic_from_hw(current, IO_APIC_ADDR, diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c index 48a0ba5..9e9f980 100644 --- a/src/northbridge/intel/haswell/gma.c +++ b/src/northbridge/intel/haswell/gma.c @@ -124,7 +124,6 @@ u32 val; val = read32(res2mmio(gtt_res, reg, 0)); return val; - } void gtt_write(u32 reg, u32 data) diff --git a/src/northbridge/intel/i440bx/memmap.c b/src/northbridge/intel/i440bx/memmap.c index 5cee1b4..204e83b 100644 --- a/src/northbridge/intel/i440bx/memmap.c +++ b/src/northbridge/intel/i440bx/memmap.c @@ -59,5 +59,4 @@ top_of_ram = (uintptr_t)cbmem_top(); postcar_frame_add_mtrr(pcf, top_of_ram - 8*MiB, 8*MiB, MTRR_TYPE_WRBACK); - } diff --git a/src/northbridge/intel/i440bx/raminit.c b/src/northbridge/intel/i440bx/raminit.c index ec93563..54c1b36 100644 --- a/src/northbridge/intel/i440bx/raminit.c +++ b/src/northbridge/intel/i440bx/raminit.c @@ -755,7 +755,6 @@ /* This is 440BX! We do EDO too! */ if (value == SPD_MEMORY_TYPE_EDO || value == SPD_MEMORY_TYPE_SDRAM) { - if (value == SPD_MEMORY_TYPE_EDO) { edo = 1; } else if (value == SPD_MEMORY_TYPE_SDRAM) { diff --git a/src/northbridge/intel/i945/early_init.c b/src/northbridge/intel/i945/early_init.c index d61949f..eea2028 100644 --- a/src/northbridge/intel/i945/early_init.c +++ b/src/northbridge/intel/i945/early_init.c @@ -290,7 +290,6 @@ printk(BIOS_DEBUG, "timeout!\n"); else printk(BIOS_DEBUG, "ok\n"); - } static void ich7_setup_dmi_rcrb(void) diff --git a/src/northbridge/intel/i945/gma.c b/src/northbridge/intel/i945/gma.c index d99a733..5cbd629 100644 --- a/src/northbridge/intel/i945/gma.c +++ b/src/northbridge/intel/i945/gma.c @@ -537,7 +537,6 @@ vga_sr_write(1, vga_sr_read(1) & ~0x20); return 0; - } /* compare the header of the vga edid header */ diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c index 2613b81..a37754b 100644 --- a/src/northbridge/intel/i945/raminit.c +++ b/src/northbridge/intel/i945/raminit.c @@ -49,7 +49,6 @@ return sysinfo->spd_addresses[device]; else return 0x50 + device; - } static __attribute__((noinline)) void do_ram_command(u32 command) @@ -226,7 +225,6 @@ /* Write back clears bit 2 */ pci_write_config8(PCI_DEV(0, 0x1f, 0), GEN_PMCON_2, reg8); do_reset = true; - } if (reg8 & (1 << 7)) { @@ -289,7 +287,6 @@ */ static void gather_common_timing(struct sys_info *sysinfo, struct timings *saved_timings) { - int i, j; u8 raw_spd[SPD_SIZE_MAX_DDR2]; u8 dimm_mask = 0; @@ -2313,7 +2310,6 @@ static void sdram_thermal_management(void) { - mchbar_write8(TCO1, 0); mchbar_write8(TCO0, 0); diff --git a/src/northbridge/intel/i945/rcven.c b/src/northbridge/intel/i945/rcven.c index 7d497e6..024a263 100644 --- a/src/northbridge/intel/i945/rcven.c +++ b/src/northbridge/intel/i945/rcven.c @@ -83,7 +83,6 @@ reg32 |= medium; } mchbar_write32(RCVENMT, reg32); - } static int normalize(int channel_offset, u8 *mediumcoarse, u8 *fine) @@ -190,7 +189,6 @@ continue; break; - } printk(BIOS_DEBUG, "Could not find low strobe\n"); @@ -200,7 +198,6 @@ static int find_strobes_edge(int channel_offset, u8 *mediumcoarse, u8 *fine, struct sys_info *sysinfo) { - int counter; u32 rcvenmt; diff --git a/src/northbridge/intel/ironlake/northbridge.c b/src/northbridge/intel/ironlake/northbridge.c index e6bc375..d8c8799 100644 --- a/src/northbridge/intel/ironlake/northbridge.c +++ b/src/northbridge/intel/ironlake/northbridge.c @@ -168,7 +168,6 @@ const struct device *const d0f0 = pcidev_on_root(0, 0); if (d0f0) pci_update_config32(d0f0, DEVEN, deven_mask, 0); - } static struct device_operations mc_ops = { diff --git a/src/northbridge/intel/ironlake/raminit.c b/src/northbridge/intel/ironlake/raminit.c index b84461a..b262097 100644 --- a/src/northbridge/intel/ironlake/raminit.c +++ b/src/northbridge/intel/ironlake/raminit.c @@ -1552,7 +1552,6 @@ rank), 9) + (i == 1) * 11; // !!!! } - } static u32 get_etalon2(int flip, u32 addr) @@ -2759,7 +2758,6 @@ timings); totalrank++; } - } } else { for (reg_178 = reg178_center - 12; diff --git a/src/northbridge/intel/pineview/memmap.c b/src/northbridge/intel/pineview/memmap.c index 55d7046..967a59f 100644 --- a/src/northbridge/intel/pineview/memmap.c +++ b/src/northbridge/intel/pineview/memmap.c @@ -76,7 +76,6 @@ uintptr_t cbmem_top_chipset(void) { return ALIGN_DOWN(northbridge_get_tseg_base(), 4 * MiB); - } void smm_region(uintptr_t *start, size_t *size) diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c index 085292b..2b59b9e 100644 --- a/src/northbridge/intel/sandybridge/raminit.c +++ b/src/northbridge/intel/sandybridge/raminit.c @@ -377,7 +377,6 @@ /* Before reusing training data, assert that the CPU has not been replaced */ if (ctrl_cached && cpuid != ctrl_cached->cpu) { - /* It is not really worrying on a cold boot, but fatal when resuming from S3 */ printk(s3resume ? BIOS_ALERT : BIOS_NOTICE, "CPUID %x differs from stored CPUID %x, CPU was replaced!\n", diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c index 2e49675..e949189 100644 --- a/src/northbridge/intel/sandybridge/raminit_common.c +++ b/src/northbridge/intel/sandybridge/raminit_common.c @@ -64,7 +64,6 @@ valid_dimms = 0; FOR_ALL_CHANNELS for (slot = 0; slot < 2; slot++) { - const struct dimm_attr_ddr3_st *dimm = &dimms->dimm[channel][slot]; if (dimm->dram_type != SPD_MEMORY_TYPE_SDRAM_DDR3) continue; @@ -1138,7 +1137,6 @@ int lane, i; for (rcven_delta = -25; rcven_delta <= 25; rcven_delta++) { - FOR_ALL_LANES { ctrl->timings[channel][slotrank].lanes[lane].rcven = upperA[lane] + rcven_delta + QCLK_PI; @@ -1358,7 +1356,6 @@ FOR_ALL_LANES { ctrl->timings[channel][slotrank].lanes[lane].rcven -= QCLK_PI; upperA[lane] -= QCLK_PI; - } } else if (some_high) { ctrl->timings[channel][slotrank].roundtrip_latency++; @@ -1657,7 +1654,6 @@ fill_pattern1(ctrl, channel); } FOR_ALL_POPULATED_CHANNELS FOR_ALL_POPULATED_RANKS { - /* Reset read and write WDB pointers */ mchbar_write32(IOSAV_DATA_CTL_ch(channel), 0x10001); @@ -2501,7 +2497,6 @@ upper[channel][slotrank][lane] = MIN(rn.end - ctrl->tx_dq_offset[i], upper[channel][slotrank][lane]); - } } } @@ -2621,7 +2616,6 @@ rowsize = 1 << ctrl->info.dimm[channel][slotrank >> 1].row_bits; for (bank = 0; bank < 8; bank++) { for (row = 0; row < rowsize; row += 16) { - u8 gap = MAX((ctrl->tFAW >> 2) + 1, ctrl->tRRD); const struct iosav_ssq sequence[] = { /* diff --git a/src/northbridge/intel/sandybridge/raminit_mrc.c b/src/northbridge/intel/sandybridge/raminit_mrc.c index 82e3e82..cad86ba 100644 --- a/src/northbridge/intel/sandybridge/raminit_mrc.c +++ b/src/northbridge/intel/sandybridge/raminit_mrc.c @@ -295,7 +295,6 @@ case 800: pei_data->max_ddr3_freq = 1600; break; - } /* diff --git a/src/northbridge/intel/sandybridge/raminit_native.c b/src/northbridge/intel/sandybridge/raminit_native.c index fbdc27a..ecae91b 100644 --- a/src/northbridge/intel/sandybridge/raminit_native.c +++ b/src/northbridge/intel/sandybridge/raminit_native.c @@ -274,7 +274,6 @@ /* If non-zero, it was set in the devicetree */ if (cfg->max_mem_clock_mhz) { - if (cfg->max_mem_clock_mhz >= 1066) return TCK_1066MHZ; diff --git a/src/northbridge/intel/x4x/raminit.c b/src/northbridge/intel/x4x/raminit.c index b4366fb..3149074 100644 --- a/src/northbridge/intel/x4x/raminit.c +++ b/src/northbridge/intel/x4x/raminit.c @@ -147,7 +147,6 @@ dram_print_spd_ddr2(&decoded_dimm); if (!(decoded_dimm.width & (0x08 | 0x10))) { - printk(BIOS_ERR, "DIMM%d Unsupported width: x%d. Disabling dimm\n", dimm_idx, s->dimms[dimm_idx].width); return CB_ERR; @@ -523,7 +522,6 @@ } printk(BIOS_DEBUG, " Config[CH%d] : %d\n", chan, s->dimm_config[chan]); } - } static void checkreset_ddr2(int boot_path) -- To view, visit https://review.coreboot.org/c/coreboot/+/81458?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia926daa46cba120bc659db8f3dd3df75b0e7ed44 Gerrit-Change-Number: 81458 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

1 0

[S] Change in coreboot[main]: soc/amd: Remove blank lines before '}' and after '{'
by Elyes Haouas (Code Review) 23 Mar '24

23 Mar '24

Elyes Haouas has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81457?usp=email ) Change subject: soc/amd: Remove blank lines before '}' and after '{' ...................................................................... soc/amd: Remove blank lines before '}' and after '{' Change-Id: I0203e77dd23fa026cd252abbda50f1e9f6892721 Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M src/soc/amd/common/block/acpi/ivrs.c M src/soc/amd/common/block/lpc/espi_util.c M src/soc/amd/common/fsp/dmi.c M src/soc/amd/common/pi/agesawrapper.c M src/soc/amd/common/pi/heapmanager.c M src/soc/amd/genoa_poc/early_fch.c M src/soc/amd/glinda/psp_verstage/svc.c M src/soc/amd/mendocino/fsp_s_params.c M src/soc/amd/mendocino/psp_verstage/svc.c M src/soc/amd/phoenix/psp_verstage/svc.c M src/soc/amd/picasso/acpi_crat.c 11 files changed, 0 insertions(+), 15 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/81457/1 diff --git a/src/soc/amd/common/block/acpi/ivrs.c b/src/soc/amd/common/block/acpi/ivrs.c index 74c5c39..a2f7715 100644 --- a/src/soc/amd/common/block/acpi/ivrs.c +++ b/src/soc/amd/common/block/acpi/ivrs.c @@ -131,7 +131,6 @@ } else if ((header_type == PCI_HEADER_TYPE_NORMAL) && !is_pcie) { /* Device is legacy PCI or PCI-X */ add_ivhd_dev_entry(parent, dev, current, IVHD_DEV_8_BYTE_ALIAS_SELECT, 0x0); - } } @@ -316,7 +315,6 @@ ivhd = &ivrs->ivhd; while ((dev = dev_find_path(dev, DEVICE_PATH_DOMAIN)) != NULL) { - nb_dev = pcidev_path_behind(dev->downstream, PCI_DEVFN(0, 0)); iommu_dev = pcidev_path_behind(dev->downstream, PCI_DEVFN(0, 2)); if (!nb_dev) { diff --git a/src/soc/amd/common/block/lpc/espi_util.c b/src/soc/amd/common/block/lpc/espi_util.c index c0f2354..f05575a 100644 --- a/src/soc/amd/common/block/lpc/espi_util.c +++ b/src/soc/amd/common/block/lpc/espi_util.c @@ -317,7 +317,6 @@ } return -1; - } static size_t espi_get_mmio_window_size(int idx) @@ -824,7 +823,6 @@ printk(BIOS_ERR, "Channel is not ready after %d usec (slave addr: 0x%x)\n", ESPI_CH_READY_TIMEOUT_US, slave_reg_addr); return CB_ERR; - } static void espi_enable_ctrlr_channel(uint32_t channel_en) diff --git a/src/soc/amd/common/fsp/dmi.c b/src/soc/amd/common/fsp/dmi.c index d0d9873..d132590 100644 --- a/src/soc/amd/common/fsp/dmi.c +++ b/src/soc/amd/common/fsp/dmi.c @@ -23,7 +23,6 @@ */ static uint16_t ddr_speed_mhz_to_reported_mts(uint16_t ddr_type, uint16_t speed) { - if (CONFIG(USE_DDR4) && ddr_type == MEMORY_TYPE_DDR4) return ddr4_speed_mhz_to_reported_mts(speed); else if (CONFIG(USE_LPDDR4) && ddr_type == MEMORY_TYPE_LPDDR4) diff --git a/src/soc/amd/common/pi/agesawrapper.c b/src/soc/amd/common/pi/agesawrapper.c index beae4ba..8ad1e0e 100644 --- a/src/soc/amd/common/pi/agesawrapper.c +++ b/src/soc/amd/common/pi/agesawrapper.c @@ -387,7 +387,6 @@ default: return AGESA_UNSUPPORTED; } - } AGESA_STATUS agesa_execute_state(AGESA_STRUCT_NAME func) diff --git a/src/soc/amd/common/pi/heapmanager.c b/src/soc/amd/common/pi/heapmanager.c index 154f04d..34a4837 100644 --- a/src/soc/amd/common/pi/heapmanager.c +++ b/src/soc/amd/common/pi/heapmanager.c @@ -236,7 +236,6 @@ * betterfit than the previous nodes */ if (BestFitNodeSize > FreedNodeSize) { - BestFitNodeOffset = FreedNodeOffset; BestFitPrevNodeOffset = @@ -308,7 +307,6 @@ AGESA_STATUS agesa_DeallocateBuffer(uint32_t Func, uintptr_t Data, void *ConfigPtr) { - uint8_t *BiosHeapBaseAddr; uint32_t AllocNodeOffset; uint32_t PrevNodeOffset; @@ -436,5 +434,4 @@ } return Status; - } diff --git a/src/soc/amd/genoa_poc/early_fch.c b/src/soc/amd/genoa_poc/early_fch.c index e134f49..d82ebcb 100644 --- a/src/soc/amd/genoa_poc/early_fch.c +++ b/src/soc/amd/genoa_poc/early_fch.c @@ -30,5 +30,4 @@ /* After console init */ void fch_early_init(void) { - } diff --git a/src/soc/amd/glinda/psp_verstage/svc.c b/src/soc/amd/glinda/psp_verstage/svc.c index 293bf46..d533d8f 100644 --- a/src/soc/amd/glinda/psp_verstage/svc.c +++ b/src/soc/amd/glinda/psp_verstage/svc.c @@ -183,7 +183,6 @@ }; SVC_CALL2(SVC_VERSTAGE_CMD, CMD_MODEXP, (void *)&param, retval); return retval; - } uint32_t svc_ccp_dma(uint32_t spi_rom_offset, void *dest, uint32_t size) diff --git a/src/soc/amd/mendocino/fsp_s_params.c b/src/soc/amd/mendocino/fsp_s_params.c index e1eff32..8374fb3 100644 --- a/src/soc/amd/mendocino/fsp_s_params.c +++ b/src/soc/amd/mendocino/fsp_s_params.c @@ -19,7 +19,6 @@ scfg->vbios_buffer = 0; printk(BIOS_SPEW, "%s: using VBIOS cache; skipping GOP driver.\n", __func__); return; - } printk(BIOS_SPEW, "%s: not using VBIOS cache; running GOP driver.\n", __func__); scfg->vbios_buffer = CONFIG(RUN_FSP_GOP) ? PCI_VGA_RAM_IMAGE_START : 0; diff --git a/src/soc/amd/mendocino/psp_verstage/svc.c b/src/soc/amd/mendocino/psp_verstage/svc.c index 53d1751..0c6fb5e 100644 --- a/src/soc/amd/mendocino/psp_verstage/svc.c +++ b/src/soc/amd/mendocino/psp_verstage/svc.c @@ -191,7 +191,6 @@ }; SVC_CALL2(SVC_VERSTAGE_CMD, CMD_MODEXP, (void *)&param, retval); return retval; - } uint32_t svc_ccp_dma(uint32_t spi_rom_offset, void *dest, uint32_t size) diff --git a/src/soc/amd/phoenix/psp_verstage/svc.c b/src/soc/amd/phoenix/psp_verstage/svc.c index 45d18c1..6f08678 100644 --- a/src/soc/amd/phoenix/psp_verstage/svc.c +++ b/src/soc/amd/phoenix/psp_verstage/svc.c @@ -181,7 +181,6 @@ }; SVC_CALL2(SVC_VERSTAGE_CMD, CMD_MODEXP, (void *)&param, retval); return retval; - } uint32_t svc_ccp_dma(uint32_t spi_rom_offset, void *dest, uint32_t size) diff --git a/src/soc/amd/picasso/acpi_crat.c b/src/soc/amd/picasso/acpi_crat.c index e528515..bcc3901 100644 --- a/src/soc/amd/picasso/acpi_crat.c +++ b/src/soc/amd/picasso/acpi_crat.c @@ -372,7 +372,6 @@ new_entries = 0; for (thread = 0; thread < total_num_threads; thread++) { - /* L1 data TLB */ if (thread % num_threads_sharing0 == 0) { current = add_crat_tlb_entry(&tlb_affinity, current); -- To view, visit https://review.coreboot.org/c/coreboot/+/81457?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0203e77dd23fa026cd252abbda50f1e9f6892721 Gerrit-Change-Number: 81457 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

1 0

[XS] Change in coreboot[main]: lib: Remove blank lines before '}' and after '{'
by Elyes Haouas (Code Review) 23 Mar '24

23 Mar '24

Elyes Haouas has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81456?usp=email ) Change subject: lib: Remove blank lines before '}' and after '{' ...................................................................... lib: Remove blank lines before '}' and after '{' Change-Id: I94ee6bf38ecfcb620255a5a44edb2543fb519736 Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M src/lib/coreboot_table.c M src/lib/edid.c M src/lib/hardwaremain.c M src/lib/memrange.c M src/lib/region_file.c M src/lib/stack.c 6 files changed, 0 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/81456/1 diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c index d93ba01..d7b6126 100644 --- a/src/lib/coreboot_table.c +++ b/src/lib/coreboot_table.c @@ -387,7 +387,6 @@ rec->size = ALIGN_UP(sizeof(*rec) + len + 1, LB_ENTRY_ALIGN); memcpy(rec->string, strings[i].string, len+1); } - } static void lb_record_version_timestamp(struct lb_header *header) diff --git a/src/lib/edid.c b/src/lib/edid.c index 06b9cee..c294a3f 100644 --- a/src/lib/edid.c +++ b/src/lib/edid.c @@ -1389,7 +1389,6 @@ out->mode_is_supported[j] = 1; } } - } printk(BIOS_SPEW, "Standard timings supported:\n"); diff --git a/src/lib/hardwaremain.c b/src/lib/hardwaremain.c index 7badfbc..fda6c62 100644 --- a/src/lib/hardwaremain.c +++ b/src/lib/hardwaremain.c @@ -316,7 +316,6 @@ static void bs_walk_state_machine(void) { - while (1) { struct boot_state *state; boot_state_t next_id; diff --git a/src/lib/memrange.c b/src/lib/memrange.c index 9ae3e3e..316dce6 100644 --- a/src/lib/memrange.c +++ b/src/lib/memrange.c @@ -183,7 +183,6 @@ /* The new entry starts after this one. */ if (begin > cur->end) continue; - } /* Add new entry and merge with neighbors. */ @@ -389,7 +388,6 @@ return NULL; memranges_each_entry(r, ranges) { - if (r->tag != tag) continue; diff --git a/src/lib/region_file.c b/src/lib/region_file.c index f3e66bf..f77b9b0 100644 --- a/src/lib/region_file.c +++ b/src/lib/region_file.c @@ -242,7 +242,6 @@ int region_file_data(const struct region_file *f, struct region_device *rdev) { - size_t offset; size_t size; diff --git a/src/lib/stack.c b/src/lib/stack.c index 479ed93..6e563db 100644 --- a/src/lib/stack.c +++ b/src/lib/stack.c @@ -57,5 +57,4 @@ } return 0; - } -- To view, visit https://review.coreboot.org/c/coreboot/+/81456?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I94ee6bf38ecfcb620255a5a44edb2543fb519736 Gerrit-Change-Number: 81456 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

1 0

[XS] Change in coreboot[main]: drivers: Remove blank lines before '}' and after '{'
by Elyes Haouas (Code Review) 23 Mar '24

23 Mar '24

Elyes Haouas has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81455?usp=email ) Change subject: drivers: Remove blank lines before '}' and after '{' ...................................................................... drivers: Remove blank lines before '}' and after '{' Change-Id: I46a362270f69d0a4a28e5bb9c954f34d632815ff Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M src/drivers/efi/efivars.c M src/drivers/i2c/ptn3460/chip.h M src/drivers/i2c/tpm/cr50.c M src/drivers/i2c/tpm/tpm.c M src/drivers/intel/fsp1_1/hob.c M src/drivers/smmstore/store.c 6 files changed, 0 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/81455/1 diff --git a/src/drivers/efi/efivars.c b/src/drivers/efi/efivars.c index e7eabf4..a759070 100644 --- a/src/drivers/efi/efivars.c +++ b/src/drivers/efi/efivars.c @@ -26,7 +26,6 @@ printk(log_level, "GUID: %08x-%04x-%04x-%02x%02x%02x%02x%02x%02x%02x%02x", g->Data1, g->Data2, g->Data3, g->Data4[0], g->Data4[1], g->Data4[2], g->Data4[3], g->Data4[4], g->Data4[5], g->Data4[6], g->Data4[7]); - } static bool compare_guid(const EFI_GUID *a, const EFI_GUID *b) @@ -164,7 +163,6 @@ printk(BIOS_SPEW, PREFIX "UEFI FV with size %lld found\n", fw_vol_hdr->FvLength); return CB_SUCCESS; - } static enum cb_err diff --git a/src/drivers/i2c/ptn3460/chip.h b/src/drivers/i2c/ptn3460/chip.h index 0ec26ca..bcc8789 100644 --- a/src/drivers/i2c/ptn3460/chip.h +++ b/src/drivers/i2c/ptn3460/chip.h @@ -4,7 +4,6 @@ #define __DRIVERS_I2C_PTN3460_CHIP_H__ struct drivers_i2c_ptn3460_config { - }; #endif /* __DRIVERS_I2C_PTN3460_CHIP_H__ */ diff --git a/src/drivers/i2c/tpm/cr50.c b/src/drivers/i2c/tpm/cr50.c index 8462198..c34cee3 100644 --- a/src/drivers/i2c/tpm/cr50.c +++ b/src/drivers/i2c/tpm/cr50.c @@ -443,7 +443,6 @@ printk(BIOS_INFO, "Probing TPM I2C: "); for (retries = 100; retries > 0; retries--) { - rc = cr50_i2c_read(TPM_DID_VID(0), (uint8_t *)did_vid, 4); /* Exit once DID and VID verified */ diff --git a/src/drivers/i2c/tpm/tpm.c b/src/drivers/i2c/tpm/tpm.c index 541eb3a..96f34d8 100644 --- a/src/drivers/i2c/tpm/tpm.c +++ b/src/drivers/i2c/tpm/tpm.c @@ -117,7 +117,6 @@ buffer, len); if (rc == 0) break; /* success, break to skip sleep */ - } break; diff --git a/src/drivers/intel/fsp1_1/hob.c b/src/drivers/intel/fsp1_1/hob.c index 7522df1..8b2d56a 100644 --- a/src/drivers/intel/fsp1_1/hob.c +++ b/src/drivers/intel/fsp1_1/hob.c @@ -245,7 +245,6 @@ printk(BIOS_DEBUG, "%p: hob_list_ptr\n", hob_list_ptr); for (current_hob = hob_list_ptr; !END_OF_HOB_LIST(current_hob); current_hob = GET_NEXT_HOB(current_hob)) { - EFI_HOB_GENERIC_HEADER *current_header_ptr = (EFI_HOB_GENERIC_HEADER *)current_hob; diff --git a/src/drivers/smmstore/store.c b/src/drivers/smmstore/store.c index bc3dcdc..a959f43 100644 --- a/src/drivers/smmstore/store.c +++ b/src/drivers/smmstore/store.c @@ -96,7 +96,6 @@ static struct region_device rdev; if (!done) { - done = 1; if (fmap_locate_area_as_rdev_rw(SMMSTORE_REGION, &rdev)) { -- To view, visit https://review.coreboot.org/c/coreboot/+/81455?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I46a362270f69d0a4a28e5bb9c954f34d632815ff Gerrit-Change-Number: 81455 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

1 0

[XS] Change in coreboot[main]: device: Remove blank lines before '}' and after '{'
by Elyes Haouas (Code Review) 23 Mar '24

23 Mar '24

Elyes Haouas has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81454?usp=email ) Change subject: device: Remove blank lines before '}' and after '{' ...................................................................... device: Remove blank lines before '}' and after '{' Change-Id: I0f9495057c046b8de5b5f699f5bf38bb8e2795e4 Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M src/device/mmio.c M src/device/pci_device.c M src/device/resource_allocator_v4.c 3 files changed, 0 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/81454/1 diff --git a/src/device/mmio.c b/src/device/mmio.c index b62805a..ec9acfa 100644 --- a/src/device/mmio.c +++ b/src/device/mmio.c @@ -40,5 +40,4 @@ val = 0; j = 0; } - } diff --git a/src/device/pci_device.c b/src/device/pci_device.c index 8ead8a5..af3355d 100644 --- a/src/device/pci_device.c +++ b/src/device/pci_device.c @@ -1491,7 +1491,6 @@ prev = &bus->children; for (dev = bus->children; dev; dev = dev->sibling) { - /* * If static device is not PCI then enable it here and don't * treat it as a leftover device. @@ -1851,7 +1850,6 @@ slot = dev->path.pci.devfn >> 3; for (; dev ; dev = dev->sibling) { - if (dev->path.pci.devfn >> 3 != slot) break; diff --git a/src/device/resource_allocator_v4.c b/src/device/resource_allocator_v4.c index c9630bb..44782d8 100644 --- a/src/device/resource_allocator_v4.c +++ b/src/device/resource_allocator_v4.c @@ -140,7 +140,6 @@ print_bridge_res(bridge, bridge_res, print_depth, ""); while ((child = largest_resource(bus, &child_res, type_mask, type_match))) { - /* Size 0 resources can be skipped. */ if (!child_res->size) continue; @@ -260,7 +259,6 @@ return; for (child = domain->downstream->children; child; child = child->sibling) { - /* Skip if this is not a bridge or has no children under it. */ if (!dev_has_children(child)) continue; @@ -400,7 +398,6 @@ setup_resource_ranges(domain, type, &ranges); while ((dev = largest_resource(domain->downstream, &res, type_mask, type))) { - if (!res->size) continue; @@ -557,7 +554,6 @@ return; for (child = root->downstream->children; child; child = child->sibling) { - if (child->path.type != DEVICE_PATH_DOMAIN) continue; -- To view, visit https://review.coreboot.org/c/coreboot/+/81454?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0f9495057c046b8de5b5f699f5bf38bb8e2795e4 Gerrit-Change-Number: 81454 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

1 0

[XS] Change in coreboot[main]: arch/x86: Remove blank lines before '}' and after '{'
by Elyes Haouas (Code Review) 23 Mar '24

23 Mar '24

Elyes Haouas has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81453?usp=email ) Change subject: arch/x86: Remove blank lines before '}' and after '{' ...................................................................... arch/x86: Remove blank lines before '}' and after '{' Change-Id: I1bb4a052a4e74850660944b687c21e817eb437b2 Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M src/arch/x86/exception.c M src/arch/x86/include/arch/cpu.h M src/arch/x86/include/arch/smp/spinlock.h M src/arch/x86/ioapic.c M src/arch/x86/memmove_32.c M src/arch/x86/pirq_routing.c 6 files changed, 0 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/81453/1 diff --git a/src/arch/x86/exception.c b/src/arch/x86/exception.c index e2d585f..b8f0583 100644 --- a/src/arch/x86/exception.c +++ b/src/arch/x86/exception.c @@ -369,7 +369,6 @@ stub_flush(); } while ((stub_getc() & 0x7f) != '+'); - } #endif /* CONFIG_GDB_STUB */ diff --git a/src/arch/x86/include/arch/cpu.h b/src/arch/x86/include/arch/cpu.h index cfffac0..430d1de 100644 --- a/src/arch/x86/include/arch/cpu.h +++ b/src/arch/x86/include/arch/cpu.h @@ -213,7 +213,6 @@ c->x86 += (tfms >> 20) & 0xff; if (c->x86 >= 0x6) c->x86_model += ((tfms >> 16) & 0xF) << 4; - } /* REP NOP (PAUSE) is a good thing to insert into busy-wait loops. */ diff --git a/src/arch/x86/include/arch/smp/spinlock.h b/src/arch/x86/include/arch/smp/spinlock.h index cb25531..3819c8f 100644 --- a/src/arch/x86/include/arch/smp/spinlock.h +++ b/src/arch/x86/include/arch/smp/spinlock.h @@ -55,7 +55,6 @@ /* Switching contexts while holding a spinlock will lead to deadlocks */ thread_coop_disable(); - } static __always_inline void spin_unlock(spinlock_t *lock) diff --git a/src/arch/x86/ioapic.c b/src/arch/x86/ioapic.c index 863317f..5bb2adb5 100644 --- a/src/arch/x86/ioapic.c +++ b/src/arch/x86/ioapic.c @@ -140,7 +140,6 @@ for (i = 0; i < 3; i++) printk(BIOS_SPEW, " reg 0x%04x: 0x%08x\n", i, io_apic_read(ioapic_base, i)); - } u8 get_ioapic_id(uintptr_t ioapic_base) diff --git a/src/arch/x86/memmove_32.c b/src/arch/x86/memmove_32.c index 387a77e..7c2529d 100644 --- a/src/arch/x86/memmove_32.c +++ b/src/arch/x86/memmove_32.c @@ -196,5 +196,4 @@ : "memory"); return ret; - } diff --git a/src/arch/x86/pirq_routing.c b/src/arch/x86/pirq_routing.c index 7244536..e6f3b80 100644 --- a/src/arch/x86/pirq_routing.c +++ b/src/arch/x86/pirq_routing.c @@ -125,7 +125,6 @@ /* Set PCI IRQs. */ for (i = 0; i < num_entries; i++) { - u8 bus = pirq_tbl->slots[i].bus; u8 devfn = pirq_tbl->slots[i].devfn; @@ -133,7 +132,6 @@ devfn >> 3, pirq_tbl->slots[i].slot); for (intx = 0; intx < MAX_INTX_ENTRIES; intx++) { - int link = pirq_tbl->slots[i].irq[intx].link; int bitmap = pirq_tbl->slots[i].irq[intx].bitmap; int irq = 0; @@ -142,7 +140,6 @@ 'A' + intx, link, bitmap); if (!bitmap || !link || link > CONFIG_MAX_PIRQ_LINKS) { - printk(BIOS_DEBUG, "not routed\n"); irq_slot[intx] = irq; continue; -- To view, visit https://review.coreboot.org/c/coreboot/+/81453?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1bb4a052a4e74850660944b687c21e817eb437b2 Gerrit-Change-Number: 81453 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

1 0

[XS] Change in coreboot[main]: util/lint: Check Kconfig and cmos.default for license headers
by Nico Huber (Code Review) 23 Mar '24

23 Mar '24

Attention is currently required from: Martin L Roth, Nicholas Chin. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81424?usp=email ) Change subject: util/lint: Check Kconfig and cmos.default for license headers ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/81424?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6cc94b8e8b4ce6780ef1a72d49b88e85a7c4b832 Gerrit-Change-Number: 81424 Gerrit-PatchSet: 1 Gerrit-Owner: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Comment-Date: Sat, 23 Mar 2024 14:09:09 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: acpi: Remove blank lines before '}' and after '{'
by Elyes Haouas (Code Review) 23 Mar '24

23 Mar '24

Attention is currently required from: Cliff Huang, Lance Zhao, Tim Wawrzynczak. Elyes Haouas has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81452?usp=email ) Change subject: acpi: Remove blank lines before '}' and after '{' ...................................................................... acpi: Remove blank lines before '}' and after '{' Change-Id: I9ba061fe0b1396ccc1597e26685a6b4e312e3549 Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M src/acpi/acpi.c M src/acpi/acpigen.c M src/acpi/device.c M src/acpi/gnvs.c 4 files changed, 0 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/81452/1 diff --git a/src/acpi/acpi.c b/src/acpi/acpi.c index 98c8ecd..d6289f2 100644 --- a/src/acpi/acpi.c +++ b/src/acpi/acpi.c @@ -1504,7 +1504,6 @@ */ for (int i = 0; existing_rsdt->entry[i]; i++) acpi_add_table(rsdp, (void *)(uintptr_t)existing_rsdt->entry[i]); - } /* Add BOOT0000 for Linux google firmware driver */ diff --git a/src/acpi/acpigen.c b/src/acpi/acpigen.c index 257bd52..9c04e84 100644 --- a/src/acpi/acpigen.c +++ b/src/acpi/acpigen.c @@ -1880,7 +1880,6 @@ acpigen_write_return_singleton_buffer(0x0); acpigen_write_if_end(); /* If (LEqual (Local0, ToUUID(uuid))) */ - } /* diff --git a/src/acpi/device.c b/src/acpi/device.c index 368b86c..7fe5a37 100644 --- a/src/acpi/device.c +++ b/src/acpi/device.c @@ -1158,7 +1158,6 @@ acpi_dp_add_array(dp, gpio); return gpio; - } diff --git a/src/acpi/gnvs.c b/src/acpi/gnvs.c index 827cd2d..1e5d746 100644 --- a/src/acpi/gnvs.c +++ b/src/acpi/gnvs.c @@ -30,7 +30,6 @@ if (dnvs_size) dnvs = (char *)gnvs + gnvs_size; - } BOOT_STATE_INIT_ENTRY(BS_PRE_DEVICE, BS_ON_EXIT, acpi_create_gnvs, NULL); -- To view, visit https://review.coreboot.org/c/coreboot/+/81452?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9ba061fe0b1396ccc1597e26685a6b4e312e3549 Gerrit-Change-Number: 81452 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[main]: superio: Remove blank lines before '}' and after '{'
by Elyes Haouas (Code Review) 23 Mar '24

23 Mar '24

Elyes Haouas has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81431?usp=email ) Change subject: superio: Remove blank lines before '}' and after '{' ...................................................................... superio: Remove blank lines before '}' and after '{' Change-Id: I0d2ff9828e83ef927036c561d11f95b54b858cda Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M src/superio/common/conf_mode.c M src/superio/common/generic.c M src/superio/common/ssdt.c M src/superio/fintek/f71808a/chip.h M src/superio/fintek/f81803a/superio.c M src/superio/fintek/f81865f/superio.c M src/superio/fintek/f81866d/chip.h M src/superio/ite/it8712f/superio.c M src/superio/ite/it8721f/superio.c M src/superio/nuvoton/wpcm450/superio.c M src/superio/renesas/m3885x/superio.c M src/superio/smsc/lpc47m15x/superio.c M src/superio/smsc/lpc47n227/superio.c M src/superio/smsc/mec1308/superio.c M src/superio/smsc/smscsuperio/superio.c M src/superio/winbond/w83627dhg/superio.c M src/superio/winbond/w83627thg/superio.c M src/superio/winbond/w83627uhg/superio.c M src/superio/winbond/w83977tf/superio.c 19 files changed, 0 insertions(+), 21 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/81431/1 diff --git a/src/superio/common/conf_mode.c b/src/superio/common/conf_mode.c index 0978042..6100b4a 100644 --- a/src/superio/common/conf_mode.c +++ b/src/superio/common/conf_mode.c @@ -115,7 +115,6 @@ acpigen_write_store(); acpigen_write_byte(0xa0); acpigen_emit_namestring(idx); - } static void pnp_ssdt_enter_conf_mode_a5a5(struct device *dev, const char *idx, const char *data) @@ -161,7 +160,6 @@ static void pnp_ssdt_exit_conf_mode_0202(struct device *dev, const char *idx, const char *data) { - acpigen_write_store(); acpigen_write_byte(0x02); acpigen_emit_namestring(idx); diff --git a/src/superio/common/generic.c b/src/superio/common/generic.c index 92d8357..e4d0e7b 100644 --- a/src/superio/common/generic.c +++ b/src/superio/common/generic.c @@ -320,7 +320,6 @@ printk(BIOS_ERR, "%s: Base address not set\n", dev_path(dev)); else dev->ops = &ops; - } struct chip_operations superio_common_ops = { diff --git a/src/superio/common/ssdt.c b/src/superio/common/ssdt.c index fd55792..4fd1eed 100644 --- a/src/superio/common/ssdt.c +++ b/src/superio/common/ssdt.c @@ -103,7 +103,6 @@ } if (irq) acpigen_write_irq(irq); - } /* Add resource base and size for additional SuperIO code */ @@ -225,7 +224,6 @@ acpigen_emit_byte(RETURN_OP); acpigen_emit_byte(LOCAL0_OP); - } acpigen_pop_len(); /* Method */ diff --git a/src/superio/fintek/f71808a/chip.h b/src/superio/fintek/f71808a/chip.h index a1ee597..6a41f88 100644 --- a/src/superio/fintek/f71808a/chip.h +++ b/src/superio/fintek/f71808a/chip.h @@ -6,7 +6,6 @@ #include <stdint.h> struct superio_fintek_f71808a_config { - uint8_t hwm_vt1_boundary_1_temperature; uint8_t hwm_vt1_boundary_2_temperature; uint8_t hwm_vt1_boundary_3_temperature; diff --git a/src/superio/fintek/f81803a/superio.c b/src/superio/fintek/f81803a/superio.c index 4d4e8bc..0975bec 100644 --- a/src/superio/fintek/f81803a/superio.c +++ b/src/superio/fintek/f81803a/superio.c @@ -29,7 +29,6 @@ f81803a_pme_init(dev); break; } - } static struct device_operations ops = { diff --git a/src/superio/fintek/f81865f/superio.c b/src/superio/fintek/f81865f/superio.c index 70fefe5..8ca66a0 100644 --- a/src/superio/fintek/f81865f/superio.c +++ b/src/superio/fintek/f81865f/superio.c @@ -9,7 +9,6 @@ static void f81865f_init(struct device *dev) { - if (!dev->enabled) return; diff --git a/src/superio/fintek/f81866d/chip.h b/src/superio/fintek/f81866d/chip.h index 14b79ee..c5c8d76 100644 --- a/src/superio/fintek/f81866d/chip.h +++ b/src/superio/fintek/f81866d/chip.h @@ -6,7 +6,6 @@ #include <stdint.h> struct superio_fintek_f81866d_config { - /* AMD TSI */ uint8_t hwm_amd_tsi_addr; uint8_t hwm_amd_tsi_control; diff --git a/src/superio/ite/it8712f/superio.c b/src/superio/ite/it8712f/superio.c index 03127b5..119a38c 100644 --- a/src/superio/ite/it8712f/superio.c +++ b/src/superio/ite/it8712f/superio.c @@ -9,7 +9,6 @@ static void it8712f_init(struct device *dev) { - if (!dev->enabled) return; diff --git a/src/superio/ite/it8721f/superio.c b/src/superio/ite/it8721f/superio.c index 801e27b..eb7f2ee 100644 --- a/src/superio/ite/it8721f/superio.c +++ b/src/superio/ite/it8721f/superio.c @@ -9,7 +9,6 @@ static void init(struct device *dev) { - if (!dev->enabled) return; diff --git a/src/superio/nuvoton/wpcm450/superio.c b/src/superio/nuvoton/wpcm450/superio.c index 863ad2b..7d79a3f 100644 --- a/src/superio/nuvoton/wpcm450/superio.c +++ b/src/superio/nuvoton/wpcm450/superio.c @@ -8,7 +8,6 @@ static void init(struct device *dev) { - if (!dev->enabled) return; diff --git a/src/superio/renesas/m3885x/superio.c b/src/superio/renesas/m3885x/superio.c index 6b71256..45bc750 100644 --- a/src/superio/renesas/m3885x/superio.c +++ b/src/superio/renesas/m3885x/superio.c @@ -9,7 +9,6 @@ static void m3885x_init(struct device *dev) { - if (!dev->enabled) return; diff --git a/src/superio/smsc/lpc47m15x/superio.c b/src/superio/smsc/lpc47m15x/superio.c index 6f57133..8cba7bbe 100644 --- a/src/superio/smsc/lpc47m15x/superio.c +++ b/src/superio/smsc/lpc47m15x/superio.c @@ -43,7 +43,6 @@ static void lpc47m15x_init(struct device *dev) { - if (!dev->enabled) return; diff --git a/src/superio/smsc/lpc47n227/superio.c b/src/superio/smsc/lpc47n227/superio.c index edcc271..172084f 100644 --- a/src/superio/smsc/lpc47n227/superio.c +++ b/src/superio/smsc/lpc47n227/superio.c @@ -106,7 +106,6 @@ */ static void lpc47n227_init(struct device *dev) { - if (!dev->enabled) return; diff --git a/src/superio/smsc/mec1308/superio.c b/src/superio/smsc/mec1308/superio.c index 39e100e..83060cc 100644 --- a/src/superio/smsc/mec1308/superio.c +++ b/src/superio/smsc/mec1308/superio.c @@ -11,7 +11,6 @@ static void mec1308_init(struct device *dev) { - if (!dev->enabled) return; diff --git a/src/superio/smsc/smscsuperio/superio.c b/src/superio/smsc/smscsuperio/superio.c index 3ba8216..d9aa477 100644 --- a/src/superio/smsc/smscsuperio/superio.c +++ b/src/superio/smsc/smscsuperio/superio.c @@ -216,7 +216,6 @@ u8 test7; if (first_time) { - pnp_enter_conf_mode_55(dev); /* Read the device ID and revision of the Super I/O chip. */ diff --git a/src/superio/winbond/w83627dhg/superio.c b/src/superio/winbond/w83627dhg/superio.c index 491b5c9..d1df983 100644 --- a/src/superio/winbond/w83627dhg/superio.c +++ b/src/superio/winbond/w83627dhg/superio.c @@ -20,7 +20,6 @@ static void w83627dhg_init(struct device *dev) { - if (!dev->enabled) return; diff --git a/src/superio/winbond/w83627thg/superio.c b/src/superio/winbond/w83627thg/superio.c index 156239f..7778a28 100644 --- a/src/superio/winbond/w83627thg/superio.c +++ b/src/superio/winbond/w83627thg/superio.c @@ -8,7 +8,6 @@ static void w83627thg_init(struct device *dev) { - if (!dev->enabled) return; diff --git a/src/superio/winbond/w83627uhg/superio.c b/src/superio/winbond/w83627uhg/superio.c index e276fc5..3098ee2 100644 --- a/src/superio/winbond/w83627uhg/superio.c +++ b/src/superio/winbond/w83627uhg/superio.c @@ -38,7 +38,6 @@ static void w83627uhg_init(struct device *dev) { - if (!dev->enabled) return; diff --git a/src/superio/winbond/w83977tf/superio.c b/src/superio/winbond/w83977tf/superio.c index 28bfc8c..04530ab 100644 --- a/src/superio/winbond/w83977tf/superio.c +++ b/src/superio/winbond/w83977tf/superio.c @@ -9,7 +9,6 @@ static void w83977tf_init(struct device *dev) { - if (!dev->enabled) return; -- To view, visit https://review.coreboot.org/c/coreboot/+/81431?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0d2ff9828e83ef927036c561d11f95b54b858cda Gerrit-Change-Number: 81431 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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