coreboot-gerrit March 2024

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[XS] Change in coreboot[main]: mb/google/butterfly: Fix compiling for 64bit mode
by Arthur Heymans (Code Review) 23 Mar '24

23 Mar '24

Attention is currently required from: Felix Held, Patrick Rudolph. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81380?usp=email ) Change subject: mb/google/butterfly: Fix compiling for 64bit mode ...................................................................... Patch Set 2: (1 comment) File src/mainboard/google/butterfly/mainboard.c: https://review.coreboot.org/c/coreboot/+/81380/comment/9025d99e_ef689fff : PS1, Line 163: u32 > make this an uintptr_t too? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/81380?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ieaaba5b36796d97449896b8475744a21f01e93d1 Gerrit-Change-Number: 81380 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Sat, 23 Mar 2024 12:15:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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[S] Change in coreboot[main]: cpu/x86: Link page tables in stage if possible
by Arthur Heymans (Code Review) 23 Mar '24

23 Mar '24

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Jérémy Compostella, Matt DeVillier, Patrick Rudolph. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80337?usp=email ) Change subject: cpu/x86: Link page tables in stage if possible ...................................................................... Patch Set 16: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/80337/comment/49194427_4aca8d15 : PS13, Line 28: TESTED > You comment triggered my curiosity, thank you. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/80337?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ied54b66b930187cba5fbc578a81ed5859a616562 Gerrit-Change-Number: 80337 Gerrit-PatchSet: 16 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Sat, 23 Mar 2024 12:14:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Jérémy Compostella <jeremy.compostella(a)intel.com> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: mb/google/butterfly: Fix compiling for 64bit mode
by Arthur Heymans (Code Review) 23 Mar '24

23 Mar '24

Attention is currently required from: Arthur Heymans, Patrick Rudolph. Hello Patrick Rudolph, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81380?usp=email to look at the new patch set (#2). The following approvals got outdated and were removed: Code-Review+2 by Patrick Rudolph, Verified+1 by build bot (Jenkins) Change subject: mb/google/butterfly: Fix compiling for 64bit mode ...................................................................... mb/google/butterfly: Fix compiling for 64bit mode Change-Id: Ieaaba5b36796d97449896b8475744a21f01e93d1 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/mainboard/google/butterfly/mainboard.c 1 file changed, 4 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/81380/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/81380?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ieaaba5b36796d97449896b8475744a21f01e93d1 Gerrit-Change-Number: 81380 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[main]: cpu/x86: Link page tables in stage if possible
by Arthur Heymans (Code Review) 23 Mar '24

23 Mar '24

Attention is currently required from: Arthur Heymans, Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier, Patrick Rudolph. Hello Felix Held, Fred Reitberger, Jason Glenesk, Jérémy Compostella, Matt DeVillier, Patrick Rudolph, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/80337?usp=email to look at the new patch set (#16). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: cpu/x86: Link page tables in stage if possible ...................................................................... cpu/x86: Link page tables in stage if possible When switching back and forth between 32 to 64 bit mode, for example to call a 32-bits FSP or to call the payload, new page tables in the respective stage will be linked. The advantages of this approach are: - No need to determine a good place for page tables in CBFS that does not overlap. - Works with non memory mapped flash (however all coreboot targets currently do support this) - If later stages can use their own page tables which fits better with the vboot RO/RW flow A disadvantage is that it increases the stage size. This could be improved upon by using 1G pages and generating the pages at runtime. Note: qemu cannot have the page tables in the RO boot medium and needs to relocate them at runtime. This is why keeping the existing code with page tables in CBFS is done for now. TEST: Booted to payload on google/vilbox and qemu/q35 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Change-Id: Ied54b66b930187cba5fbc578a81ed5859a616562 --- M src/arch/x86/Kconfig M src/cpu/intel/car/core2/cache_as_ram.S M src/cpu/intel/car/non-evict/cache_as_ram.S M src/cpu/intel/car/p4-netburst/cache_as_ram.S M src/cpu/x86/64bit/Makefile.mk M src/cpu/x86/64bit/entry64.inc M src/cpu/x86/64bit/mode_switch.S M src/cpu/x86/64bit/mode_switch2.S M src/cpu/x86/64bit/pt.S M src/mainboard/emulation/qemu-i440fx/Kconfig M src/mainboard/emulation/qemu-q35/Kconfig M src/soc/amd/common/block/cpu/noncar/pre_c.S M src/soc/intel/common/block/cpu/car/cache_as_ram.S 13 files changed, 28 insertions(+), 10 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/80337/16 -- To view, visit https://review.coreboot.org/c/coreboot/+/80337?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ied54b66b930187cba5fbc578a81ed5859a616562 Gerrit-Change-Number: 80337 Gerrit-PatchSet: 16 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[main]: soc/amd/noncar: Increase bootblock size from 64K to 128K
by Arthur Heymans (Code Review) 23 Mar '24

23 Mar '24

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Martin L Roth, Matt DeVillier, Paul Menzel. Hello Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier, Paul Menzel, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/80348?usp=email to look at the new patch set (#8). The following approvals got outdated and were removed: Code-Review+1 by Matt DeVillier, Code-Review+1 by Paul Menzel, Verified+1 by build bot (Jenkins) Change subject: soc/amd/noncar: Increase bootblock size from 64K to 128K ...................................................................... soc/amd/noncar: Increase bootblock size from 64K to 128K When linking in page tables or romstage code, more place is needed. With Genoa POC x86_64 is the default so no conditional Kconfig values are set. Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Change-Id: I23f176d63d3c303b13331a77ad5ac6c7a19073d3 --- M src/soc/amd/cezanne/Kconfig M src/soc/amd/genoa_poc/Kconfig M src/soc/amd/glinda/Kconfig M src/soc/amd/mendocino/Kconfig M src/soc/amd/phoenix/Kconfig M src/soc/amd/picasso/Kconfig 6 files changed, 18 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/80348/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/80348?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I23f176d63d3c303b13331a77ad5ac6c7a19073d3 Gerrit-Change-Number: 80348 Gerrit-PatchSet: 8 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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[L] Change in coreboot[main]: superio/ite: Unify it8722f with common code
by Nico Huber (Code Review) 23 Mar '24

23 Mar '24

Attention is currently required from: Joel Linn, Matt DeVillier, Michał Żygowski, MrChromebox, Piotr Król. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81310?usp=email ) Change subject: superio/ite: Unify it8722f with common code ...................................................................... Patch Set 4: Code-Review+1 (11 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/81310/comment/2bdf3cbc_10bce208 : PS4, Line 7: it8722f it87*7*2f https://review.coreboot.org/c/coreboot/+/81310/comment/cf4130fa_d3c66185 : PS4, Line 9: it8722f it87*7*2f Patchset: PS4: Mostly nits. I've reviewed this primarily to avoid regressions. Didn't check every single register (not those that are unused by current configurations). File src/mainboard/google/beltino/devicetree.cb: https://review.coreboot.org/c/coreboot/+/81310/comment/aea93725_4094c9a7 : PS4, Line 86: register "FAN2.mode" = "FAN_SMART_SOFTWARE" IIUC, the old code would have left the PWM signal at 0% (datasheet default for register 0x73). The new code would set 50%. Not sure if it matters, software mode is probably expected to be controlled by the OS. File src/superio/ite/common/env_ctrl.c: https://review.coreboot.org/c/coreboot/+/81310/comment/52ce9518_31ddb09d : PS4, Line 84: * As by our coding style, no leading asterisk in the short comment form. e.g. ``` /* Short, multiline comment. Without leading asterisk on the second line. */ ``` https://review.coreboot.org/c/coreboot/+/81310/comment/db2b379e_27a04e19 : PS4, Line 86: reg != reg_new) { Line break isn't needed, as we allow ~96 chars per line. https://review.coreboot.org/c/coreboot/+/81310/comment/57d64884_d0e92e8f : PS4, Line 110: break; Shouldn't we `return` here? Could also move this case to the top. https://review.coreboot.org/c/coreboot/+/81310/comment/548390f1_f0d4362c : PS4, Line 186: if (!CONFIG(SUPERIO_ITE_IT8772F)) { We shouldn't check for specific chips in common code. This should be a Kconfig feature, e.g. ``` config SUPERIO_ITE_ENV_CTRL_FULLSPEED_SETTING bool ``` https://review.coreboot.org/c/coreboot/+/81310/comment/660acab2_3f1e85f0 : PS4, Line 188: } Nit, while we allow {} for single line blocks, it's preferred to keep a style choice throughout a source file. No braces for single lines seems to be prevailing here. File src/superio/ite/it8728f/Kconfig: https://review.coreboot.org/c/coreboot/+/81310/comment/1f3708bc_030eab77 : PS4, Line 8: select SUPERIO_ITE_ENV_CTRL_FAN16_CONFIG I see the bits are reserved in the datasheet. But this should definitely be a separate patch. It's risky, the datasheet could be wrong. File src/superio/ite/it8772f/superio.c: https://review.coreboot.org/c/coreboot/+/81310/comment/753372c0_8a6501e1 : PS4, Line 26: conf = dev->chip_info; It's already initialized like this. -- To view, visit https://review.coreboot.org/c/coreboot/+/81310?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic4d9d5460628e444dc20f620179b39c90dbc28c6 Gerrit-Change-Number: 81310 Gerrit-PatchSet: 4 Gerrit-Owner: Joel Linn <jl_coreboot(a)conductive.de> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: MrChromebox <mrchromebox(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Joel Linn <jl_coreboot(a)conductive.de> Gerrit-Attention: MrChromebox <mrchromebox(a)gmail.com> Gerrit-Attention: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Comment-Date: Sat, 23 Mar 2024 11:19:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: sb/intel/bd82x6x: Add new USB currents
by Joel Linn (Code Review) 23 Mar '24

23 Mar '24

Attention is currently required from: Paul Menzel. Joel Linn has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81427?usp=email ) Change subject: sb/intel/bd82x6x: Add new USB currents ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/81427/comment/5094e07a_2400b02c : PS1, Line 9: Found > Found by … "Found by HP Pro 3500 Series..." Is this really what you meant? Please elaborate. -- To view, visit https://review.coreboot.org/c/coreboot/+/81427?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I156787e533c2605e7440548a2d3bf711bb1af5d7 Gerrit-Change-Number: 81427 Gerrit-PatchSet: 1 Gerrit-Owner: Joel Linn <jl_coreboot(a)conductive.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Sat, 23 Mar 2024 11:18:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: mb/google/veyron_{mickey;rialto}: Remove return statment in void func...
by Elyes Haouas (Code Review) 23 Mar '24

23 Mar '24

Elyes Haouas has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81430?usp=email ) Change subject: mb/google/veyron_{mickey;rialto}: Remove return statment in void function ...................................................................... mb/google/veyron_{mickey;rialto}: Remove return statment in void function Return statement is not useful in void function. Change-Id: I8cf020de335e4da933b7bbdc27b7ac6f31afe885 Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M src/mainboard/google/veyron_mickey/mainboard.c M src/mainboard/google/veyron_rialto/mainboard.c 2 files changed, 0 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/81430/1 diff --git a/src/mainboard/google/veyron_mickey/mainboard.c b/src/mainboard/google/veyron_mickey/mainboard.c index 3df0c49..1233248 100644 --- a/src/mainboard/google/veyron_mickey/mainboard.c +++ b/src/mainboard/google/veyron_mickey/mainboard.c @@ -92,5 +92,4 @@ void mainboard_power_on_backlight(void) { - return; } diff --git a/src/mainboard/google/veyron_rialto/mainboard.c b/src/mainboard/google/veyron_rialto/mainboard.c index faf41fa..4551515 100644 --- a/src/mainboard/google/veyron_rialto/mainboard.c +++ b/src/mainboard/google/veyron_rialto/mainboard.c @@ -98,5 +98,4 @@ void mainboard_power_on_backlight(void) { - return; } -- To view, visit https://review.coreboot.org/c/coreboot/+/81430?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8cf020de335e4da933b7bbdc27b7ac6f31afe885 Gerrit-Change-Number: 81430 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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[XS] Change in coreboot[main]: soc/intel/common/block/cse: Remove return statment in void function
by Elyes Haouas (Code Review) 23 Mar '24

23 Mar '24

Elyes Haouas has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81429?usp=email ) Change subject: soc/intel/common/block/cse: Remove return statment in void function ...................................................................... soc/intel/common/block/cse: Remove return statment in void function Return statement is not useful in void function. Change-Id: Idb8e07f48043452b329d255fe457f00317c017ae Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M src/soc/intel/common/block/cse/cse_lite.c 1 file changed, 0 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/81429/1 diff --git a/src/soc/intel/common/block/cse/cse_lite.c b/src/soc/intel/common/block/cse/cse_lite.c index bfa01e4..5298b31 100644 --- a/src/soc/intel/common/block/cse/cse_lite.c +++ b/src/soc/intel/common/block/cse/cse_lite.c @@ -1111,7 +1111,6 @@ * We cannot do much if CSE fails to backup the PSR data, except create an event log. */ update_psr_backup_status(PSR_BACKUP_DONE); - return; } static void initiate_psr_data_backup(void) -- To view, visit https://review.coreboot.org/c/coreboot/+/81429?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idb8e07f48043452b329d255fe457f00317c017ae Gerrit-Change-Number: 81429 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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[L] Change in coreboot[main]: soc/intel/xeon_sp/spr: Support dynamic domain SSDT generation
by Patrick Rudolph (Code Review) 23 Mar '24

23 Mar '24

Attention is currently required from: Arthur Heymans, Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Shuo Liu, Tim Chu. Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81377?usp=email ) Change subject: soc/intel/xeon_sp/spr: Support dynamic domain SSDT generation ...................................................................... Patch Set 4: Code-Review+1 (1 comment) File src/soc/intel/xeon_sp/spr/soc_acpi.c: https://review.coreboot.org/c/coreboot/+/81377/comment/9d4fe708_4a357968 : PS4, Line 263: acpigen_write_return_namestr DINO devicea used \\_SB.AR12, why was it changed? -- To view, visit https://review.coreboot.org/c/coreboot/+/81377?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Icc5843feadc840d87c49b2aa4259716264520dba Gerrit-Change-Number: 81377 Gerrit-PatchSet: 4 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Sat, 23 Mar 2024 08:35:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit March 2024