coreboot-gerrit March 2024

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[main]: soc/intel/xeon_sp/gnr: Add soc_pci_domain_fill_ssdt
by Patrick Rudolph (Code Review) 23 Mar '24

23 Mar '24

Attention is currently required from: Arthur Heymans, Christian Walter, Jincheng Li, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Shuo Liu, Tim Chu. Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81374?usp=email ) Change subject: soc/intel/xeon_sp/gnr: Add soc_pci_domain_fill_ssdt ...................................................................... Patch Set 6: (1 comment) File src/soc/intel/xeon_sp/gnr/soc_acpi.c: https://review.coreboot.org/c/coreboot/+/81374/comment/0715efce_a507c7c6 : PS6, Line 83: PNP0A08 This only works for PCI hostbridges, on CXL hostbridges you should use ACPI0017 -- To view, visit https://review.coreboot.org/c/coreboot/+/81374?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I28bfdf74d8044235f79f67d832860d8b4306670c Gerrit-Change-Number: 81374 Gerrit-PatchSet: 6 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Sat, 23 Mar 2024 08:29:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: sb/intel/bd82x6x: Add new USB currents
by Paul Menzel (Code Review) 23 Mar '24

23 Mar '24

Attention is currently required from: Joel Linn. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81427?usp=email ) Change subject: sb/intel/bd82x6x: Add new USB currents ...................................................................... Patch Set 1: Code-Review+1 (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/81427/comment/5c85729b_a0fa6d8a : PS1, Line 7: Add new USB currents Add *four* new USB currents https://review.coreboot.org/c/coreboot/+/81427/comment/94f6f7ca_c28dc495 : PS1, Line 9: vendor firmware Please also document the version. https://review.coreboot.org/c/coreboot/+/81427/comment/ce2623b2_bfa2f0ca : PS1, Line 9: Found Found by … -- To view, visit https://review.coreboot.org/c/coreboot/+/81427?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I156787e533c2605e7440548a2d3bf711bb1af5d7 Gerrit-Change-Number: 81427 Gerrit-PatchSet: 1 Gerrit-Owner: Joel Linn <jl_coreboot(a)conductive.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Joel Linn <jl_coreboot(a)conductive.de> Gerrit-Comment-Date: Sat, 23 Mar 2024 06:18:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: soc/intel/alderlake: Attach timestamp around eSOL call
by Eric Lai (Code Review) 23 Mar '24

23 Mar '24

Attention is currently required from: Dinesh Gehlot, Kapil Porwal, Nick Vaccaro, Subrata Banik. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81387?usp=email ) Change subject: soc/intel/alderlake: Attach timestamp around eSOL call ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/81387?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I51c04fc4bd2540b3f42e2f896178521d297ef246 Gerrit-Change-Number: 81387 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Sat, 23 Mar 2024 03:19:31 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: commonlib: Add timestamp entries for eSOL
by Eric Lai (Code Review) 23 Mar '24

23 Mar '24

Attention is currently required from: Dinesh Gehlot, Subrata Banik. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81386?usp=email ) Change subject: commonlib: Add timestamp entries for eSOL ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/81386?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I33f7f3a8622600ef23163faf45e2da7b96d6bbdb Gerrit-Change-Number: 81386 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Comment-Date: Sat, 23 Mar 2024 03:19:25 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[L] Change in coreboot[main]: mb/hp: Add Pro 3500 series (Sandy/Ivy Bridge)
by Nicholas Chin (Code Review) 23 Mar '24

23 Mar '24

Attention is currently required from: Joel Linn, Matt DeVillier. Nicholas Chin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81368?usp=email ) Change subject: mb/hp: Add Pro 3500 series (Sandy/Ivy Bridge) ...................................................................... Patch Set 3: (4 comments) File Documentation/mainboard/hp/pro_3500_series.md: https://review.coreboot.org/c/coreboot/+/81368/comment/3d107c60_2ce101ca : PS3, Line 17: eval_rst Should be `{eval-rst}` after commit 35599f9a66 (Docs: Replace Recommonmark with MyST Parser) https://review.coreboot.org/c/coreboot/+/81368/comment/8fb6ecb4_42d23bdb : PS3, Line 85: eval_rst `{eval-rst}` https://review.coreboot.org/c/coreboot/+/81368/comment/39c4b8c2_7a672293 : PS3, Line 93: E Remove "E" after "IT". I.e. IT8779E not ITE8779E File src/mainboard/hp/pro_3500_series/devicetree.cb: https://review.coreboot.org/c/coreboot/+/81368/comment/4f22b5c1_10de2e38 : PS3, Line 50: subsystemid 0x103c 0x2abf Can remove, already covered by the `subsystemid 0x103c 0x2abf inherit` earlier -- To view, visit https://review.coreboot.org/c/coreboot/+/81368?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idf793fe915096cf2553572964faec5c7f8526b9a Gerrit-Change-Number: 81368 Gerrit-PatchSet: 3 Gerrit-Owner: Joel Linn <jl_coreboot(a)conductive.de> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Joel Linn <jl_coreboot(a)conductive.de> Gerrit-Comment-Date: Sat, 23 Mar 2024 02:33:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[L] Change in coreboot[main]: mb/hp: Add Pro 3500 series (Sandy/Ivy Bridge)
by Felix Singer (Code Review) 23 Mar '24

23 Mar '24

Attention is currently required from: Joel Linn, Matt DeVillier, Nicholas Chin. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81368?usp=email ) Change subject: mb/hp: Add Pro 3500 series (Sandy/Ivy Bridge) ...................................................................... Patch Set 3: (9 comments) File src/mainboard/hp/pro_3500_series/Kconfig: https://review.coreboot.org/c/coreboot/+/81368/comment/644bd349_6e58ea21 : PS3, Line 11: select INTEL_INT15 See my comment for mainboard.c File src/mainboard/hp/pro_3500_series/Makefile.mk: https://review.coreboot.org/c/coreboot/+/81368/comment/9fe092eb_8db92587 : PS3, Line 11: bootblock-y += led.c Move to the other bootblock lines File src/mainboard/hp/pro_3500_series/devicetree.cb: https://review.coreboot.org/c/coreboot/+/81368/comment/7472b1dd_34c3d236 : PS3, Line 4: register "gpu_dp_b_hotplug" = "0" : register "gpu_dp_c_hotplug" = "0" : register "gpu_dp_d_hotplug" = "0" Set to 0 by default, remove https://review.coreboot.org/c/coreboot/+/81368/comment/7370fe96_1f6a6e86 : PS3, Line 15: # Host bridge Host bridge Remove superfluous comment https://review.coreboot.org/c/coreboot/+/81368/comment/16d40c26_c1d3746e : PS3, Line 19: chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH Remove devices which are set to off, as their config is equal to chipset devicetree. https://review.coreboot.org/c/coreboot/+/81368/comment/807b3595_7f769b65 : PS3, Line 22: register "pcie_hotplug_map" = "{ 0, 0, 0, 0, 0, 0, 0, 0 }" All set to 0, remove File src/mainboard/hp/pro_3500_series/dsdt.asl: https://review.coreboot.org/c/coreboot/+/81368/comment/83f1aca3_0aa49c5a : PS3, Line 14: /* OEM revision */ Remove comment File src/mainboard/hp/pro_3500_series/mainboard.c: PS3: The INT15 handler is only needed when the proprietary VGA bios is used. It's useless with libgfxinit. I would just drop it. File src/mainboard/hp/pro_3500_series/smihandler.c: https://review.coreboot.org/c/coreboot/+/81368/comment/e923131c_c9fa5aad : PS3, Line 12: */ No need for multiline comment, just use single line format -- To view, visit https://review.coreboot.org/c/coreboot/+/81368?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idf793fe915096cf2553572964faec5c7f8526b9a Gerrit-Change-Number: 81368 Gerrit-PatchSet: 3 Gerrit-Owner: Joel Linn <jl_coreboot(a)conductive.de> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Joel Linn <jl_coreboot(a)conductive.de> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Comment-Date: Sat, 23 Mar 2024 02:31:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[main]: arch/riscv: add new SBI calls
by Martin L Roth (Code Review) 23 Mar '24

23 Mar '24

Attention is currently required from: Arthur Heymans, Maximilian Brune, Philipp Hug, ron minnich. Martin L Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81294?usp=email ) Change subject: arch/riscv: add new SBI calls ...................................................................... Patch Set 12: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/81294?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5dac8613020e26ec74ac1c74158fc9791553693f Gerrit-Change-Number: 81294 Gerrit-PatchSet: 12 Gerrit-Owner: ron minnich <rminnich(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Philipp Hug <philipp(a)hug.cx> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: ron minnich <rminnich(a)gmail.com> Gerrit-Comment-Date: Sat, 23 Mar 2024 01:23:35 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: drivers/intel/ish: Include stdbool.h to identify bool type
by Felix Held (Code Review) 23 Mar '24

23 Mar '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/81417?usp=email ) Change subject: drivers/intel/ish: Include stdbool.h to identify bool type ...................................................................... drivers/intel/ish: Include stdbool.h to identify bool type When the concerned chip.h file is included in a source file, it causes compilation error saying unknown type name bool. Fix it by including the stdbool.h file in the chip.h file. BUG=None TEST=Build Brox by including the chip.h file in one of the source files. Change-Id: I4159e2c281c3e89dc45555ce38ad8637a3bf8587 Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81417 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Shelley Chen <shchen(a)google.com> --- M src/drivers/intel/ish/chip.h 1 file changed, 2 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Shelley Chen: Looks good to me, approved diff --git a/src/drivers/intel/ish/chip.h b/src/drivers/intel/ish/chip.h index 69f3253..3bcf65a 100644 --- a/src/drivers/intel/ish/chip.h +++ b/src/drivers/intel/ish/chip.h @@ -3,6 +3,8 @@ #ifndef __DRIVERS_INTEL_ISH_CHIP_H__ #define __DRIVERS_INTEL_ISH_CHIP_H__ +#include <stdbool.h> + /* * Intel Integrated Sensor Hub (ISH) */ -- To view, visit https://review.coreboot.org/c/coreboot/+/81417?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4159e2c281c3e89dc45555ce38ad8637a3bf8587 Gerrit-Change-Number: 81417 Gerrit-PatchSet: 2 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Tanu Malhotra <tanu.malhotra(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[XS] Change in coreboot[main]: sb/intel/bd82x6x: Add new USB currents
by Joel Linn (Code Review) 23 Mar '24

23 Mar '24

Joel Linn has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81427?usp=email ) Change subject: sb/intel/bd82x6x: Add new USB currents ...................................................................... sb/intel/bd82x6x: Add new USB currents Found on HP Pro 3500 Series running vendor firmware. Change-Id: I156787e533c2605e7440548a2d3bf711bb1af5d7 Signed-off-by: Joel Linn <jl(a)conductive.de> --- M src/southbridge/intel/bd82x6x/early_usb.c 1 file changed, 2 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/81427/1 diff --git a/src/southbridge/intel/bd82x6x/early_usb.c b/src/southbridge/intel/bd82x6x/early_usb.c index 35bfeca..6d3d096 100644 --- a/src/southbridge/intel/bd82x6x/early_usb.c +++ b/src/southbridge/intel/bd82x6x/early_usb.c @@ -18,7 +18,8 @@ }; const u32 currents[] = { USBIR_TXRX_GAIN_MOBILE_LOW, USBIR_TXRX_GAIN_DEFAULT, USBIR_TXRX_GAIN_HIGH, 0x20000f51, 0x2000094a, 0x2000035f, - USBIR_TXRX_GAIN_DESKTOP_LOW, 0x20000357, 0x20000353 }; + USBIR_TXRX_GAIN_DESKTOP_LOW, 0x20000357, 0x20000353, + 0x20000253, 0x20000053, 0x2000055f, 0x20000f5f}; int i; /* Unlock registers. */ -- To view, visit https://review.coreboot.org/c/coreboot/+/81427?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I156787e533c2605e7440548a2d3bf711bb1af5d7 Gerrit-Change-Number: 81427 Gerrit-PatchSet: 1 Gerrit-Owner: Joel Linn <jl_coreboot(a)conductive.de> Gerrit-MessageType: newchange

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[L] Change in coreboot[main]: mb/hp: Add Pro 3500 series (Sandy/Ivy Bridge)
by Joel Linn (Code Review) 23 Mar '24

23 Mar '24

Attention is currently required from: Matt DeVillier, Nicholas Chin. Hello Matt DeVillier, Nicholas Chin, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81368?usp=email to look at the new patch set (#3). The following approvals got outdated and were removed: Code-Review+1 by Matt DeVillier, Verified+1 by build bot (Jenkins) Change subject: mb/hp: Add Pro 3500 series (Sandy/Ivy Bridge) ...................................................................... mb/hp: Add Pro 3500 series (Sandy/Ivy Bridge) This is another readily available (used market) system. Based on autoport. All peripherals should work. Automatic fan control as well as S3 are working. The board was tested to boot Linux and Windows. EHCI debug is untested. When using MrChromebox edk2 with secure boot build in, the board will hang on each boot for about 20 seconds before continuing. There are some quirks for doing the first flash, see the documentation. Change-Id: Idf793fe915096cf2553572964faec5c7f8526b9a Signed-off-by: Joel Linn <jl(a)conductive.de> --- A Documentation/mainboard/hp/pro_3500_series.md A Documentation/mainboard/hp/pro_3500_series_flash.avif A Documentation/mainboard/hp/pro_3500_series_jumper.avif M Documentation/mainboard/index.md A src/mainboard/hp/pro_3500_series/Kconfig A src/mainboard/hp/pro_3500_series/Kconfig.name A src/mainboard/hp/pro_3500_series/Makefile.mk A src/mainboard/hp/pro_3500_series/acpi/ec.asl A src/mainboard/hp/pro_3500_series/acpi/platform.asl A src/mainboard/hp/pro_3500_series/acpi/superio.asl A src/mainboard/hp/pro_3500_series/acpi_tables.c A src/mainboard/hp/pro_3500_series/board_info.txt A src/mainboard/hp/pro_3500_series/common_defines.h A src/mainboard/hp/pro_3500_series/data.vbt A src/mainboard/hp/pro_3500_series/devicetree.cb A src/mainboard/hp/pro_3500_series/dsdt.asl A src/mainboard/hp/pro_3500_series/early_init.c A src/mainboard/hp/pro_3500_series/env_ctrl.c A src/mainboard/hp/pro_3500_series/gma-mainboard.ads A src/mainboard/hp/pro_3500_series/gpio.c A src/mainboard/hp/pro_3500_series/hda_verb.c A src/mainboard/hp/pro_3500_series/led.c A src/mainboard/hp/pro_3500_series/led.h A src/mainboard/hp/pro_3500_series/mainboard.c A src/mainboard/hp/pro_3500_series/smihandler.c 25 files changed, 734 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/81368/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/81368?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idf793fe915096cf2553572964faec5c7f8526b9a Gerrit-Change-Number: 81368 Gerrit-PatchSet: 3 Gerrit-Owner: Joel Linn <jl_coreboot(a)conductive.de> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-MessageType: newpatchset

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coreboot-gerrit March 2024