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Change subject: cpu/x86/(sipi|smm): Pass on CR3 from ramstage
......................................................................
Patch Set 6: Code-Review+1
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Change subject: cpu/x86: Link page tables in stage if possible
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Patch Set 11: Code-Review+1
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Change subject: payloads/depthcharge: Add DEPTHCHARGE_REPO and DEPTHCHARGE_BRANCH
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Patch Set 2: Code-Review+1
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Change subject: mb/system76/adl: Remove duplicate PchHdaAudioLinkHdaEnable
......................................................................
mb/system76/adl: Remove duplicate PchHdaAudioLinkHdaEnable
This UPD is hooked up in devicetree since commit 854bd492fcfa
("mb/{system76,msi}: Enable PchHdaAudioLinkHdaEnable via devicetree").
As these boards were in development when the change happened, they still
had the UPD set via romstage. Remove them now so they are only set in
devicetree.
Change-Id: I393e2c7b0134a31feae20f8992d7fd447ff7ee59
Signed-off-by: Tim Crawford <tcrawford(a)system76.com>
---
M src/mainboard/system76/adl/variants/lemp11/romstage.c
M src/mainboard/system76/adl/variants/oryp10/romstage.c
M src/mainboard/system76/adl/variants/oryp9/romstage.c
3 files changed, 0 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/80755/1
diff --git a/src/mainboard/system76/adl/variants/lemp11/romstage.c b/src/mainboard/system76/adl/variants/lemp11/romstage.c
index 989b5df..211ab97 100644
--- a/src/mainboard/system76/adl/variants/lemp11/romstage.c
+++ b/src/mainboard/system76/adl/variants/lemp11/romstage.c
@@ -15,7 +15,6 @@
};
const bool half_populated = false;
- mupd->FspmConfig.PchHdaAudioLinkHdaEnable = 1;
mupd->FspmConfig.DmiMaxLinkSpeed = 4;
mupd->FspmConfig.GpioOverride = 0;
diff --git a/src/mainboard/system76/adl/variants/oryp10/romstage.c b/src/mainboard/system76/adl/variants/oryp10/romstage.c
index 48714e0..86ecf32 100644
--- a/src/mainboard/system76/adl/variants/oryp10/romstage.c
+++ b/src/mainboard/system76/adl/variants/oryp10/romstage.c
@@ -23,7 +23,6 @@
// Set primary display to internal graphics
mupd->FspmConfig.PrimaryDisplay = 0;
- mupd->FspmConfig.PchHdaAudioLinkHdaEnable = 1;
mupd->FspmConfig.DmiMaxLinkSpeed = 4;
mupd->FspmConfig.GpioOverride = 0;
diff --git a/src/mainboard/system76/adl/variants/oryp9/romstage.c b/src/mainboard/system76/adl/variants/oryp9/romstage.c
index d16b4f8..5e6cf7d 100644
--- a/src/mainboard/system76/adl/variants/oryp9/romstage.c
+++ b/src/mainboard/system76/adl/variants/oryp9/romstage.c
@@ -20,7 +20,6 @@
// Set primary display to internal graphics
mupd->FspmConfig.PrimaryDisplay = 0;
- mupd->FspmConfig.PchHdaAudioLinkHdaEnable = 1;
mupd->FspmConfig.DmiMaxLinkSpeed = 4;
mupd->FspmConfig.GpioOverride = 0;
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Change subject: mb/google/brya/var/xol: Change clock source index for NVME
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/80768/comment/3cfc58c2_6e4a9964 :
PS2, Line 7: Change clock source index for NVME
> Update NVMe clock source index to 1
or
> Use 1 as NVMe clock source index
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Change subject: mb/google/nissa/var/glassway: Add default DRIVERS for board configuration
......................................................................
Patch Set 1: Code-Review+1
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/80766/comment/6f746abe_c12cb1e5 :
PS1, Line 7: Add default DRIVERS for board configuration
Please be more specific. Maybe:
> Select drivers for gpio-keys and Genesys Logic GL9750
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Change subject: soc/amd/noncar: Increase bootblock size from 64K to 128K
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Patch Set 6: Code-Review+1
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/80348/comment/4d4cd10a_571a201e :
PS6, Line 7: Increase
Double
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