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Change subject: mb/lenovo: Add ThinkCentre M700/M900 Tiny board (Skylake/Kaby Lake)
......................................................................
Patch Set 6:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/80610/comment/3401530b_5192c1ba :
PS4, Line 9: Add Lenovo ThinkCentre M700 / M900 Tiny mainboard.
> Sure, updated the commit message
Done
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Change subject: mb/lenovo: Add ThinkCentre M700/M900 Tiny board (Skylake/Kaby Lake)
......................................................................
Patch Set 6:
(8 comments)
File src/mainboard/lenovo/m900_tiny/Kconfig:
PS5:
> Add SPDX license here.
Done
File src/mainboard/lenovo/m900_tiny/Kconfig.name:
PS5:
> Add SPDX license here.
Done
File src/mainboard/lenovo/m900_tiny/acpi/ec.asl:
https://review.coreboot.org/c/coreboot/+/80610/comment/f44591c4_d2f44e5d :
PS5, Line 1: GPL-2.0-or-later
> Empty files should use the CC-PDDC license (refer to CB:66497)
Right, added
File src/mainboard/lenovo/m900_tiny/cmos.default:
PS5:
> Add SPDX license here (refer to CB:80597)
Done
File src/mainboard/lenovo/m900_tiny/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/80610/comment/92345b49_c85cafb7 :
PS5, Line 133: register "usb2_ports[0]" = "USB2_PORT_MID(OC0)" # Front Port 1
> I would suggest this format for bulk definitions. […]
Done
https://review.coreboot.org/c/coreboot/+/80610/comment/648eef44_31ab3006 :
PS5, Line 142: register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC0)" # Front Port 1
> Here too.
Done
https://review.coreboot.org/c/coreboot/+/80610/comment/95154663_7348704c :
PS5, Line 154: register "SataPortsEnable" = "{ \
> '\' is not necessary.
Done
https://review.coreboot.org/c/coreboot/+/80610/comment/c07bc1b2_43f5fa9d :
PS5, Line 162: register "SataPortsHotPlug" = "{ \
> Here too.
Done
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Change subject: configs/config.lenovo_m900_tiny: add config for M900 Tiny
......................................................................
configs/config.lenovo_m900_tiny: add config for M900 Tiny
Change-Id: I6c2b033d4e6bcc82e3d4348b3b158cb96e369727
Signed-off-by: Michał Kopeć <michal.kopec(a)3mdeb.com>
---
A configs/config.lenovo_m900_tiny
1 file changed, 11 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/80611/6
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Change subject: mb/lenovo: Add ThinkCentre M700/M900 Tiny board (Skylake/Kaby Lake)
......................................................................
mb/lenovo: Add ThinkCentre M700/M900 Tiny board (Skylake/Kaby Lake)
The M700 / M900 Tiny boards are USFF PCs that come with Skylake LGA1151
processors. M700 comes with B150 chipset, M900 comes with Q170 and is
vPro capable.
There is an onboard discrete TPM 1.2. Intel PTT fTPM can also be enabled
in vendor FW, but for now it's not used here.
Tested unit is M900 with i5-6500T. Boots to Fedora 38 w/ kernel 6.5.5
and Windows 11.
Tested and working:
- Serial port (via optional module)
- Rear DisplayPort connectors
- Graphics w/ libgfxinit
- Ethernet
- SATA
- NVMe
- Internal speaker, front combo jack, rear line-out
- Discrete TPM 1.2
- USB ports (Port 1 untested, apparently broken on my unit)
- M.2 2230 Wi-Fi slot (needs ASPM L1s disabled)
- S3 suspend
- ME disable via NVRAM setting
Untested:
- Front mic input
- Optional expansion headers: DisplayPort, USB, PS/2, SATA / PCIe
Change-Id: I6786e068ec03c8bf243e1767cd7b9d50512ea77f
Signed-off-by: Michał Kopeć <michal.kopec(a)3mdeb.com>
---
A src/mainboard/lenovo/m900_tiny/Kconfig
A src/mainboard/lenovo/m900_tiny/Kconfig.name
A src/mainboard/lenovo/m900_tiny/Makefile.mk
A src/mainboard/lenovo/m900_tiny/acpi/ec.asl
A src/mainboard/lenovo/m900_tiny/acpi/superio.asl
A src/mainboard/lenovo/m900_tiny/board_info.txt
A src/mainboard/lenovo/m900_tiny/bootblock.c
A src/mainboard/lenovo/m900_tiny/cmos.default
A src/mainboard/lenovo/m900_tiny/cmos.layout
A src/mainboard/lenovo/m900_tiny/data.vbt
A src/mainboard/lenovo/m900_tiny/devicetree.cb
A src/mainboard/lenovo/m900_tiny/dsdt.asl
A src/mainboard/lenovo/m900_tiny/gma-mainboard.ads
A src/mainboard/lenovo/m900_tiny/gpio.c
A src/mainboard/lenovo/m900_tiny/gpio_early.c
A src/mainboard/lenovo/m900_tiny/hda_verb.c
A src/mainboard/lenovo/m900_tiny/include/mainboard/gpio.h
A src/mainboard/lenovo/m900_tiny/ramstage.c
A src/mainboard/lenovo/m900_tiny/romstage.c
19 files changed, 877 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/80610/6
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Change subject: mb/amd/birman_plus: Add Birman+ board support for Phoenix SOC
......................................................................
mb/amd/birman_plus: Add Birman+ board support for Phoenix SOC
1) Initial commit for upstreaming Birmanplus mainboard changes.
2) Add the DXIO descriptors for Birmanplus mainboard.
Change-Id: I075dcf0214f8dc8b33b0e429d83d270b2f0952e1
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---
M src/mainboard/amd/birman/Kconfig
A src/mainboard/amd/birman_plus/Kconfig
A src/mainboard/amd/birman_plus/Kconfig.name
A src/mainboard/amd/birman_plus/Makefile.mk
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A src/mainboard/amd/birman_plus/board_phoenix.fmd
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A src/mainboard/amd/birman_plus/chromeos.c
A src/mainboard/amd/birman_plus/chromeos_phoenix.fmd
A src/mainboard/amd/birman_plus/devicetree_phoenix.cb
A src/mainboard/amd/birman_plus/dsdt.asl
A src/mainboard/amd/birman_plus/early_gpio.c
A src/mainboard/amd/birman_plus/ec.c
A src/mainboard/amd/birman_plus/ec.h
A src/mainboard/amd/birman_plus/gpio.c
A src/mainboard/amd/birman_plus/gpio.h
A src/mainboard/amd/birman_plus/mainboard.c
A src/mainboard/amd/birman_plus/port_descriptors.c
18 files changed, 1,313 insertions(+), 0 deletions(-)
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Change subject: mb/amd/birman: Add Birman+ board support for Phoenix SOC
......................................................................
mb/amd/birman: Add Birman+ board support for Phoenix SOC
1) Initial commit for upstreaming Birmanplus mainboard changes.
2) Add the DXIO descriptors for Birmanplus mainboard.
Change-Id: I075dcf0214f8dc8b33b0e429d83d270b2f0952e1
Signed-off-by: Anand Vaikar <a.vaikar2021(a)gmail.com>
---
M src/mainboard/amd/birman/Kconfig
A src/mainboard/amd/birman_plus/Kconfig
A src/mainboard/amd/birman_plus/Kconfig.name
A src/mainboard/amd/birman_plus/Makefile.mk
A src/mainboard/amd/birman_plus/board_info.txt
A src/mainboard/amd/birman_plus/board_phoenix.fmd
A src/mainboard/amd/birman_plus/bootblock.c
A src/mainboard/amd/birman_plus/chromeos.c
A src/mainboard/amd/birman_plus/chromeos_phoenix.fmd
A src/mainboard/amd/birman_plus/devicetree_phoenix.cb
A src/mainboard/amd/birman_plus/dsdt.asl
A src/mainboard/amd/birman_plus/early_gpio.c
A src/mainboard/amd/birman_plus/ec.c
A src/mainboard/amd/birman_plus/ec.h
A src/mainboard/amd/birman_plus/gpio.c
A src/mainboard/amd/birman_plus/gpio.h
A src/mainboard/amd/birman_plus/mainboard.c
A src/mainboard/amd/birman_plus/port_descriptors.c
18 files changed, 1,313 insertions(+), 0 deletions(-)
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Change subject: soc/intel/alderlake: Sync UPD Usb4CmMode with Kconfig
......................................................................
Patch Set 5: Code-Review+1
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Change subject: mb/google/volteer: Disable PM ACPI timer to fix S0i3 regression
......................................................................
Patch Set 2:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/80612/comment/1a968e50_01479ce4 :
PS1, Line 7: Fix S0i3 regression
> Maybe: […]
Done
https://review.coreboot.org/c/coreboot/+/80612/comment/0c2508c4_1731ec25 :
PS1, Line 18: Linx
> Linux
Done
Patchset:
PS1:
> Weird, why TGL have issue now. I believe TGL doesn't have this issue before.
not sure if it's kernel or upstream coreboot related, or CrOS worked around the issue at the kernel level?
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Change subject: mb/google/volteer: Disable PM ACPI timer to fix S0i3 regression
......................................................................
mb/google/volteer: Disable PM ACPI timer to fix S0i3 regression
Keeping the PM timer enabled will disqualify an ADL system from entering
S0i3, and will also cause an increase in power during suspend states.
The PM timer is not required for brya boards, therefore disabling it.
Fixes: 0e90580 (soc/intel: transition full control over PM Timer from
FSP to coreboot)
This mirrors an identical commit for google/brya: 1ce0f3aab72d
("mb/google/brya: Fix S0i3 regression")
TEST=Boot Linux on google/drobit, verify S0i3 counter incrementing after
exiting S0ix suspend states.
Change-Id: I644e42388c0f6127512bf52e774b79721601ecc9
Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com>
---
M src/mainboard/google/volteer/Kconfig
1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/80612/2
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Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79058?usp=email )
Change subject: soc/intel/xeon_sp: Allocate resources above 4G
......................................................................
Patch Set 13:
(1 comment)
Patchset:
PS13:
> > Unfortunately this has not been resolved yet... […]
yeah, not sure how you managed to get that error, but as Arthur already pointed out, this isn't a bug in current upstream. marking this as resolved
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