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Change subject: vboot: update submodule to upstream main
......................................................................
Patch Set 1: Code-Review+2
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/85676/comment/a2b331e1_4fda6502?us… :
PS1, Line 9: Updating from commit f1f70f46 to 3f94e2c7. This brings, among other
Run `util/scripts/update_submodules -R ./3rdparty/vboot/ -c 1` to generate the changelog for you.
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Sean Rhodes has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/85693?usp=email )
Change subject: mb/starlabs/*: Declare all DDI interfaces
......................................................................
Patch Set 1: -Code-Review
This change is ready for review.
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Change subject: mb/google/rauru: Implement SKU ID
......................................................................
Patch Set 9:
(2 comments)
File src/mainboard/google/rauru/boardid.c:
https://review.coreboot.org/c/coreboot/+/85666/comment/e2916a5b_5cab2e9f?us… :
PS9, Line 65:
> ``` […]
If the definition starts getting that complicated, I'd suggest using `DEFINE_BITFIELD` API:
```
DEFINE_BITFIELD(STORAGE_TYPE, 11, 9);
DEFINE_BITFIELD(CPU_TYPE, 8, 8);
DEFINE_BITFIELD(PANEL_TYPE, 7, 0);
// sku_id()
cached_sku_code = CROS_SKU_UNPROVISIONED;
SET32_BITFIELDS(&cached_sku_code, STORAGE_TYPE, storage_id());
```
The code is self-explanatory.
It's a little bit weird to use MMIO functions, but I guess the extra `dmb` calls don't hurt.
https://review.coreboot.org/c/coreboot/+/85666/comment/a9243fe6_c3a6ed4a?us… :
PS9, Line 77: 8
Shouldn't this be 9 if bit[11:9] is for storage id?
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Change subject: mb/google/rauru: Add support for getting storage id
......................................................................
Patch Set 1:
(3 comments)
File src/mainboard/google/rauru/boardid.c:
https://review.coreboot.org/c/coreboot/+/85717/comment/a7801f49_fbb8be88?us… :
PS1, Line 16: STORAGE_ID_HIGH_CHANNEL
Do we need this if not used?
https://review.coreboot.org/c/coreboot/+/85717/comment/ee2eb5b8_d89f0505?us… :
PS1, Line 57: panel
storage
File src/mainboard/google/rauru/storage.h:
https://review.coreboot.org/c/coreboot/+/85717/comment/8fea3406_75d39c83?us… :
PS1, Line 5:
> ``` […]
Can we add another function `storage_type()` to return that enum? I think the UFS driver in mtk-fsp will need it, so that the mtk-fsp repo will have the same enum definition.
`storage_id()` can still return the ADC index.
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Change subject: mb/asrock: Add Z87 Extreme4 (Haswell)
......................................................................
Patch Set 2:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/84672/comment/0b01d33b_0fe61982?us… :
PS1, Line 50: resulting in the wrong
: fan being controlled.
> For the HWM, you may need to set `irq 0x30 = 0xe1`. […]
Isn't that set in the devicetree.cb already?
File src/mainboard/asrock/z87_extreme4/Kconfig:
https://review.coreboot.org/c/coreboot/+/84672/comment/16ca5a41_ae05a0be?us… :
PS1, Line 28: config USBDEBUG_HCD_INDEX # FIXME: check this
: int
: default 2
> Yes. […]
I got no match in any of the tested USB ports. I've tried with a USB mouse and a USB-2.0-Stick. Maybe one of the three USB-2.0-Headers would give off a signal, but I have no way of testing them. 😞
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Attention is currently required from: David Hendricks.
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/71167?usp=email
to look at the new patch set (#15).
The following approvals got outdated and were removed:
Verified+1 by build bot (Jenkins)
Change subject: util/intelp2m: Rework platforms and fields packages
......................................................................
util/intelp2m: Rework platforms and fields packages
- Add the base platform interface to be able to reuse its methods.
- The macro structure is excluded from the platform structure.
- Instead of a global macro instance, create a new local structure for
each generated macro.
TEST:
1) 'make test' = PASS
2) './intelp2m -p cnl -iiii -file inteltool.log' = gpio.h before and
after the commit is the same.
Change-Id: I2e0aa56efa2430ac6524c6977f8b6fd13113edf9
Signed-off-by: Maxim Polyakov <max.senia.poliak(a)gmail.com>
---
M util/intelp2m/fields/cb/cb.go
M util/intelp2m/fields/cb/cb_test.go
M util/intelp2m/fields/fields.go
M util/intelp2m/fields/fsp/fsp.go
M util/intelp2m/fields/fsp/fsp_test.go
M util/intelp2m/fields/raw/raw.go
M util/intelp2m/fields/raw/raw_test.go
M util/intelp2m/fields/test/suite.go
M util/intelp2m/parser/parser.go
M util/intelp2m/platforms/adl/adl_test.go
M util/intelp2m/platforms/adl/macro.go
M util/intelp2m/platforms/adl/template.go
M util/intelp2m/platforms/apl/apl_test.go
M util/intelp2m/platforms/apl/macro.go
M util/intelp2m/platforms/apl/template.go
M util/intelp2m/platforms/cnl/cnl_test.go
M util/intelp2m/platforms/cnl/macro.go
M util/intelp2m/platforms/cnl/template.go
A util/intelp2m/platforms/common/common.go
D util/intelp2m/platforms/common/macro.go
A util/intelp2m/platforms/common/macros/macros.go
A util/intelp2m/platforms/common/register/helper.go
M util/intelp2m/platforms/ebg/ebg_test.go
M util/intelp2m/platforms/ebg/macro.go
M util/intelp2m/platforms/ebg/template.go
D util/intelp2m/platforms/interfaces.go
M util/intelp2m/platforms/jsl/jsl_test.go
M util/intelp2m/platforms/jsl/macro.go
M util/intelp2m/platforms/jsl/template.go
M util/intelp2m/platforms/lbg/lbg_test.go
M util/intelp2m/platforms/lbg/macro.go
M util/intelp2m/platforms/lbg/template.go
M util/intelp2m/platforms/mtl/macro.go
M util/intelp2m/platforms/mtl/mtl_test.go
M util/intelp2m/platforms/mtl/template.go
A util/intelp2m/platforms/platforms.go
M util/intelp2m/platforms/snr/macro.go
M util/intelp2m/platforms/snr/snr_test.go
M util/intelp2m/platforms/snr/template.go
M util/intelp2m/platforms/test/suite.go
M util/intelp2m/platforms/tgl/macro.go
M util/intelp2m/platforms/tgl/template.go
M util/intelp2m/platforms/tgl/tgl_test.go
43 files changed, 1,373 insertions(+), 1,695 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/71167/15
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Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85717?usp=email )
Change subject: mb/google/rauru: Add support for getting storage id
......................................................................
Patch Set 1:
(2 comments)
File src/mainboard/google/rauru/mainboard.c:
https://review.coreboot.org/c/coreboot/+/85717/comment/1b447840_ca291771?us… :
PS1, Line 60: mt6363_init_pmif_arb();
: mt6363_enable_vtref18(true);
: mt6363_set_vtref18_voltage(1800000);
: mt6363_get_vtref18_voltage();
> Move to `romstage`. […]
An alternative is powering on `vtref18` in `storage_id` (since this power rail is board-specific design). But it may take times to ramp up.
File src/mainboard/google/rauru/storage.h:
https://review.coreboot.org/c/coreboot/+/85717/comment/8c7f992d_6e76373e?us… :
PS1, Line 5:
```
enum storage_type {
....
};
```
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Comment-In-Reply-To: Yidi Lin <yidilin(a)google.com>
Sean Rhodes has uploaded a new patch set (#4). ( https://review.coreboot.org/c/coreboot/+/84734?usp=email )
Change subject: ec/starlabs/merlin: Always use ECRD and ECWR when accessing EC memory
......................................................................
ec/starlabs/merlin: Always use ECRD and ECWR when accessing EC memory
Ensure any reads or writes to the EC memory, are performed with ECRD
(Read) and ECWR (Write) as these methods use a mutex.
Also, use local variables to cache reads of the same variable.
This solves:
Initialized Arguments for Method [ECRD]: (1 arguments defined for method invocation)
Arg0: 00000000967261a4 [RefOf] <Node> Name ECPS RegionField 000000007d4b8073
ACPI Error: Aborting method \_SB.PCI0.LPCB.EC.ECRD due to previous error (AE_BAD_PARAMETER) (20230628/psparse-529)
ACPI Error: Aborting method \_SB.PCI0.LPCB.EC.ADP1._PSR due to previous error (AE_BAD_PARAMETER) (20230628/psparse-529)
Change-Id: I0bbb538017cc004bff1989a8017ccfcd1ba9ab5c
Signed-off-by: Sean Rhodes <sean(a)starlabs.systems>
---
M src/ec/starlabs/merlin/acpi/battery.asl
M src/ec/starlabs/merlin/acpi/ec.asl
M src/ec/starlabs/merlin/acpi/suspend.asl
M src/ec/starlabs/merlin/variants/apl/events.asl
M src/ec/starlabs/merlin/variants/cezanne/events.asl
M src/ec/starlabs/merlin/variants/glk/events.asl
M src/ec/starlabs/merlin/variants/glkr/events.asl
M src/ec/starlabs/merlin/variants/kbl/events.asl
M src/ec/starlabs/merlin/variants/merlin/events.asl
9 files changed, 46 insertions(+), 41 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/84734/4
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Gerrit-Change-Number: 84734
Gerrit-PatchSet: 4
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Sean Rhodes has uploaded a new patch set (#3). ( https://review.coreboot.org/c/coreboot/+/84734?usp=email )
Change subject: ec/starlabs/merlin: Always use ECRD and ECWR when accessing EC memory
......................................................................
ec/starlabs/merlin: Always use ECRD and ECWR when accessing EC memory
Ensure any reads or writes to the EC memory, are performed with ECRD
(Read) and ECWR (Write) as these methods use a mutex.
Also, use local variables to cache reads of the same variable.
This solves:
Initialized Arguments for Method [ECRD]: (1 arguments defined for method invocation)
Arg0: 00000000967261a4 [RefOf] <Node> Name ECPS RegionField 000000007d4b8073
ACPI Error: Aborting method \_SB.PCI0.LPCB.EC.ECRD due to previous error (AE_BAD_PARAMETER) (20230628/psparse-529)
ACPI Error: Aborting method \_SB.PCI0.LPCB.EC.ADP1._PSR due to previous error (AE_BAD_PARAMETER) (20230628/psparse-529)
Change-Id: I0bbb538017cc004bff1989a8017ccfcd1ba9ab5c
Signed-off-by: Sean Rhodes <sean(a)starlabs.systems>
---
M src/ec/starlabs/merlin/acpi/battery.asl
M src/ec/starlabs/merlin/acpi/ec.asl
M src/ec/starlabs/merlin/acpi/suspend.asl
M src/ec/starlabs/merlin/variants/apl/events.asl
M src/ec/starlabs/merlin/variants/cezanne/events.asl
M src/ec/starlabs/merlin/variants/glk/events.asl
M src/ec/starlabs/merlin/variants/glkr/events.asl
M src/ec/starlabs/merlin/variants/kbl/events.asl
M src/ec/starlabs/merlin/variants/merlin/events.asl
9 files changed, 50 insertions(+), 41 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/84734/3
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