Tim Crawford has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85721?usp=email )
Change subject: mb/system76/mtl: Enable NPU
......................................................................
mb/system76/mtl: Enable NPU
Customers have asked that the NPU device be available.
Change-Id: I2b5c3030c6378c0998a2ac792126c15d2e17bbf9
Signed-off-by: Tim Crawford <tcrawford(a)system76.com>
---
M src/mainboard/system76/mtl/devicetree.cb
1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/85721/1
diff --git a/src/mainboard/system76/mtl/devicetree.cb b/src/mainboard/system76/mtl/devicetree.cb
index d409380..0e1eaac 100644
--- a/src/mainboard/system76/mtl/devicetree.cb
+++ b/src/mainboard/system76/mtl/devicetree.cb
@@ -30,6 +30,7 @@
register "gfx" = "GMA_DEFAULT_PANEL(0)"
end
+ device ref vpu on end
device ref ioe_shared_sram on end
device ref pmc_shared_sram on end
device ref cnvi_wifi on
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Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Martin L Roth, Matt DeVillier, Nick Kochlowski, Varshit Pandya.
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I'd like you to reexamine a change. Please visit
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Change subject: drivers/amd/opensil/memmap.c: Factor out common memmap code to driver
......................................................................
drivers/amd/opensil/memmap.c: Factor out common memmap code to driver
Refactor the vendercode openSIL memory map code and move all common
calls that do not require any openSIL headers to the driver.
Change-Id: I80b9bdd7fd633c7b12d695ced5d4b9b518570d80
Signed-off-by: Nicolas Kochlowski <nickkochlowski(a)gmail.com>
---
M src/drivers/amd/opensil/Makefile.mk
A src/drivers/amd/opensil/memmap.c
M src/drivers/amd/opensil/opensil.h
M src/soc/amd/genoa_poc/domain.c
M src/soc/amd/phoenix/memmap.c
M src/vendorcode/amd/opensil/genoa_poc/memmap.c
M src/vendorcode/amd/opensil/opensil.h
M src/vendorcode/amd/opensil/stub/ramstage.c
8 files changed, 112 insertions(+), 86 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/85634/9
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Nick Kochlowski has posted comments on this change by Nick Kochlowski. ( https://review.coreboot.org/c/coreboot/+/85635?usp=email )
Change subject: drivers/amd/opensil/romstage.c: Implement cbmem_top_chipset in driver
......................................................................
Patch Set 7:
(1 comment)
File src/drivers/amd/opensil/romstage.c:
https://review.coreboot.org/c/coreboot/+/85635/comment/69636cf9_a29f2865?us… :
PS6, Line 13: size so
> should be 'size to'
Done
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Change subject: drivers/amd/opensil/mpio: Factor out common MPIO symbols from vendorcode
......................................................................
Patch Set 7:
(6 comments)
File src/drivers/amd/opensil/mpio/chip.h:
https://review.coreboot.org/c/coreboot/+/85632/comment/89e9bda9_0496001f?us… :
PS6, Line 8: void configure_mpio(void);
> putting this into the driver's opensil. […]
Done
File src/drivers/amd/opensil/mpio/chip.c:
https://review.coreboot.org/c/coreboot/+/85632/comment/9a28d49d_d9e26875?us… :
PS6, Line 8: struct chip_operations drivers_amd_opensil_mpio_ops = {
: .name = "AMD MPIO",
: };
> i'd say that the chip.c is the right place for this specific one. […]
Understood. Seeing as the devicetree/chip ops usage is not conventional as Felix had explained, this could maybe stay here for the time being?
File src/vendorcode/amd/opensil/Kconfig:
https://review.coreboot.org/c/coreboot/+/85632/comment/5e879569_0d5276cc?us… :
PS6, Line 28: ../../../../vendorcode
> if this works, that would be preferrable. […]
Done
File src/vendorcode/amd/opensil/genoa_poc/mpio/chip.c:
https://review.coreboot.org/c/coreboot/+/85632/comment/b4f02ab0_65be8a86?us… :
PS6, Line 134: //
> /\* \*/ comment style
Done
https://review.coreboot.org/c/coreboot/+/85632/comment/1719be40_2cd22b8f?us… :
PS6, Line 202: }
> i think this is missing the final newline
Done
File src/vendorcode/amd/opensil/stub/mpio/chip.c:
https://review.coreboot.org/c/coreboot/+/85632/comment/4cac703f_eec056d3?us… :
PS6, Line 6: "../../opensil.h"
> <src/vendorcode/amd/opensil/opensil. […]
Done
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Change subject: drivers/amd/opensil: Add openSIL timepoint calls
......................................................................
Patch Set 7:
(3 comments)
File src/drivers/amd/opensil/Kconfig:
https://review.coreboot.org/c/coreboot/+/85631/comment/fcb10e31_2b4e5ee7?us… :
PS6, Line 5: depends on SOC_AMD_OPENSIL
> i asked for that one to be put back in some earlier version, but i don't have a super strong opinion […]
Done
File src/drivers/amd/opensil/opensil.h:
https://review.coreboot.org/c/coreboot/+/85631/comment/d01a5875_4ed0b4e9?us… :
PS6, Line 3: _OPENSIL_DRIVER_H_
> good point, now that i've thought about that one, i second that
Done
File src/soc/amd/phoenix/chip.c:
https://review.coreboot.org/c/coreboot/+/85631/comment/e1a06143_97c8ae00?us… :
PS6, Line 3: /* TODO: Update for Phoenix */
> i probably just forgot to remove that one. […]
Pushed a follow-on patch at the end of the chain that removes this comment from any relevant files!
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Stefan Reinauer has posted comments on this change by Matt Turner. ( https://review.coreboot.org/c/coreboot/+/85684?usp=email )
Change subject: util/ifdtool: Fix memory leaks
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS1:
> First time contributing to coreboot. […]
Thank you for your contribution!
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Nick Kochlowski has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85719?usp=email )
Change subject: soc/amd/phoenix: Remove outdated TODO comments
......................................................................
soc/amd/phoenix: Remove outdated TODO comments
Delete the "TODO: Update for Phoenix" comment from files that have
already been updated in the previous chained patches.
Change-Id: I137dbba5094ae8cbf842b45d6137c5b0528e5413
Signed-off-by: Nicolas Kochlowski <nickkochlowski(a)gmail.com>
---
M src/mainboard/amd/birman/devicetree_phoenix_opensil.cb
M src/soc/amd/phoenix/Kconfig
M src/soc/amd/phoenix/Makefile.mk
M src/soc/amd/phoenix/acpi.c
M src/soc/amd/phoenix/chip.h
5 files changed, 0 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/85719/1
diff --git a/src/mainboard/amd/birman/devicetree_phoenix_opensil.cb b/src/mainboard/amd/birman/devicetree_phoenix_opensil.cb
index d84a010..ed2edc6 100644
--- a/src/mainboard/amd/birman/devicetree_phoenix_opensil.cb
+++ b/src/mainboard/amd/birman/devicetree_phoenix_opensil.cb
@@ -1,7 +1,5 @@
# SPDX-License-Identifier: GPL-2.0-only
-# TODO: Update for birman
-
chip soc/amd/phoenix
register "common_config.espi_config" = "{
.std_io_decode_bitmap = ESPI_DECODE_IO_0x80_EN | ESPI_DECODE_IO_0X2E_0X2F_EN | ESPI_DECODE_IO_0X60_0X64_EN,
diff --git a/src/soc/amd/phoenix/Kconfig b/src/soc/amd/phoenix/Kconfig
index b15c12d..a62f8d7 100644
--- a/src/soc/amd/phoenix/Kconfig
+++ b/src/soc/amd/phoenix/Kconfig
@@ -1,7 +1,6 @@
# SPDX-License-Identifier: GPL-2.0-only
# TODO: Evaluate what can be moved to a common directory
-# TODO: Update for Phoenix
config SOC_AMD_PHOENIX_BASE
bool
diff --git a/src/soc/amd/phoenix/Makefile.mk b/src/soc/amd/phoenix/Makefile.mk
index 7713fad..b7fddbe 100644
--- a/src/soc/amd/phoenix/Makefile.mk
+++ b/src/soc/amd/phoenix/Makefile.mk
@@ -1,7 +1,6 @@
# SPDX-License-Identifier: BSD-3-Clause
# TODO: Move as much as possible to common
-# TODO: Update for Phoenix
ifeq ($(CONFIG_SOC_AMD_PHOENIX_BASE),y)
diff --git a/src/soc/amd/phoenix/acpi.c b/src/soc/amd/phoenix/acpi.c
index 1475b61..0f0ec26 100644
--- a/src/soc/amd/phoenix/acpi.c
+++ b/src/soc/amd/phoenix/acpi.c
@@ -1,6 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* TODO: Update for Phoenix */
/* TODO: See what can be made common */
/* ACPI - create the Fixed ACPI Description Tables (FADT) */
diff --git a/src/soc/amd/phoenix/chip.h b/src/soc/amd/phoenix/chip.h
index 07b0dab..771f30c 100644
--- a/src/soc/amd/phoenix/chip.h
+++ b/src/soc/amd/phoenix/chip.h
@@ -1,7 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* TODO: Update for Phoenix */
-
#ifndef PHOENIX_CHIP_H
#define PHOENIX_CHIP_H
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Hello Felix Held, Fred Reitberger, Jason Glenesk, Martin L Roth, Matt DeVillier, Varshit Pandya, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#8).
The following approvals got outdated and were removed:
Verified-1 by build bot (Jenkins)
Change subject: drivers/amd/opensil/memmap.c: Factor out common memmap code to driver
......................................................................
drivers/amd/opensil/memmap.c: Factor out common memmap code to driver
Refactor the vendercode openSIL memory map code and move all common
calls that do not require any openSIL headers to the driver.
Change-Id: I80b9bdd7fd633c7b12d695ced5d4b9b518570d80
Signed-off-by: Nicolas Kochlowski <nickkochlowski(a)gmail.com>
---
M src/drivers/amd/opensil/Makefile.mk
A src/drivers/amd/opensil/memmap.c
M src/drivers/amd/opensil/opensil.h
M src/soc/amd/genoa_poc/domain.c
M src/soc/amd/phoenix/memmap.c
M src/vendorcode/amd/opensil/genoa_poc/memmap.c
M src/vendorcode/amd/opensil/opensil.h
M src/vendorcode/amd/opensil/stub/ramstage.c
8 files changed, 111 insertions(+), 85 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/85634/8
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Hello Felix Held, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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The following approvals got outdated and were removed:
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Change subject: drivers/amd/opensil/romstage.c: Implement cbmem_top_chipset in driver
......................................................................
drivers/amd/opensil/romstage.c: Implement cbmem_top_chipset in driver
Define the generic cbmem_top_chipset() in the driver code, which will
invoke a SoC-specific vendorcode openSIL call to retrieve the low
usable DRAM address.
Change-Id: Ibc79456b0429cdd3d8e3fa5c224799a05add8359
Signed-off-by: Nicolas Kochlowski <nickkochlowski(a)gmail.com>
---
M src/drivers/amd/opensil/Makefile.mk
A src/drivers/amd/opensil/romstage.c
M src/vendorcode/amd/opensil/genoa_poc/romstage.c
M src/vendorcode/amd/opensil/opensil.h
M src/vendorcode/amd/opensil/stub/romstage.c
5 files changed, 37 insertions(+), 24 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/85635/7
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