coreboot-gerrit December 2024

coreboot-gerrit@coreboot.org

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3018 discussions

[L] Change in coreboot[main]: drivers/amd/opensil/mpio: Factor out common MPIO symbols from vendorcode
by Nick Kochlowski (Code Review) 20 Dec '24

20 Dec '24

Attention is currently required from: Fred Reitberger, Jason Glenesk, Martin L Roth, Martin Roth, Matt DeVillier, Nick Kochlowski, Varshit Pandya. Hello Felix Held, Fred Reitberger, Jason Glenesk, Martin L Roth, Matt DeVillier, Varshit Pandya, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85632?usp=email to look at the new patch set (#7). The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: drivers/amd/opensil/mpio: Factor out common MPIO symbols from vendorcode ...................................................................... drivers/amd/opensil/mpio: Factor out common MPIO symbols from vendorcode Refactor vendorcode MPIO configuration functions to be invoked from the openSIL driver. Change-Id: I8b1f92f08565216dd93203a06015e3eec1e7bb69 Signed-off-by: Nicolas Kochlowski <nickkochlowski(a)gmail.com> --- M src/drivers/amd/opensil/Makefile.mk A src/drivers/amd/opensil/mpio/Makefile.mk A src/drivers/amd/opensil/mpio/chip.c R src/drivers/amd/opensil/mpio/chip.h M src/drivers/amd/opensil/opensil.h M src/drivers/amd/opensil/ramstage.c M src/mainboard/amd/birman/devicetree_phoenix_opensil.cb M src/mainboard/amd/birman/update_devicetree_phoenix_opensil.c M src/mainboard/amd/onyx_poc/devicetree.cb M src/soc/amd/genoa_poc/chipset.cb M src/soc/amd/phoenix/chipset_opensil.cb M src/vendorcode/amd/opensil/Kconfig M src/vendorcode/amd/opensil/genoa_poc/mpio/chip.c M src/vendorcode/amd/opensil/genoa_poc/mpio/chip.h M src/vendorcode/amd/opensil/genoa_poc/ramstage.c M src/vendorcode/amd/opensil/opensil.h M src/vendorcode/amd/opensil/stub/mpio/chip.c M src/vendorcode/amd/opensil/stub/mpio/chip.h 18 files changed, 205 insertions(+), 166 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/85632/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/85632?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8b1f92f08565216dd93203a06015e3eec1e7bb69 Gerrit-Change-Number: 85632 Gerrit-PatchSet: 7 Gerrit-Owner: Nick Kochlowski <nickkochlowski(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Nick Kochlowski <nickkochlowski(a)gmail.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com>

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[M] Change in coreboot[main]: drivers/amd/opensil/memmap.c: Factor out common memmap code to driver
by Nick Kochlowski (Code Review) 20 Dec '24

20 Dec '24

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Martin L Roth, Matt DeVillier, Nick Kochlowski, Varshit Pandya. Hello Felix Held, Fred Reitberger, Jason Glenesk, Martin L Roth, Matt DeVillier, Varshit Pandya, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85634?usp=email to look at the new patch set (#8). The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: drivers/amd/opensil/memmap.c: Factor out common memmap code to driver ...................................................................... drivers/amd/opensil/memmap.c: Factor out common memmap code to driver Refactor the vendercode openSIL memory map code and move all common calls that do not require any openSIL headers to the driver. Change-Id: I80b9bdd7fd633c7b12d695ced5d4b9b518570d80 Signed-off-by: Nicolas Kochlowski <nickkochlowski(a)gmail.com> --- M src/drivers/amd/opensil/Makefile.mk A src/drivers/amd/opensil/memmap.c M src/drivers/amd/opensil/opensil.h M src/soc/amd/genoa_poc/domain.c M src/soc/amd/phoenix/memmap.c M src/vendorcode/amd/opensil/genoa_poc/memmap.c M src/vendorcode/amd/opensil/opensil.h M src/vendorcode/amd/opensil/stub/ramstage.c 8 files changed, 111 insertions(+), 85 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/85634/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/85634?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I80b9bdd7fd633c7b12d695ced5d4b9b518570d80 Gerrit-Change-Number: 85634 Gerrit-PatchSet: 8 Gerrit-Owner: Nick Kochlowski <nickkochlowski(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Nick Kochlowski <nickkochlowski(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de>

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[M] Change in coreboot[main]: drivers/amd/opensil/romstage.c: Implement cbmem_top_chipset in driver
by Nick Kochlowski (Code Review) 20 Dec '24

20 Dec '24

Attention is currently required from: Nick Kochlowski. Hello Felix Held, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85635?usp=email to look at the new patch set (#7). The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: drivers/amd/opensil/romstage.c: Implement cbmem_top_chipset in driver ...................................................................... drivers/amd/opensil/romstage.c: Implement cbmem_top_chipset in driver Define the generic cbmem_top_chipset() in the driver code, which will invoke a SoC-specific vendorcode openSIL call to retrieve the low usable DRAM address. Change-Id: Ibc79456b0429cdd3d8e3fa5c224799a05add8359 Signed-off-by: Nicolas Kochlowski <nickkochlowski(a)gmail.com> --- M src/drivers/amd/opensil/Makefile.mk A src/drivers/amd/opensil/romstage.c M src/vendorcode/amd/opensil/genoa_poc/romstage.c M src/vendorcode/amd/opensil/opensil.h M src/vendorcode/amd/opensil/stub/romstage.c 5 files changed, 37 insertions(+), 24 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/85635/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/85635?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibc79456b0429cdd3d8e3fa5c224799a05add8359 Gerrit-Change-Number: 85635 Gerrit-PatchSet: 7 Gerrit-Owner: Nick Kochlowski <nickkochlowski(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Nick Kochlowski <nickkochlowski(a)gmail.com>

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[L] Change in coreboot[main]: mb/asrock: Add Z87 Extreme4 (Haswell)
by Angel Pons (Code Review) 20 Dec '24

20 Dec '24

Attention is currently required from: Jan Philipp Groß, Nicholas Chin. Angel Pons has posted comments on this change by Jan Philipp Groß. ( https://review.coreboot.org/c/coreboot/+/84672?usp=email ) Change subject: mb/asrock: Add Z87 Extreme4 (Haswell) ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/84672/comment/7e36519f_c37310f9?us… : PS1, Line 35: - both SATA3 6.0 Gb/s connectors by ASMedia ASM1061 > It does indeed show up as a Serial ATA controller. […] Okay, so the device shows up but doesn't work at all. Maybe Linux dmesg has some clues, but if not I wouldn't worry too much. -- To view, visit https://review.coreboot.org/c/coreboot/+/84672?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I78791aa9877a3ad79bf8b896c583fedf37e96d9a Gerrit-Change-Number: 84672 Gerrit-PatchSet: 2 Gerrit-Owner: Jan Philipp Groß <jeangrande(a)mailbox.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jan Philipp Groß <jeangrande(a)mailbox.org> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Comment-Date: Fri, 20 Dec 2024 18:11:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Jan Philipp Groß <jeangrande(a)mailbox.org> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com>

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[L] Change in coreboot[main]: mb/asrock: Add Z87 Extreme4 (Haswell)
by Angel Pons (Code Review) 20 Dec '24

20 Dec '24

Attention is currently required from: Jan Philipp Groß, Nicholas Chin. Angel Pons has posted comments on this change by Jan Philipp Groß. ( https://review.coreboot.org/c/coreboot/+/84672?usp=email ) Change subject: mb/asrock: Add Z87 Extreme4 (Haswell) ...................................................................... Patch Set 2: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/84672/comment/7f487855_a9ed5df4?us… : PS1, Line 50: resulting in the wrong : fan being controlled. > Isn't that set in the devicetree. […] It is, then not sure what it might be. File src/mainboard/asrock/z87_extreme4/Kconfig: https://review.coreboot.org/c/coreboot/+/84672/comment/4efc0f17_a6059614?us… : PS1, Line 28: config USBDEBUG_HCD_INDEX # FIXME: check this : int : default 2 > I got no match in any of the tested USB ports. I've tried with a USB mouse and a USB-2.0-Stick. […] Let's leave it as-is. -- To view, visit https://review.coreboot.org/c/coreboot/+/84672?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I78791aa9877a3ad79bf8b896c583fedf37e96d9a Gerrit-Change-Number: 84672 Gerrit-PatchSet: 2 Gerrit-Owner: Jan Philipp Groß <jeangrande(a)mailbox.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jan Philipp Groß <jeangrande(a)mailbox.org> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Comment-Date: Fri, 20 Dec 2024 18:10:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Jan Philipp Groß <jeangrande(a)mailbox.org> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com>

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[XS] Change in coreboot[main]: util/ifdtool: Fix memory leaks
by Matt Turner (Code Review) 20 Dec '24

20 Dec '24

Attention is currently required from: Stefan Reinauer. Matt Turner has posted comments on this change by Matt Turner. ( https://review.coreboot.org/c/coreboot/+/85684?usp=email ) Change subject: util/ifdtool: Fix memory leaks ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: First time contributing to coreboot. Is there anything else I need to do for this to land? -- To view, visit https://review.coreboot.org/c/coreboot/+/85684?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ife6114db99278c9a3fb8271410486b057ef822f6 Gerrit-Change-Number: 85684 Gerrit-PatchSet: 1 Gerrit-Owner: Matt Turner <mattst88(a)gmail.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Comment-Date: Fri, 20 Dec 2024 18:10:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: util/crossgcc: Update variable use
by Raul Rangel (Code Review) 20 Dec '24

20 Dec '24

Attention is currently required from: Jon Murphy, Martin L Roth. Raul Rangel has posted comments on this change by Jon Murphy. ( https://review.coreboot.org/c/coreboot/+/85718?usp=email ) Change subject: util/crossgcc: Update variable use ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85718?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9eb833b11f20b72db88e4094a3297a1d8891bac2 Gerrit-Change-Number: 85718 Gerrit-PatchSet: 2 Gerrit-Owner: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Comment-Date: Fri, 20 Dec 2024 17:47:41 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: util/crossgcc: Update variable use
by Jon Murphy (Code Review) 20 Dec '24

20 Dec '24

Attention is currently required from: Raul Rangel. Jon Murphy has posted comments on this change by Jon Murphy. ( https://review.coreboot.org/c/coreboot/+/85718?usp=email ) Change subject: util/crossgcc: Update variable use ...................................................................... Patch Set 2: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/85718?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9eb833b11f20b72db88e4094a3297a1d8891bac2 Gerrit-Change-Number: 85718 Gerrit-PatchSet: 2 Gerrit-Owner: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Comment-Date: Fri, 20 Dec 2024 17:44:13 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No

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[XL] Change in coreboot[main]: mb/novacustom: add V5x0TU board (Meteor Lake)
by Michał Kopeć (Code Review) 20 Dec '24

20 Dec '24

Attention is currently required from: Krystian Hebel, Maciej Pijanowski, Paul Menzel, Tim Crawford. Michał Kopeć has posted comments on this change by Michał Kopeć. ( https://review.coreboot.org/c/coreboot/+/82673?usp=email ) Change subject: mb/novacustom: add V5x0TU board (Meteor Lake) ...................................................................... Patch Set 22: (5 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/82673/comment/69975ac5_60002d46?us… : PS21, Line 9: boards > laptop or desktop? Laptop, added to the commit message. https://review.coreboot.org/c/coreboot/+/82673/comment/652f414c_cc08c2d6?us… : PS21, Line 17: - DDR5 SODIMM in slot RAM2 > What about other slot(s), doesn't work or not tested? RAM1 slot works, but needs CB:52731 and CB:82733 https://review.coreboot.org/c/coreboot/+/82673/comment/b86550db_fd905b7c?us… : PS21, Line 20: - Video outputs in OS and firmware > What method do you use? FSP GOP - Added to the commit msg https://review.coreboot.org/c/coreboot/+/82673/comment/dcda6631_9aa17c66?us… : PS21, Line 25: > Please document where the VBT comes from. Done File src/mainboard/novacustom/mtl-h/vboot-rwab.fmd: https://review.coreboot.org/c/coreboot/+/82673/comment/b0f41a77_a3c96e96?us… : PS21, Line 15: # MTL does not support a region crossing this boundary, > Is this caused by MTL specifically? If the code were aware of this lack of continuity (e.g. […] The discontinuous extended bios window exists since Alder Lake. This is based on google/rex fmap which has the same comment, and google/brya ADL fmaps also have it. -- To view, visit https://review.coreboot.org/c/coreboot/+/82673?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I82c73ddb1e76a9baf9b97e13124aa249ae1c2771 Gerrit-Change-Number: 82673 Gerrit-PatchSet: 22 Gerrit-Owner: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Comment-Date: Fri, 20 Dec 2024 17:32:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Krystian Hebel <krystian.hebel(a)3mdeb.com>

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[XL] Change in coreboot[main]: mb/novacustom: add V5x0TU board (Meteor Lake)
by Michał Kopeć (Code Review) 20 Dec '24

20 Dec '24

Attention is currently required from: Maciej Pijanowski, Michał Kopeć, Tim Crawford. Hello Krystian Hebel, Maciej Pijanowski, Michał Żygowski, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/82673?usp=email to look at the new patch set (#23). Change subject: mb/novacustom: add V5x0TU board (Meteor Lake) ...................................................................... mb/novacustom: add V5x0TU board (Meteor Lake) NovaCustom (Clevo) V5x0TU are two laptop boards with Intel Core Ultra (Meteor Lake) series processors. Two variants (V540TU and V560TU) are supported. Their EC firmware is different due to keyboard layout changes. On coreboot's side, the only difference are SMBIOS strings. Working: - DDR5 SODIMM in slot RAM2 - M.2 2280 PCIe slots - Thunderbolt, USB ports - Video outputs in OS and firmware (using FSP GOP) - I2C touchpad, webcam, SD Card reader - S0ix - Booting Ubuntu 24.04 with edk2 UefiPayload - Vboot, TPM measured boot VBT blob is extracted from Clevo Insyde firmware, version 1.07.02. Change-Id: I82c73ddb1e76a9baf9b97e13124aa249ae1c2771 Signed-off-by: Michał Kopeć <michal.kopec(a)3mdeb.com> --- A src/mainboard/novacustom/Kconfig A src/mainboard/novacustom/Kconfig.name A src/mainboard/novacustom/mtl-h/Kconfig A src/mainboard/novacustom/mtl-h/Kconfig.name A src/mainboard/novacustom/mtl-h/Makefile.mk A src/mainboard/novacustom/mtl-h/acpi/backlight.asl A src/mainboard/novacustom/mtl-h/acpi/mainboard.asl A src/mainboard/novacustom/mtl-h/board_info.txt A src/mainboard/novacustom/mtl-h/bootblock.c A src/mainboard/novacustom/mtl-h/cmos.default A src/mainboard/novacustom/mtl-h/cmos.layout A src/mainboard/novacustom/mtl-h/data.vbt A src/mainboard/novacustom/mtl-h/devicetree.cb A src/mainboard/novacustom/mtl-h/dsdt.asl A src/mainboard/novacustom/mtl-h/fadt.c A src/mainboard/novacustom/mtl-h/gpio.c A src/mainboard/novacustom/mtl-h/gpio_early.c A src/mainboard/novacustom/mtl-h/hda_verb.c A src/mainboard/novacustom/mtl-h/include/mainboard/gpio.h A src/mainboard/novacustom/mtl-h/ramstage.c A src/mainboard/novacustom/mtl-h/romstage.c A src/mainboard/novacustom/mtl-h/vboot-rwab.fmd 22 files changed, 1,387 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/82673/23 -- To view, visit https://review.coreboot.org/c/coreboot/+/82673?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I82c73ddb1e76a9baf9b97e13124aa249ae1c2771 Gerrit-Change-Number: 82673 Gerrit-PatchSet: 23 Gerrit-Owner: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com>

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coreboot-gerrit December 2024