coreboot-gerrit December 2024

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[XS] Change in coreboot[main]: device: Fix debug print
by Nicholas Chin (Code Review) 31 Dec '24

31 Dec '24

Attention is currently required from: Patrick Rudolph. Nicholas Chin has posted comments on this change by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/85807?usp=email ) Change subject: device: Fix debug print ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85807?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib153e1d02a08b2551dad5b51c4c88bf0bb606af3 Gerrit-Change-Number: 85807 Gerrit-PatchSet: 3 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Comment-Date: Tue, 31 Dec 2024 04:42:06 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: device: Fix debug print
by Nicholas Chin (Code Review) 31 Dec '24

31 Dec '24

Attention is currently required from: Patrick Rudolph. Nicholas Chin has posted comments on this change by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/85807?usp=email ) Change subject: device: Fix debug print ...................................................................... Patch Set 3: (1 comment) File src/device/device_util.c: https://review.coreboot.org/c/coreboot/+/85807/comment/9ae14db2_0d0c442d?us… : PS3, Line 550: 16 I count 15 (including null terminator) but this is probably fine. -- To view, visit https://review.coreboot.org/c/coreboot/+/85807?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib153e1d02a08b2551dad5b51c4c88bf0bb606af3 Gerrit-Change-Number: 85807 Gerrit-PatchSet: 3 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Comment-Date: Tue, 31 Dec 2024 04:42:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[L] Change in coreboot[main]: mb/asrock: Add Z77 Extreme4
by Nicholas Chin (Code Review) 31 Dec '24

31 Dec '24

Attention is currently required from: Angel Pons, Riku Viitanen. Nicholas Chin has posted comments on this change by Riku Viitanen. ( https://review.coreboot.org/c/coreboot/+/85772?usp=email ) Change subject: mb/asrock: Add Z77 Extreme4 ...................................................................... Patch Set 10: (13 comments) File src/mainboard/asrock/z77_extreme4/Kconfig: https://review.coreboot.org/c/coreboot/+/85772/comment/1be16ffe_bc3f39a3?us… : PS10, Line 27: int Type not needed here as it's defined in `sb/intel/bd82x6x/Kconfig` File src/mainboard/asrock/z77_extreme4/devicetree.cb: PS10: Some nits based on reviews of some of my ports. I'm not particularly picky about these. https://review.coreboot.org/c/coreboot/+/85772/comment/d158053d_8134a84e?us… : PS10, Line 4: register "gpu_dp_b_hotplug" = "4" : register "gpu_dp_c_hotplug" = "4" : register "gpu_dp_d_hotplug" = "4" Move under igd device https://review.coreboot.org/c/coreboot/+/85772/comment/2be77e37_e4bf6d9d?us… : PS10, Line 24: register "gen1_dec" = "0x000c0291" : register "gen2_dec" = "0x000c0241" : register "gen3_dec" = "0x000c0251" Move under lpc device (probably between subsystem and the superio) https://review.coreboot.org/c/coreboot/+/85772/comment/2283ac31_80c3c270?us… : PS10, Line 28: register "sata_interface_speed_support" = "0x3" : register "sata_port_map" = "0x3f" Move under sata1 device https://review.coreboot.org/c/coreboot/+/85772/comment/2e0557fa_9d6f263c?us… : PS10, Line 32: register "superspeed_capable_ports" = "0x0000000f" Move under xhci device https://review.coreboot.org/c/coreboot/+/85772/comment/ac93cba4_62913ecb?us… : PS10, Line 49: register "xhci_overcurrent_mapping" = "0x00000c03" : register "xhci_switchable_ports" = "0x0000000f" Move under xhci device https://review.coreboot.org/c/coreboot/+/85772/comment/bcb49124_4fa49ea7?us… : PS10, Line 57: device ref mei2 off end : device ref me_ide_r off end : device ref me_kt off end : device ref gbe off end Defaults to off in chipset devicetree, could be removed https://review.coreboot.org/c/coreboot/+/85772/comment/f7e1a1cc_3df5327c?us… : PS10, Line 71: device ref pcie_rp2 off end : device ref pcie_rp3 off end Defaults to off in chipset devicetree, could be removed https://review.coreboot.org/c/coreboot/+/85772/comment/92b4e9b1_c4374f10?us… : PS10, Line 91: device ref pci_bridge off end Defaults to off in chipset devicetree, could be removed. https://review.coreboot.org/c/coreboot/+/85772/comment/57c79c23_f25f3567?us… : PS10, Line 157: end Move to previous line https://review.coreboot.org/c/coreboot/+/85772/comment/c80c32d7_a42fc228?us… : PS10, Line 166: device ref sata2 off end : device ref thermal off end Defaults to off in chipset devicetree, could be removed File src/mainboard/asrock/z77_extreme4/mainboard.c: https://review.coreboot.org/c/coreboot/+/85772/comment/e239c5ed_fe91a166?us… : PS10, Line 5: #include <southbridge/intel/bd82x6x/pch.h> Doesn't seem to be used, remove. -- To view, visit https://review.coreboot.org/c/coreboot/+/85772?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idf028c6d411bd501b73a3c526240d0b1d6ecaa0c Gerrit-Change-Number: 85772 Gerrit-PatchSet: 10 Gerrit-Owner: Riku Viitanen <riku.viitanen(a)protonmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Riku Viitanen <riku.viitanen(a)protonmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Tue, 31 Dec 2024 04:31:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[L] Change in coreboot[main]: mb/asrock: Add Z77 Extreme4
by Nicholas Chin (Code Review) 31 Dec '24

31 Dec '24

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[M] Change in coreboot[main]: soc/mediatek/mt8196: Add disable modem power driver
by Yu-Ping Wu (Code Review) 31 Dec '24

31 Dec '24

Attention is currently required from: Hung-Te Lin, Jarried Lin. Yu-Ping Wu has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85651?usp=email ) Change subject: soc/mediatek/mt8196: Add disable modem power driver ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/85651/comment/60304a0d_4e825bc4?us… : PS3, Line 7: disable modem power driver > modem power driver to disable unused power Any update? -- To view, visit https://review.coreboot.org/c/coreboot/+/85651?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia8808e3500727753e4537017b46ac8ab39d59468 Gerrit-Change-Number: 85651 Gerrit-PatchSet: 3 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Tue, 31 Dec 2024 03:34:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

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[S] Change in coreboot[main]: mb/google/rauru: Raise little core CPU frequency from 700MHz to 2.4GHz
by Yidi Lin (Code Review) 31 Dec '24

31 Dec '24

Yidi Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/85773?usp=email ) Change subject: mb/google/rauru: Raise little core CPU frequency from 700MHz to 2.4GHz ...................................................................... mb/google/rauru: Raise little core CPU frequency from 700MHz to 2.4GHz To improve boot time, raise little CPU from 700MHz to 2.4GHz at romstage (before DRAM calibration). FW logs: Check CPU freq: 2400120 KHz BUG=b:317009620 TEST=Build pass, boot ok. Change-Id: I14a31f3a51ca246b842cc0ef740c43ff5d857310 Signed-off-by: Jarried Lin <jarried.lin(a)mediatek.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/85773 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Yidi Lin <yidilin(a)google.com> Reviewed-by: Yu-Ping Wu <yupingso(a)google.com> --- M src/mainboard/google/rauru/romstage.c 1 file changed, 10 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Yidi Lin: Looks good to me, approved Yu-Ping Wu: Looks good to me, approved diff --git a/src/mainboard/google/rauru/romstage.c b/src/mainboard/google/rauru/romstage.c index af396a8..afd12c6 100644 --- a/src/mainboard/google/rauru/romstage.c +++ b/src/mainboard/google/rauru/romstage.c @@ -9,8 +9,17 @@ #include <soc/mt6685.h> #include <soc/mtk_pwrsel.h> #include <soc/pcie.h> +#include <soc/pll.h> #include <soc/pmif.h> +static void raise_little_cpu_freq(void) +{ + mt6316_buck_set_voltage(SPMI_SLAVE_8, MT6316_BUCK_3, 1050000); + printk(BIOS_INFO, "%s: little core voltage: %d\n", + __func__, mt6316_buck_get_voltage(SPMI_SLAVE_8, MT6316_BUCK_3)); + mt_pll_raise_little_cpu_freq(2400U * MHz); +} + void platform_romstage_main(void) { irq2axi_disable(); @@ -20,6 +29,7 @@ mt6363_enable_vtref18(true); mt6363_set_vtref18_voltage(1800000); mt6316_init(); + raise_little_cpu_freq(); mt6373_init(); mt6685_init(); mtk_dram_init(); -- To view, visit https://review.coreboot.org/c/coreboot/+/85773?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I14a31f3a51ca246b842cc0ef740c43ff5d857310 Gerrit-Change-Number: 85773 Gerrit-PatchSet: 9 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[S] Change in coreboot[main]: mb/google/rauru: Initialize PMICs in romstage
by Yidi Lin (Code Review) 31 Dec '24

31 Dec '24

Yidi Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/85755?usp=email ) Change subject: mb/google/rauru: Initialize PMICs in romstage ...................................................................... mb/google/rauru: Initialize PMICs in romstage BUG=b:317009620 TEST=Build pass, boot ok. Change-Id: Ia220db1d8d6d20e508f5e4d47054922012f6c417 Signed-off-by: Jarried Lin <jarried.lin(a)mediatek.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/85755 Reviewed-by: Yidi Lin <yidilin(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso(a)google.com> --- M src/mainboard/google/rauru/romstage.c 1 file changed, 9 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Yu-Ping Wu: Looks good to me, approved Yidi Lin: Looks good to me, approved diff --git a/src/mainboard/google/rauru/romstage.c b/src/mainboard/google/rauru/romstage.c index 6ecaf61..af396a8 100644 --- a/src/mainboard/google/rauru/romstage.c +++ b/src/mainboard/google/rauru/romstage.c @@ -3,17 +3,25 @@ #include <arch/stages.h> #include <soc/emi.h> #include <soc/irq2axi.h> +#include <soc/mt6316.h> #include <soc/mt6363.h> +#include <soc/mt6373.h> +#include <soc/mt6685.h> #include <soc/mtk_pwrsel.h> #include <soc/pcie.h> +#include <soc/pmif.h> void platform_romstage_main(void) { irq2axi_disable(); pwrsel_init(); - mt6363_init_pmif_arb(); + mtk_pmif_init(); + mt6363_init(); mt6363_enable_vtref18(true); mt6363_set_vtref18_voltage(1800000); + mt6316_init(); + mt6373_init(); + mt6685_init(); mtk_dram_init(); if (CONFIG(PCI)) -- To view, visit https://review.coreboot.org/c/coreboot/+/85755?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia220db1d8d6d20e508f5e4d47054922012f6c417 Gerrit-Change-Number: 85755 Gerrit-PatchSet: 11 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[S] Change in blobs[main]: soc/mediatek/mt8196: Add GPUEB firmware v1.0
by Yidi Lin (Code Review) 31 Dec '24

31 Dec '24

Attention is currently required from: Andy Hsu, Jarried Lin, Yu-Ping Wu. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/blobs/+/85763?usp=email ) Change subject: soc/mediatek/mt8196: Add GPUEB firmware v1.0 ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/blobs/+/85763?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: blobs Gerrit-Branch: main Gerrit-Change-Id: I470f1575beea481cac2dcb5f3eb77587739ff2dc Gerrit-Change-Number: 85763 Gerrit-PatchSet: 4 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Andy Hsu <andy.hsu(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Andy Hsu <andy.hsu(a)mediatek.corp-partner.google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Tue, 31 Dec 2024 03:22:04 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: mb/hp/snb_ivb_desktops/variants: Remove unused includes
by Elyes Haouas (Code Review) 31 Dec '24

31 Dec '24

Attention is currently required from: Riku Viitanen. Elyes Haouas has posted comments on this change by Riku Viitanen. ( https://review.coreboot.org/c/coreboot/+/85815?usp=email ) Change subject: mb/hp/snb_ivb_desktops/variants: Remove unused includes ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85815?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib4082a2589441b1d257db622380733e2825b27c2 Gerrit-Change-Number: 85815 Gerrit-PatchSet: 2 Gerrit-Owner: Riku Viitanen <riku.viitanen(a)protonmail.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Riku Viitanen <riku.viitanen(a)protonmail.com> Gerrit-Comment-Date: Tue, 31 Dec 2024 03:07:03 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: mb/google/fatcat/var/fatcat: Add touchpad wake source
by Subrata Banik (Code Review) 31 Dec '24

31 Dec '24

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/85803?usp=email ) Change subject: mb/google/fatcat/var/fatcat: Add touchpad wake source ...................................................................... mb/google/fatcat/var/fatcat: Add touchpad wake source This change adds the wake source for the touchpad on the google/fatcat mainboard. This allows the touchpad to wake the system from suspend. BUG=b:274919134 TEST=Verified that the system can be woken up from suspend by tapping the touchpad. Change-Id: I6b265fb6b220cc779ea011e767ae98d4cf37e0d2 Signed-off-by: Subrata Banik <subratabanik(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/85803 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Pranava Y N <pranavayn(a)google.com> --- M src/mainboard/google/fatcat/variants/fatcat/overridetree.cb 1 file changed, 1 insertion(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Pranava Y N: Looks good to me, approved diff --git a/src/mainboard/google/fatcat/variants/fatcat/overridetree.cb b/src/mainboard/google/fatcat/variants/fatcat/overridetree.cb index 5a4af8e..95a142f 100644 --- a/src/mainboard/google/fatcat/variants/fatcat/overridetree.cb +++ b/src/mainboard/google/fatcat/variants/fatcat/overridetree.cb @@ -757,6 +757,7 @@ register "generic.hid" = ""HFW68H"" register "generic.desc" = ""Hynitron TOUCHPAD"" register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_A13_IRQ)" + register "generic.wake" = "GPE0_DW0_13" register "generic.uid" = "5" register "generic.detect" = "1" register "hid_desc_reg_offset" = "0x20" -- To view, visit https://review.coreboot.org/c/coreboot/+/85803?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6b265fb6b220cc779ea011e767ae98d4cf37e0d2 Gerrit-Change-Number: 85803 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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coreboot-gerrit December 2024