coreboot-gerrit December 2024

coreboot-gerrit@coreboot.org

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3018 discussions

[XS] Change in coreboot[main]: mb/google/nissa/var/pujjo: Add new supported memory part
by Luca Lai (Code Review) 23 Dec '24

23 Dec '24

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Subrata Banik. Luca Lai has posted comments on this change by Luca Lai. ( https://review.coreboot.org/c/coreboot/+/85735?usp=email ) Change subject: mb/google/nissa/var/pujjo: Add new supported memory part ...................................................................... Patch Set 2: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/85735?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idb48e849424aac79ef9af29f21b84194455c813e Gerrit-Change-Number: 85735 Gerrit-PatchSet: 2 Gerrit-Owner: Luca Lai <luca.lai(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Mon, 23 Dec 2024 07:16:00 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: mb/google/rauru: Implement SKU ID
by Yidi Lin (Code Review) 23 Dec '24

23 Dec '24

Attention is currently required from: Hung-Te Lin, Jarried Lin, Knox Chiou, Yu-Ping Wu. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85666?usp=email ) Change subject: mb/google/rauru: Implement SKU ID ...................................................................... Patch Set 11: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85666?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I49ba6f428f55d3aae1b84a4d5ce06bec765caece Gerrit-Change-Number: 85666 Gerrit-PatchSet: 11 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Knox Chiou <knoxchiou(a)google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Knox Chiou <knoxchiou(a)google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Mon, 23 Dec 2024 07:15:00 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: mb/google/nissa/var/pujjo: Add new supported memory part
by Luca Lai (Code Review) 23 Dec '24

23 Dec '24

Luca Lai has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85735?usp=email ) Change subject: mb/google/nissa/var/pujjo: Add new supported memory part ...................................................................... mb/google/nissa/var/pujjo: Add new supported memory part Add pujjo new supported memory parts in mem_parts_used.txt. Generate SPD id for this part. Hynix H58G56CK8BX146 BUG=b:385659484 TEST=Use part_id_gen to generate related settings Change-Id: Idb48e849424aac79ef9af29f21b84194455c813e --- M src/mainboard/google/brya/variants/pujjo/memory/Makefile.mk M src/mainboard/google/brya/variants/pujjo/memory/dram_id.generated.txt M src/mainboard/google/brya/variants/pujjo/memory/mem_parts_used.txt 3 files changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/85735/1 diff --git a/src/mainboard/google/brya/variants/pujjo/memory/Makefile.mk b/src/mainboard/google/brya/variants/pujjo/memory/Makefile.mk index 3993dc6..6eb1600 100644 --- a/src/mainboard/google/brya/variants/pujjo/memory/Makefile.mk +++ b/src/mainboard/google/brya/variants/pujjo/memory/Makefile.mk @@ -10,3 +10,4 @@ SPD_SOURCES += spd/lp5/set-0/spd-2.hex # ID = 3(0b0011) Parts = MT62F1G32D4DR-031 WT:B SPD_SOURCES += spd/lp5/set-0/spd-7.hex # ID = 4(0b0100) Parts = H58G56BK7BX068, K3KL8L80CM-MGCT, MT62F1G32D2DS-026 WT:B SPD_SOURCES += spd/lp5/set-0/spd-9.hex # ID = 5(0b0101) Parts = K3KL6L60GM-MGCT +SPD_SOURCES += spd/lp5/set-0/spd-11.hex # ID = 6(0b0110) Parts = H58G56CK8BX146 diff --git a/src/mainboard/google/brya/variants/pujjo/memory/dram_id.generated.txt b/src/mainboard/google/brya/variants/pujjo/memory/dram_id.generated.txt index 93edc7d..d6ddf1b 100644 --- a/src/mainboard/google/brya/variants/pujjo/memory/dram_id.generated.txt +++ b/src/mainboard/google/brya/variants/pujjo/memory/dram_id.generated.txt @@ -14,3 +14,4 @@ K3KL6L60GM-MGCT 5 (0101) K3KL8L80CM-MGCT 4 (0100) MT62F1G32D2DS-026 WT:B 4 (0100) +H58G56CK8BX146 6 (0110) diff --git a/src/mainboard/google/brya/variants/pujjo/memory/mem_parts_used.txt b/src/mainboard/google/brya/variants/pujjo/memory/mem_parts_used.txt index 61d49b8..53eb239 100644 --- a/src/mainboard/google/brya/variants/pujjo/memory/mem_parts_used.txt +++ b/src/mainboard/google/brya/variants/pujjo/memory/mem_parts_used.txt @@ -19,3 +19,4 @@ K3KL6L60GM-MGCT K3KL8L80CM-MGCT MT62F1G32D2DS-026 WT:B ++H58G56CK8BX146 -- To view, visit https://review.coreboot.org/c/coreboot/+/85735?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idb48e849424aac79ef9af29f21b84194455c813e Gerrit-Change-Number: 85735 Gerrit-PatchSet: 1 Gerrit-Owner: Luca Lai <luca.lai(a)lcfc.corp-partner.google.com>

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[S] Change in coreboot[main]: soc/intel/alderlake: Add IRQ mapping for PEG PCI-E ports
by Kapil Porwal (Code Review) 23 Dec '24

23 Dec '24

Attention is currently required from: Dinesh Gehlot, Jayvik Desai, Michał Żygowski, Nick Vaccaro, Sean Rhodes, Subrata Banik. Kapil Porwal has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/84620?usp=email ) Change subject: soc/intel/alderlake: Add IRQ mapping for PEG PCI-E ports ...................................................................... Patch Set 4: (1 comment) File src/soc/intel/alderlake/acpi/pcie_pch_s.asl: https://review.coreboot.org/c/coreboot/+/84620/comment/8a36ea8f_f09c30b9?us… : PS4, Line 301: Extra newline causing CQ failure. -- To view, visit https://review.coreboot.org/c/coreboot/+/84620?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2e36cee37716d3b003b9ce250f28fdf5581a15bc Gerrit-Change-Number: 84620 Gerrit-PatchSet: 4 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Mon, 23 Dec 2024 06:44:28 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[M] Change in coreboot[main]: soc/intel/alderlake: Add function to force disable memory channels
by Kapil Porwal (Code Review) 23 Dec '24

23 Dec '24

Attention is currently required from: Angel Pons, Christian Walter, Dinesh Gehlot, Eric Lai, Jamie Chen, Jayvik Desai, Jeremy Soller, Kapil Porwal, Lean Sheng Tan, Michał Kopeć, Michał Żygowski, Nick Vaccaro, Paul Menzel, Piotr Król, Sean Rhodes, Tim Crawford. Kapil Porwal has posted comments on this change by Kapil Porwal. ( https://review.coreboot.org/c/coreboot/+/85529?usp=email ) Change subject: soc/intel/alderlake: Add function to force disable memory channels ...................................................................... Patch Set 9: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/85529/comment/23fe990b_480765e2?us… : PS3, Line 8: > In firmware context, "memory channel" is not at all ambiguous term. […] Acknowledged -- To view, visit https://review.coreboot.org/c/coreboot/+/85529?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibfeca4509cb3d88bc1bac2ac2d480e665d895bc5 Gerrit-Change-Number: 85529 Gerrit-PatchSet: 9 Gerrit-Owner: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jamie Chen <jamie.chen(a)intel.corp-partner.google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Lean Sheng Tan <tanleansheng(a)outlook.com> Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Jamie Chen <jamie.chen(a)intel.corp-partner.google.com> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <tanleansheng(a)outlook.com> Gerrit-Comment-Date: Mon, 23 Dec 2024 06:41:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Kapil Porwal <kapilporwal(a)google.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com>

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[M] Change in coreboot[main]: soc/intel/alderlake: Add function to force disable memory channels
by Subrata Banik (Code Review) 23 Dec '24

23 Dec '24

Attention is currently required from: Angel Pons, Christian Walter, Dinesh Gehlot, Eric Lai, Jamie Chen, Jayvik Desai, Jeremy Soller, Kapil Porwal, Lean Sheng Tan, Michał Kopeć, Michał Żygowski, Nick Vaccaro, Paul Menzel, Piotr Król, Sean Rhodes, Tim Crawford. Subrata Banik has posted comments on this change by Kapil Porwal. ( https://review.coreboot.org/c/coreboot/+/85529?usp=email ) Change subject: soc/intel/alderlake: Add function to force disable memory channels ...................................................................... Patch Set 9: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85529?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibfeca4509cb3d88bc1bac2ac2d480e665d895bc5 Gerrit-Change-Number: 85529 Gerrit-PatchSet: 9 Gerrit-Owner: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jamie Chen <jamie.chen(a)intel.corp-partner.google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Lean Sheng Tan <tanleansheng(a)outlook.com> Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Jamie Chen <jamie.chen(a)intel.corp-partner.google.com> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <tanleansheng(a)outlook.com> Gerrit-Comment-Date: Mon, 23 Dec 2024 06:41:02 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: soc/mediatek/mt8189: Enable timer compensation v2.5
by Vince Liu (Code Review) 23 Dec '24

23 Dec '24

Attention is currently required from: Hung-Te Lin, Paul Menzel, Yidi Lin, Yu-Ping Wu. Vince Liu has posted comments on this change by Vince Liu. ( https://review.coreboot.org/c/coreboot/+/85689?usp=email ) Change subject: soc/mediatek/mt8189: Enable timer compensation v2.5 ...................................................................... Patch Set 4: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/85689/comment/aec0824e_233d9e0a?us… : PS3, Line 7: dd timer support : : Add ARM arch timer support for MT8189. > This patch should be `Enable timer compensation` Done -- To view, visit https://review.coreboot.org/c/coreboot/+/85689?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I28c051c2e51481464f5dacb4c93f41e4f7e62501 Gerrit-Change-Number: 85689 Gerrit-PatchSet: 4 Gerrit-Owner: Vince Liu <vince-wl.liu(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Mon, 23 Dec 2024 06:29:27 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yidi Lin <yidilin(a)google.com>

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[XS] Change in coreboot[main]: soc/mediatek/mt8189: Enable timer compensation v2.5
by Vince Liu (Code Review) 23 Dec '24

23 Dec '24

Attention is currently required from: Hung-Te Lin, Paul Menzel, Vince Liu, Yu-Ping Wu. Hello Hung-Te Lin, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85689?usp=email to look at the new patch set (#4). Change subject: soc/mediatek/mt8189: Enable timer compensation v2.5 ...................................................................... soc/mediatek/mt8189: Enable timer compensation v2.5 Enable timer compensation v2.5 for MT8189 systimer. BUG=b:379008996 BRANCH=none TEST=Check SYSTIMER_BASE register is configurated correctly. Change-Id: I28c051c2e51481464f5dacb4c93f41e4f7e62501 Signed-off-by: Ke Zheng <ot_ke.zheng(a)mediatek.corp-partner.google.com> --- M src/soc/mediatek/mt8189/Makefile.mk M src/soc/mediatek/mt8189/timer.c 2 files changed, 5 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/85689/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/85689?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I28c051c2e51481464f5dacb4c93f41e4f7e62501 Gerrit-Change-Number: 85689 Gerrit-PatchSet: 4 Gerrit-Owner: Vince Liu <vince-wl.liu(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Vince Liu <vince-wl.liu(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com>

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[M] Change in coreboot[main]: soc/intel/alderlake: Add function to force disable memory channels
by Kapil Porwal (Code Review) 23 Dec '24

23 Dec '24

Attention is currently required from: Angel Pons, Christian Walter, Dinesh Gehlot, Eric Lai, Jamie Chen, Jayvik Desai, Jeremy Soller, Lean Sheng Tan, Michał Kopeć, Michał Żygowski, Nick Vaccaro, Paul Menzel, Piotr Król, Sean Rhodes, Subrata Banik, Tim Crawford. Kapil Porwal has posted comments on this change by Kapil Porwal. ( https://review.coreboot.org/c/coreboot/+/85529?usp=email ) Change subject: soc/intel/alderlake: Add function to force disable memory channels ...................................................................... Patch Set 9: (1 comment) File src/soc/intel/alderlake/meminit.c: https://review.coreboot.org/c/coreboot/+/85529/comment/dcbfd28d_51afa087?us… : PS8, Line 259: printk(BIOS_ERR, "Cannot disable the first channel.\n"); > (Mc0Ch0) Acknowledged -- To view, visit https://review.coreboot.org/c/coreboot/+/85529?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibfeca4509cb3d88bc1bac2ac2d480e665d895bc5 Gerrit-Change-Number: 85529 Gerrit-PatchSet: 9 Gerrit-Owner: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jamie Chen <jamie.chen(a)intel.corp-partner.google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Lean Sheng Tan <tanleansheng(a)outlook.com> Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Jamie Chen <jamie.chen(a)intel.corp-partner.google.com> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <tanleansheng(a)outlook.com> Gerrit-Comment-Date: Mon, 23 Dec 2024 06:28:02 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

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[L] Change in coreboot[main]: soc/mediatek/mt8196: Add GPUEB support
by Yidi Lin (Code Review) 23 Dec '24

23 Dec '24

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yu-Ping Wu. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85654?usp=email ) Change subject: soc/mediatek/mt8196: Add GPUEB support ...................................................................... Patch Set 2: (7 comments) File src/soc/mediatek/mt8196/gpueb.c: https://review.coreboot.org/c/coreboot/+/85654/comment/279184f0_a8e5e411?us… : PS2, Line 123: : if (read32p(MFG_RPC_MFG0_PWR_CON) == MFG0_PWR_ON_VALUE) : return; : : if (!(read32p(MFG_RPC_MFG0_PWR_CON) & MFG0_PWR_SRAM_PDN)) : return; Please add comments why the setting can be omitted in these two conditions. https://review.coreboot.org/c/coreboot/+/85654/comment/442d7a8f_a069b7df?us… : PS2, Line 225: 1 PT_FW_IDX_GPUEB_FW File src/soc/mediatek/mt8196/include/soc/gpueb_priv.h: https://review.coreboot.org/c/coreboot/+/85654/comment/e5f51575_39e052c4?us… : PS2, Line 10: #define SPM2GPUPM_CON (SPM_BASE + 0x0410) /* 0x1C004410 */ : #define SPM_REQ_STA_9 (SPM_BASE + 0x0884) /* 0x1C004884 */ : #define SPM_MFG0_PWR_CON (SPM_BASE + 0x0EA8) remove https://review.coreboot.org/c/coreboot/+/85654/comment/4fa47751_b5b1834f?us… : PS2, Line 13: define GPUEB_BASE (MFGSYS_BASE + 0x0B000000) /* 0x4B000000 */ : #define MFG_RPC_BASE (MFGSYS_BASE + 0x0B800000) move to soc/addressmap.h https://review.coreboot.org/c/coreboot/+/85654/comment/29619311_6eec2213?us… : PS2, Line 57: #define MFG_RPC_GHPM_CFG13_CON (GPU_EB_RPC_BASE + 0x0834) /* 0x4B800834 */ : #define MFG_GHPM_RO2_CON (MFG_RPC_BASE + 0x09AC) /* 0x4B8009AC */ why are they using different bases ? https://review.coreboot.org/c/coreboot/+/85654/comment/571b4876_ee355883?us… : PS2, Line 75: GPUEB_GPR_SIZE + \ move to the above line. https://review.coreboot.org/c/coreboot/+/85654/comment/4d7fc611_55f41ae2?us… : PS2, Line 197: memory addr; current setting is within the 4GB memory : * region : */ The FW address is in the 4GB range. -- To view, visit https://review.coreboot.org/c/coreboot/+/85654?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0f10dfc753f73df97ea08a4c23e97de416832be2 Gerrit-Change-Number: 85654 Gerrit-PatchSet: 2 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Andy Hsu <andy.hsu(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Mon, 23 Dec 2024 06:19:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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