coreboot-gerrit December 2024

coreboot-gerrit@coreboot.org

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[XS] Change in coreboot[main]: tree: Use gnu23
by Elyes Haouas (Code Review) 24 Dec '24

24 Dec '24

Elyes Haouas has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85748?usp=email ) Change subject: tree: Use gnu23 ...................................................................... tree: Use gnu23 Change-Id: I42c0b3769f0c6e5c2261b9084e229c35576a832d Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M Makefile.mk 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/85748/1 diff --git a/Makefile.mk b/Makefile.mk index ca79d05..a576049 100644 --- a/Makefile.mk +++ b/Makefile.mk @@ -507,7 +507,7 @@ CFLAGS_common += -pipe CFLAGS_common += -g CFLAGS_common += -nostdinc -CFLAGS_common += -std=gnu11 +CFLAGS_common += -std=gnu23 CFLAGS_common += -nostdlib CFLAGS_common += -Wall CFLAGS_common += -Wundef -- To view, visit https://review.coreboot.org/c/coreboot/+/85748?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I42c0b3769f0c6e5c2261b9084e229c35576a832d Gerrit-Change-Number: 85748 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr>

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[XS] Change in coreboot[main]: Update opensbi submodule to upstream master
by Elyes Haouas (Code Review) 24 Dec '24

24 Dec '24

Elyes Haouas has uploaded a new patch set (#3). ( https://review.coreboot.org/c/coreboot/+/85732?usp=email ) Change subject: Update opensbi submodule to upstream master ...................................................................... Update opensbi submodule to upstream master Updating from commit id 5019fd124b4c: 2022-09-01 16:53:28 +0530 - (include: sbi: Reduce includes in sbi_pmu.h) to commit id d539d64a23bb: 2024-12-21 21:38:50 +0530 - (include: sbi: Fix compiling with C23 enabled compilers) This brings in 709 new commits. Change-Id: Ic050c7b8dc2e202ee3b7fe07c749181c0845f0e7 Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M 3rdparty/opensbi 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/85732/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/85732?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic050c7b8dc2e202ee3b7fe07c749181c0845f0e7 Gerrit-Change-Number: 85732 Gerrit-PatchSet: 3 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org>

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[M] Change in coreboot[main]: mb/google/corsola: refactor mipi_panel_power_on function
by Yang Wu (Code Review) 24 Dec '24

24 Dec '24

Attention is currently required from: Hung-Te Lin, Xinxiong Xu, Yidi Lin, Yu-Ping Wu. Hello Hung-Te Lin, Xinxiong Xu, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85745?usp=email to look at the new patch set (#3). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: mb/google/corsola: refactor mipi_panel_power_on function ...................................................................... mb/google/corsola: refactor mipi_panel_power_on function Refactor mipi_panel_power_on function in panel-starmie.c and panel-wyrdeer.c to reduce code duplication. BUG=b:379810871 TEST=emerge-staryu coreboot chromeos-bootimage and check both starmie and wyrdeer FW screen BRANCH=corsola Change-Id: Ic0561e57d99ab55e6dcbb7744b2228c4cebb0d88 Signed-off-by: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com> --- M src/mainboard/google/corsola/Makefile.mk M src/mainboard/google/corsola/panel.h M src/mainboard/google/corsola/panel_starmie.c A src/mainboard/google/corsola/panel_tps65132s.c M src/mainboard/google/corsola/panel_wyrdeer.c 5 files changed, 64 insertions(+), 66 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/85745/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/85745?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic0561e57d99ab55e6dcbb7744b2228c4cebb0d88 Gerrit-Change-Number: 85745 Gerrit-PatchSet: 3 Gerrit-Owner: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Xinxiong Xu <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Xinxiong Xu <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com>

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[XS] Change in coreboot[main]: add in Gemini Lake related information Change-id: I8086318431f0936cd4...
by Jared Mauch (Code Review) 24 Dec '24

24 Dec '24

Jared Mauch has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85747?usp=email ) Change subject: add in Gemini Lake related information Change-id: I8086318431f0936cd4c6e1ed590e0fba8f0fbf5b ...................................................................... add in Gemini Lake related information Change-id: I8086318431f0936cd4c6e1ed590e0fba8f0fbf5b --- M util/inteltool/inteltool.c M util/inteltool/inteltool.h 2 files changed, 6 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/85747/1 diff --git a/util/inteltool/inteltool.c b/util/inteltool/inteltool.c index b7dbd62..2c2beb0 100644 --- a/util/inteltool/inteltool.c +++ b/util/inteltool/inteltool.c @@ -142,6 +142,8 @@ "8th generation (Coffee Lake family) Core Processor (Mobile)" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CORE_8TH_GEN_U_2, "8th generation (Whiskey Lake family) Core Processor (Mobile)" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CORE_10TH_GEN_I, + "10th generation (Geminilake family) Core Processor (Mobile)" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CORE_10TH_GEN_U, "10th generation (Icelake family) Core Processor (Mobile)" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CORE_CML_U1, @@ -559,6 +561,8 @@ "Intel(R) HD Graphics 530" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HD_530_2, "Intel(R) HD Graphics 530" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HD_605_3, + "Intel(R) HD Graphics 605" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_UHD_615_1, "Intel(R) UHD Graphics 615" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_UHD_615_2, diff --git a/util/inteltool/inteltool.h b/util/inteltool/inteltool.h index f44c79c..dbc4513 100644 --- a/util/inteltool/inteltool.h +++ b/util/inteltool/inteltool.h @@ -389,6 +389,7 @@ #define PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_E3 0x5918 /* Kabylake Xeon E3 */ #define PCI_DEVICE_ID_INTEL_CORE_8TH_GEN_U_1 0x3ed0 /* Coffeelake (Mobile) */ #define PCI_DEVICE_ID_INTEL_CORE_8TH_GEN_U_2 0x3e34 /* Whiskeylake (Mobile) */ +#define PCI_DEVICE_ID_INTEL_CORE_10TH_GEN_I 0x31f0 /* Geminilake I */ #define PCI_DEVICE_ID_INTEL_CORE_10TH_GEN_U 0x8a12 /* Icelake U */ #define PCI_DEVICE_ID_INTEL_CORE_CML_U1 0x9b51 /* Cometlake U (Mobile) */ #define PCI_DEVICE_ID_INTEL_CORE_CML_U2 0x9b61 /* Cometlake U (Mobile) */ @@ -472,6 +473,7 @@ #define PCI_DEVICE_ID_INTEL_HD_520 0x1916 #define PCI_DEVICE_ID_INTEL_HD_530_1 0x191B #define PCI_DEVICE_ID_INTEL_HD_530_2 0x1912 +#define PCI_DEVICE_ID_INTEL_HD_605_3 0x3184 #define PCI_DEVICE_ID_INTEL_UHD_615_1 0x591C #define PCI_DEVICE_ID_INTEL_UHD_615_2 0x591E #define PCI_DEVICE_ID_INTEL_UHD_617 0x87C0 -- To view, visit https://review.coreboot.org/c/coreboot/+/85747?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8086318431f0936cd4c6e1ed590e0fba8f0fbf5b Gerrit-Change-Number: 85747 Gerrit-PatchSet: 1 Gerrit-Owner: Jared Mauch

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[XL] Change in coreboot[main]: soc/intel/snowridge: Add support for Intel Atom Snow Ridge SoC
by Name of user not set (Code Review) 24 Dec '24

24 Dec '24

yuchi.chen(a)intel.com has posted comments on this change by yuchi.chen(a)intel.com. ( https://review.coreboot.org/c/coreboot/+/83321?usp=email ) Change subject: soc/intel/snowridge: Add support for Intel Atom Snow Ridge SoC ...................................................................... Patch Set 64: (1 comment) File src/soc/intel/snowridge/lockdown.c: https://review.coreboot.org/c/coreboot/+/83321/comment/792cf684_c75adb67?us… : PS64, Line 31: SMM_FEATURE_CONTROL > Is this really writeable outside of SMM? From EDS, this register is only writable in SMM so this write may not work. I will back to you after I double check it on the machine. -- To view, visit https://review.coreboot.org/c/coreboot/+/83321?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I32ad836dfaaff0d1816eac41e5a7d19ece11080f Gerrit-Change-Number: 83321 Gerrit-PatchSet: 64 Gerrit-Owner: yuchi.chen(a)intel.com Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Lean Sheng Tan <tanleansheng(a)outlook.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Vasiliy Khoruzhick <vasilykh(a)arista.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Mon, 23 Dec 2024 23:58:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Rudolph <patrick.rudolph(a)9elements.com>

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[L] Change in coreboot[main]: lib/{fit,fit_payload}.c: Enhance support for FIT images
by Benjamin Doron (Code Review) 23 Dec '24

23 Dec '24

Attention is currently required from: Felix Held, Julius Werner, Lean Sheng Tan, Matt DeVillier, Maximilian Brune, Philipp Hug, ron minnich. Hello Felix Held, Julius Werner, Lean Sheng Tan, Matt DeVillier, Maximilian Brune, Philipp Hug, build bot (Jenkins), ron minnich, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84796?usp=email to look at the new patch set (#8). Change subject: lib/{fit,fit_payload}.c: Enhance support for FIT images ...................................................................... lib/{fit,fit_payload}.c: Enhance support for FIT images Implement support for loading images from FIT "firmware" props. These do not require quirks, so the implementation is common across architectures. This is done with the intention of supporting Universal Payload. We implement support for the "load" and "entry" props. Here, these are implemented as fdt64_t. A follow-up will read prop-sized ints. The selected configuration no longer requires an FDT. In this case, we'll attempt a config matching the board ID, then fallback to the FIT default compat. Change-Id: I6a21954c0dc5fd820d135e8cd0599ce87903a1c0 Signed-off-by: Benjamin Doron <benjamin.doron(a)9elements.com> --- M payloads/Kconfig M src/arch/arm/fit_payload.c M src/arch/arm64/fit_payload.c M src/arch/riscv/fit_payload.c M src/include/fit.h M src/lib/fit.c M src/lib/fit_payload.c 7 files changed, 285 insertions(+), 63 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/84796/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/84796?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6a21954c0dc5fd820d135e8cd0599ce87903a1c0 Gerrit-Change-Number: 84796 Gerrit-PatchSet: 8 Gerrit-Owner: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Lean Sheng Tan <tanleansheng(a)outlook.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-Attention: Philipp Hug <philipp(a)hug.cx> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <tanleansheng(a)outlook.com> Gerrit-Attention: ron minnich <rminnich(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de>

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[L] Change in coreboot[main]: lib/{fit,fit_payload}.c: Enhance support for FIT images
by Benjamin Doron (Code Review) 23 Dec '24

23 Dec '24

Attention is currently required from: Felix Held, Julius Werner, Lean Sheng Tan, Matt DeVillier, Maximilian Brune, Philipp Hug, ron minnich. Benjamin Doron has posted comments on this change by Benjamin Doron. ( https://review.coreboot.org/c/coreboot/+/84796?usp=email ) Change subject: lib/{fit,fit_payload}.c: Enhance support for FIT images ...................................................................... Patch Set 7: (10 comments) File src/lib/fit.c: https://review.coreboot.org/c/coreboot/+/84796/comment/33602ac6_c4988251?us… : PS4, Line 523: } > Hmm... […] True, and the current solution runs into the issue of how images could have clashing load addresses, but we'll 'load' all if the config node has a "firmware." I'll bring this up with UPL and FIT people, although it runs into the issue of handling project specific customisations in coreboot's common code, and I don't like that. It'd be preferable to upstream this to the FIT spec. For now, I'll leave this open, but I don't want to be chasing perfection and delay getting this in and ready for people to use as a result. If it's taking too long, I'll likely mark a comment in the code, close this, and we'll deal with it in a follow-up someday. File src/lib/fit_payload.c: https://review.coreboot.org/c/coreboot/+/84796/comment/37e8b8f5_7ed2c308?us… : PS6, Line 26: 64 > nit: `sizeof(node_name)` […] It's more maintainable, sure. Done. I don't see a point in checking the return value though. We're not querying and allocating strings on the heap. https://review.coreboot.org/c/coreboot/+/84796/comment/2940675a_af22a975?us… : PS6, Line 31: dt_add_reg_prop(image_node, &addr, &size, 1, 2, 1); > Also, adding a `reg` prop to `/firmware/coreboot/image@... […] I realised this (about the cells) after carefully looking through the UPL FDT, and I've now implemented it over there. I don't understand why `ranges` is required though. I've checked the devicetree spec, and it says it's for describing the addresses supported or mapped on a bus. `/firmware/coreboot/`/`options/upl-images/` aren't a bus, they're backed by `/memory` nodes https://review.coreboot.org/c/coreboot/+/84796/comment/14b774a0_8d6e63b2?us… : PS6, Line 105: kernel > `code` (or maybe `target_region` or something like that if you want it to be clearer in context; eit […] Done https://review.coreboot.org/c/coreboot/+/84796/comment/d5c33f90_a4caffc7?us… : PS6, Line 112: return; > Why is this here? If there are secondaries defined and they don't fit, shouldn't that be a hard erro […] No, the comment explains what's happening: if the region is the same size as the primary, clearly we never grew it to account for some secondaries. I thought this was clear, but it doesn't matter. The implementation I'll push next makes a stricter separation between kernel/firmware, which means we can avoid `fit_payload_arch()`, which means the code loading the secondaries can allocate regions itself, rather than how I pre-grew the size of the requested `code` region. https://review.coreboot.org/c/coreboot/+/84796/comment/28b68341_61d3d970?us… : PS6, Line 116: secondaries.size = kernel->size - primary_image->size; > I know Nico never quite finished his work on hiding region struct members (CB:79907), unfortunately, […] Done. What makes you think of `region_create_untrusted()` though? Are you worried about an underflow/overflow situation? I wouldn't expect it from a payload, it shouldn't be malformed (although, famous last words considering how many bugs or bad assumptions I've been addressing while working on this project. Moving on). And even if a `size_t` is 32-bit, a 4G payload is simply impossible, so we're not going to https://review.coreboot.org/c/coreboot/+/84796/comment/f24aaea4_95c6fdc8?us… : PS6, Line 134: secondaries > Your use of this in the function above implies that it should be the space taken up by the image jus […] Right. This is a mistake I caused by changing the design in the middle of development without rethinking the assumptions elsewhere. Anyways, the firmware/kernel split fixes this, because I'm allocating regions for each, rather than shrinking one big one. We'll talk about compressed images in #271, so I'm marking this as done. https://review.coreboot.org/c/coreboot/+/84796/comment/3056ebf4_9b4d0280?us… : PS6, Line 137: secondaries.size -= image_chain->image->size; > Maybe we should create a new helper called `region_shrink(&region, size)` for this kind of thing in […] Acknowledged https://review.coreboot.org/c/coreboot/+/84796/comment/685f9333_702b442d?us… : PS6, Line 271: code.size += image_chain->image->size; > Yeah, this also doesn't do the right thing with compression. […] How is this not a concern for the primary image? We read in the data size and compression type the same way. I'd ask how this isn't a concern for any other project, but if only Linux is using it at the moment, then yes, it does have its own header. Either way, I'd rather not use a UPL customisation in common code. I think the FIT spec is lacking here, so I've asked about upstreaming the `uncomp-size` property to FIT. I'll leave this open for now. https://review.coreboot.org/c/coreboot/+/84796/comment/42dcaef1_37ccd180?us… : PS6, Line 274: if (!fit_payload_arch(payload, config, &code, &fdt, &initrd)) { > After looking through all of this some more I'm not really convinced that reusing this function real […] This makes sense. It also addresses future issues I was postponing: perhaps the x86 code I had written could also extract a kernel, but the AARCH64 code was going to get more difficult: how do we implement support for quirked and unquirked code together? Done, and this addresses several other comments. Although this solution redefines what `CONFIG_PAYLOAD_FIT_SUPPORT` should mean: now, all architectures support FITs, but not necessarily Linux kernels. We should make this clearer in Kconfig. -- To view, visit https://review.coreboot.org/c/coreboot/+/84796?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6a21954c0dc5fd820d135e8cd0599ce87903a1c0 Gerrit-Change-Number: 84796 Gerrit-PatchSet: 7 Gerrit-Owner: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Lean Sheng Tan <tanleansheng(a)outlook.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-Attention: Philipp Hug <philipp(a)hug.cx> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <tanleansheng(a)outlook.com> Gerrit-Attention: ron minnich <rminnich(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 23 Dec 2024 19:52:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Benjamin Doron <benjamin.doron00(a)gmail.com> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org>

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[L] Change in coreboot[main]: lib/{fit,fit_payload}.c: Enhance support for FIT images
by Benjamin Doron (Code Review) 23 Dec '24

23 Dec '24

Attention is currently required from: Felix Held, Julius Werner, Lean Sheng Tan, Matt DeVillier, Maximilian Brune. Hello Felix Held, Julius Werner, Lean Sheng Tan, Matt DeVillier, Maximilian Brune, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84796?usp=email to look at the new patch set (#7). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: lib/{fit,fit_payload}.c: Enhance support for FIT images ...................................................................... lib/{fit,fit_payload}.c: Enhance support for FIT images Implement support for loading images from FIT "firmware" props. These do not require quirks, so the implementation is common across architectures. This is done with the intention of supporting Universal Payload. We implement support for the "load" and "entry" props. Here, these are implemented as fdt64_t. A follow-up will read prop-sized ints. The selected configuration no longer requires an FDT. In this case, we'll attempt a config matching the board ID, then fallback to the FIT default compat. Change-Id: I6a21954c0dc5fd820d135e8cd0599ce87903a1c0 Signed-off-by: Benjamin Doron <benjamin.doron(a)9elements.com> --- M src/arch/arm/fit_payload.c M src/arch/arm64/fit_payload.c M src/arch/riscv/fit_payload.c M src/include/fit.h M src/lib/fit.c M src/lib/fit_payload.c 6 files changed, 282 insertions(+), 60 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/84796/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/84796?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6a21954c0dc5fd820d135e8cd0599ce87903a1c0 Gerrit-Change-Number: 84796 Gerrit-PatchSet: 7 Gerrit-Owner: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Lean Sheng Tan <tanleansheng(a)outlook.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <tanleansheng(a)outlook.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de>

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[L] Change in coreboot[main]: Add UPL FDT handoff
by Benjamin Doron (Code Review) 23 Dec '24

23 Dec '24

Attention is currently required from: Arthur Heymans, Jakub Czapiga, Jérémy Compostella, Lean Sheng Tan, Matt DeVillier, Philipp Hug, Simon Glass, ron minnich. Benjamin Doron has uploaded a new patch set (#29) to the change originally created by Maximilian Brune. ( https://review.coreboot.org/c/coreboot/+/76591?usp=email ) The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: Add UPL FDT handoff ...................................................................... Add UPL FDT handoff This adds another handoff that is basically the same as coreboot tables. The only real difference is that it uses the devicetree format to transfer the information to payload. This handoff is inspired by the UPL (universal payload) specification. Tested: start qemu q35 with coreinfo as payload and see that console still works and the devicetree is printed by coreboot. Tested: start qemu q35 with EDK2 UPL as the payload (pull the entire patch train and https://github.com/tianocore/edk2/pull/6382) and boot to the UEFI shell. Change-Id: I36148e9de6ee992a67ec853ef5cbf1b5f83b44ae Signed-off-by: Maximilian Brune <maximilian.brune(a)9elements.com> Signed-off-by: Benjamin Doron <benjamin.doron(a)9elements.com> --- M payloads/Kconfig M src/arch/arm/include/arch/cbconfig.h M src/arch/arm64/include/arch/cbconfig.h M src/arch/ppc64/include/arch/cbconfig.h M src/arch/riscv/include/arch/cbconfig.h M src/arch/x86/include/arch/cbconfig.h M src/arch/x86/tables.c M src/commonlib/bsd/include/commonlib/bsd/cbmem_id.h M src/drivers/uart/pl011.c M src/drivers/uart/uart8250io.c M src/drivers/uart/uart8250mem.c M src/include/boot/coreboot_tables.h M src/include/boot/tables.h A src/include/boot/upl_fdt_table.h M src/lib/Makefile.mk M src/lib/bootmem.c M src/lib/coreboot_table.c M src/lib/fit_payload.c A src/lib/tables.c A src/lib/upl_fdt_table.c M tests/lib/Makefile.mk 21 files changed, 480 insertions(+), 57 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/76591/29 -- To view, visit https://review.coreboot.org/c/coreboot/+/76591?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I36148e9de6ee992a67ec853ef5cbf1b5f83b44ae Gerrit-Change-Number: 76591 Gerrit-PatchSet: 29 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Lean Sheng Tan <tanleansheng(a)outlook.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: Simon Glass <sjg(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Shuo Liu <shuo.liu(a)intel.com> Gerrit-CC: coreboot org <coreboot.org(a)gmail.com> Gerrit-Attention: Philipp Hug <philipp(a)hug.cx> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <tanleansheng(a)outlook.com> Gerrit-Attention: Simon Glass <sjg(a)chromium.org> Gerrit-Attention: ron minnich <rminnich(a)gmail.com>

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[M] Change in coreboot[main]: [WIP] lib/upl_fdt_table.c: Implement support for "pci-rb" node
by Benjamin Doron (Code Review) 23 Dec '24

23 Dec '24

Attention is currently required from: Benjamin Doron. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85575?usp=email to look at the new patch set (#3). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: [WIP] lib/upl_fdt_table.c: Implement support for "pci-rb" node ...................................................................... [WIP] lib/upl_fdt_table.c: Implement support for "pci-rb" node The intention is for the payload to skip enumeration when the bootloader provides this info. Currently all that's left to do is to fill out the "reg" prop with all the device addresses, then test UPL again. Change-Id: I2a51afb4315d5a342c3d77c8545ba6943825023a Signed-off-by: Benjamin Doron <benjamin.doron(a)9elements.com> --- M src/lib/upl_fdt_table.c 1 file changed, 124 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/85575/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/85575?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2a51afb4315d5a342c3d77c8545ba6943825023a Gerrit-Change-Number: 85575 Gerrit-PatchSet: 3 Gerrit-Owner: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com>

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