coreboot-gerrit December 2024

coreboot-gerrit@coreboot.org

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[M] Change in coreboot[main]: mb/google/corsola: Add new board variant Wyrdeer
by Yang Wu (Code Review) 23 Dec '24

23 Dec '24

Attention is currently required from: Hung-Te Lin, Xinxiong Xu, Yidi Lin, Yu-Ping Wu. Yang Wu has posted comments on this change by Yang Wu. ( https://review.coreboot.org/c/coreboot/+/85742?usp=email ) Change subject: mb/google/corsola: Add new board variant Wyrdeer ...................................................................... Patch Set 2: (1 comment) File src/mainboard/google/corsola/panel_wyrdeer.c: https://review.coreboot.org/c/coreboot/+/85742/comment/c3077c6c_8a29f007?us… : PS2, Line 12: static void mipi_panel_power_on(void) : { : const struct tps65132s_reg_setting reg_settings[] = { : { PMIC_TPS65132_VPOS, 0x14, 0x1F }, : { PMIC_TPS65132_VNEG, 0x14, 0x1F }, : { PMIC_TPS65132_DLYX, 0x95, 0xFF }, : { PMIC_TPS65132_ASSDD, 0x5b, 0xFF }, : }; : const struct tps65132s_cfg cfg = { : .i2c_bus = PMIC_I2C_BUS, : .en = GPIO_EN_PP3300_DISP_X, : .sync = GPIO_TCHPAD_INT_ODL, : .settings = reg_settings, : .setting_counts = ARRAY_SIZE(reg_settings), : }; : : mainboard_set_regulator_voltage(MTK_REGULATOR_VIO18, 1800000); : mtk_i2c_bus_init(PMIC_I2C_BUS, I2C_SPEED_FAST); : : if (is_pmic_aw37503(PMIC_I2C_BUS)) { : printk(BIOS_DEBUG, "Initialize and power on PMIC AW37503\n"); : aw37503_init(PMIC_I2C_BUS); : gpio_output(GPIO_EN_PP3300_DISP_X, 1); : mdelay(2); : gpio_output(GPIO_TCHPAD_INT_ODL, 1); : mdelay(3); : } else if (tps65132s_setup(&cfg) != CB_SUCCESS) { : printk(BIOS_ERR, "Failed to setup tps65132s\n"); : } : : /* DISP_RST_1V8_L */ : gpio_output(GPIO_EDPBRDG_RST_L, 1); : mdelay(1); : gpio_output(GPIO_EDPBRDG_RST_L, 0); : udelay(20); : gpio_output(GPIO_EDPBRDG_RST_L, 1); : } > There is one difference between starmie and wyrdeer, starmie uses `GPIO_EN_PP3300_SDBRDG_X` as `EN_P […] Hi Yidi, I've separated the fuction to the CL https://review.coreboot.org/c/coreboot/+/85745/2, can you help review it? -- To view, visit https://review.coreboot.org/c/coreboot/+/85742?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I07b73c97d8d51b32f557e31d834ffc6cfb8420ed Gerrit-Change-Number: 85742 Gerrit-PatchSet: 2 Gerrit-Owner: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Xinxiong Xu <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Xinxiong Xu <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Mon, 23 Dec 2024 13:04:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com> Comment-In-Reply-To: Yidi Lin <yidilin(a)google.com>

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[M] Change in coreboot[main]: mb/google/corsola: refactor mipi_panel_power_on function
by Yang Wu (Code Review) 23 Dec '24

23 Dec '24

Attention is currently required from: Hung-Te Lin, Yidi Lin, Yu-Ping Wu. Hello Hung-Te Lin, Yidi Lin, Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85745?usp=email to look at the new patch set (#2). Change subject: mb/google/corsola: refactor mipi_panel_power_on function ...................................................................... mb/google/corsola: refactor mipi_panel_power_on function Refactor mipi_panel_power_on function in panel-starmie.c and panel-wyrdeer.c to reduce code duplication. BUG=b:379810871 TEST=emerge-staryu coreboot chromeos-bootimage and check both starmie and wyrdeer FW screen BRANCH=corsola Change-Id: Ic0561e57d99ab55e6dcbb7744b2228c4cebb0d88 Signed-off-by: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com> --- M src/mainboard/google/corsola/Makefile.mk M src/mainboard/google/corsola/panel.h M src/mainboard/google/corsola/panel_starmie.c A src/mainboard/google/corsola/panel_tps65132s.c M src/mainboard/google/corsola/panel_wyrdeer.c 5 files changed, 64 insertions(+), 66 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/85745/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85745?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic0561e57d99ab55e6dcbb7744b2228c4cebb0d88 Gerrit-Change-Number: 85745 Gerrit-PatchSet: 2 Gerrit-Owner: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com>

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[L] Change in coreboot[main]: soc/mediatek/mt8196: Add GPUEB support
by Andy Hsu (Code Review) 23 Dec '24

23 Dec '24

Attention is currently required from: Hung-Te Lin, Jarried Lin. Andy Hsu has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85654?usp=email ) Change subject: soc/mediatek/mt8196: Add GPUEB support ...................................................................... Patch Set 3: (1 comment) File src/soc/mediatek/mt8196/gpueb.c: https://review.coreboot.org/c/coreboot/+/85654/comment/e60e71a9_e5e6ef58?us… : PS2, Line 358: die > Is the gpueb init flow critical for the device to boot up? If not, I wonder if we can print an error […] The gpueb init flow is critical for boot up. If issues are not detected at this stage, it will be difficult to identify the problem later in the kernel driver, such as whether it is a firmware load failure or a register setting issue. -- To view, visit https://review.coreboot.org/c/coreboot/+/85654?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0f10dfc753f73df97ea08a4c23e97de416832be2 Gerrit-Change-Number: 85654 Gerrit-PatchSet: 3 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Andy Hsu <andy.hsu(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Mon, 23 Dec 2024 12:54:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

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[M] Change in coreboot[main]: mb/google/corsola: refactor mipi_panel_power_on function
by Yang Wu (Code Review) 23 Dec '24

23 Dec '24

Yang Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85745?usp=email ) Change subject: mb/google/corsola: refactor mipi_panel_power_on function ...................................................................... mb/google/corsola: refactor mipi_panel_power_on function Refactor mipi_panel_power_on function in panel-starmie.c and panel-wyrdeer.c to reduce code duplication. BUG=b:379810871 TEST=emerge-staryu coreboot chromeos-bootimage and check both starmie and wyrdeer FW screen BRANCH=corsola Change-Id: Ic0561e57d99ab55e6dcbb7744b2228c4cebb0d88 Signed-off-by: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com> --- M src/mainboard/google/corsola/Makefile.mk M src/mainboard/google/corsola/panel.h M src/mainboard/google/corsola/panel_starmie.c A src/mainboard/google/corsola/panel_tps65132s.c M src/mainboard/google/corsola/panel_wyrdeer.c 5 files changed, 64 insertions(+), 66 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/85745/1 diff --git a/src/mainboard/google/corsola/Makefile.mk b/src/mainboard/google/corsola/Makefile.mk index b0d87e58..43d3dc3 100644 --- a/src/mainboard/google/corsola/Makefile.mk +++ b/src/mainboard/google/corsola/Makefile.mk @@ -22,6 +22,7 @@ ramstage-y += panel.c ramstage-y += panel_anx7625.c ramstage-y += panel_ps8640.c +ramstage-y += panel_tps65132s.c ramstage-y += regulator.c ramstage-y += reset.c diff --git a/src/mainboard/google/corsola/panel.h b/src/mainboard/google/corsola/panel.h index a4198f3..e4b4130 100644 --- a/src/mainboard/google/corsola/panel.h +++ b/src/mainboard/google/corsola/panel.h @@ -4,16 +4,22 @@ #define __MAINBOARD_GOOGLE_CORSOLA_DISPLAY_H__ #include <soc/display.h> +#include <soc/gpio.h> #include <soc/i2c.h> #define BRIDGE_I2C I2C0 #define PMIC_AW37503_SLAVE 0x3E #define PMIC_I2C_BUS I2C6 +struct mipi_panel_config { + gpio_t en_gpio; + gpio_t sync_gpio; +}; void aw37503_init(unsigned int bus); bool is_pmic_aw37503(unsigned int bus); uint32_t panel_id(void); void backlight_control(void); +void tps65132s_power_on(const struct mipi_panel_config *config); /* Return the mipi panel description from given panel id */ struct panel_description *get_panel_description(void); diff --git a/src/mainboard/google/corsola/panel_starmie.c b/src/mainboard/google/corsola/panel_starmie.c index 1de2c61..c3c4512 100644 --- a/src/mainboard/google/corsola/panel_starmie.c +++ b/src/mainboard/google/corsola/panel_starmie.c @@ -11,40 +11,11 @@ static void mipi_panel_power_on(void) { - const struct tps65132s_reg_setting reg_settings[] = { - { PMIC_TPS65132_VPOS, 0x14, 0x1F }, - { PMIC_TPS65132_VNEG, 0x14, 0x1F }, - { PMIC_TPS65132_DLYX, 0x95, 0xFF }, - { PMIC_TPS65132_ASSDD, 0x5b, 0xFF }, + struct mipi_panel_config config = { + .en_gpio = GPIO_EN_PP3300_DISP_X, + .sync_gpio = GPIO_EN_PP3300_SDBRDG_X, }; - const struct tps65132s_cfg cfg = { - .i2c_bus = PMIC_I2C_BUS, - .en = GPIO_EN_PP3300_DISP_X, - .sync = GPIO_EN_PP3300_SDBRDG_X, - .settings = reg_settings, - .setting_counts = ARRAY_SIZE(reg_settings), - }; - - mainboard_set_regulator_voltage(MTK_REGULATOR_VIO18, 1800000); - mtk_i2c_bus_init(PMIC_I2C_BUS, I2C_SPEED_FAST); - - if (is_pmic_aw37503(PMIC_I2C_BUS)) { - printk(BIOS_DEBUG, "Initialize and power on PMIC AW37503\n"); - aw37503_init(PMIC_I2C_BUS); - gpio_output(GPIO_EN_PP3300_DISP_X, 1); - mdelay(2); - gpio_output(GPIO_EN_PP3300_SDBRDG_X, 1); - mdelay(3); - } else if (tps65132s_setup(&cfg) != CB_SUCCESS) { - printk(BIOS_ERR, "Failed to setup tps65132s\n"); - } - - /* DISP_RST_1V8_L */ - gpio_output(GPIO_EDPBRDG_RST_L, 1); - mdelay(1); - gpio_output(GPIO_EDPBRDG_RST_L, 0); - udelay(20); - gpio_output(GPIO_EDPBRDG_RST_L, 1); + tps65132s_power_on(&config); } static struct panel_description starmie_panels[] = { diff --git a/src/mainboard/google/corsola/panel_tps65132s.c b/src/mainboard/google/corsola/panel_tps65132s.c new file mode 100644 index 0000000..36f3163 --- /dev/null +++ b/src/mainboard/google/corsola/panel_tps65132s.c @@ -0,0 +1,49 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <console/console.h> +#include <delay.h> +#include <gpio.h> +#include <soc/regulator.h> +#include <soc/tps65132s.h> + +#include "gpio.h" +#include "panel.h" + +void tps65132s_power_on(const struct mipi_panel_config *config) +{ + const struct tps65132s_reg_setting reg_settings[] = { + { PMIC_TPS65132_VPOS, 0x14, 0x1F }, + { PMIC_TPS65132_VNEG, 0x14, 0x1F }, + { PMIC_TPS65132_DLYX, 0x95, 0xFF }, + { PMIC_TPS65132_ASSDD, 0x5b, 0xFF }, + }; + const struct tps65132s_cfg cfg = { + .i2c_bus = PMIC_I2C_BUS, + .en = config->en_gpio, + .sync = config->sync_gpio, + .settings = reg_settings, + .setting_counts = ARRAY_SIZE(reg_settings), + }; + + mainboard_set_regulator_voltage(MTK_REGULATOR_VIO18, 1800000); + mtk_i2c_bus_init(PMIC_I2C_BUS, I2C_SPEED_FAST); + + if (is_pmic_aw37503(PMIC_I2C_BUS)) { + printk(BIOS_DEBUG, "Initialize and power on PMIC AW37503\n"); + aw37503_init(PMIC_I2C_BUS); + gpio_output(config->en_gpio, 1); + mdelay(2); + gpio_output(config->sync_gpio, 1); + mdelay(3); + } else if (tps65132s_setup(&cfg) != CB_SUCCESS) { + printk(BIOS_ERR, "Failed to setup tps65132s\n"); + } + + /* DISP_RST_1V8_L */ + gpio_output(GPIO_EDPBRDG_RST_L, 1); + mdelay(1); + gpio_output(GPIO_EDPBRDG_RST_L, 0); + udelay(20); + gpio_output(GPIO_EDPBRDG_RST_L, 1); +} + diff --git a/src/mainboard/google/corsola/panel_wyrdeer.c b/src/mainboard/google/corsola/panel_wyrdeer.c index 2c984ac..316c5e6 100644 --- a/src/mainboard/google/corsola/panel_wyrdeer.c +++ b/src/mainboard/google/corsola/panel_wyrdeer.c @@ -11,40 +11,11 @@ static void mipi_panel_power_on(void) { - const struct tps65132s_reg_setting reg_settings[] = { - { PMIC_TPS65132_VPOS, 0x14, 0x1F }, - { PMIC_TPS65132_VNEG, 0x14, 0x1F }, - { PMIC_TPS65132_DLYX, 0x95, 0xFF }, - { PMIC_TPS65132_ASSDD, 0x5b, 0xFF }, + struct mipi_panel_config config = { + .en_gpio = GPIO_EN_PP3300_DISP_X, + .sync_gpio = GPIO_TCHPAD_INT_ODL, }; - const struct tps65132s_cfg cfg = { - .i2c_bus = PMIC_I2C_BUS, - .en = GPIO_EN_PP3300_DISP_X, - .sync = GPIO_TCHPAD_INT_ODL, - .settings = reg_settings, - .setting_counts = ARRAY_SIZE(reg_settings), - }; - - mainboard_set_regulator_voltage(MTK_REGULATOR_VIO18, 1800000); - mtk_i2c_bus_init(PMIC_I2C_BUS, I2C_SPEED_FAST); - - if (is_pmic_aw37503(PMIC_I2C_BUS)) { - printk(BIOS_DEBUG, "Initialize and power on PMIC AW37503\n"); - aw37503_init(PMIC_I2C_BUS); - gpio_output(GPIO_EN_PP3300_DISP_X, 1); - mdelay(2); - gpio_output(GPIO_TCHPAD_INT_ODL, 1); - mdelay(3); - } else if (tps65132s_setup(&cfg) != CB_SUCCESS) { - printk(BIOS_ERR, "Failed to setup tps65132s\n"); - } - - /* DISP_RST_1V8_L */ - gpio_output(GPIO_EDPBRDG_RST_L, 1); - mdelay(1); - gpio_output(GPIO_EDPBRDG_RST_L, 0); - udelay(20); - gpio_output(GPIO_EDPBRDG_RST_L, 1); + tps65132s_power_on(&config); } static struct panel_description wyrdeer_panels[] = { -- To view, visit https://review.coreboot.org/c/coreboot/+/85745?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic0561e57d99ab55e6dcbb7744b2228c4cebb0d88 Gerrit-Change-Number: 85745 Gerrit-PatchSet: 1 Gerrit-Owner: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com>

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[XS] Change in coreboot[main]: mb/starlabs/merlin: Remove unused definition
by Sean Rhodes (Code Review) 23 Dec '24

23 Dec '24

Sean Rhodes has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/85708?usp=email ) Change subject: mb/starlabs/merlin: Remove unused definition ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/85708?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I292fb42d11b52083a1dc2cde1164daaef3abfb6e Gerrit-Change-Number: 85708 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 23 Dec 2024 12:05:09 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No

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[M] Change in coreboot[main]: mb/starlabs/*: Tweak the performance profiles
by Sean Rhodes (Code Review) 23 Dec '24

23 Dec '24

Sean Rhodes has uploaded a new patch set (#3). ( https://review.coreboot.org/c/coreboot/+/85694?usp=email ) Change subject: mb/starlabs/*: Tweak the performance profiles ...................................................................... mb/starlabs/*: Tweak the performance profiles Adjust these so they simply adjust the Intel detaults, rather than having hardcoded values. Change-Id: I8375428e9ace8e505e8cb53b2e4912592715b79a Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> --- M src/mainboard/starlabs/byte_adl/variants/mk_ii/devtree.c M src/mainboard/starlabs/lite/devtree.c M src/mainboard/starlabs/starbook/variants/adl/devtree.c M src/mainboard/starlabs/starbook/variants/cml/devtree.c M src/mainboard/starlabs/starbook/variants/kbl/devtree.c M src/mainboard/starlabs/starbook/variants/rpl/devtree.c M src/mainboard/starlabs/starbook/variants/tgl/devtree.c M src/mainboard/starlabs/starfighter/variants/rpl/devtree.c M src/mainboard/starlabs/starlite_adl/variants/mk_v/devtree.c 9 files changed, 99 insertions(+), 68 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/85694/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/85694?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8375428e9ace8e505e8cb53b2e4912592715b79a Gerrit-Change-Number: 85694 Gerrit-PatchSet: 3 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org>

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[M] Change in coreboot[main]: ec/starlabs/merlin: Adjust the EC code to read values from CMOS
by Sean Rhodes (Code Review) 23 Dec '24

23 Dec '24

Sean Rhodes has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/76582?usp=email ) Change subject: ec/starlabs/merlin: Adjust the EC code to read values from CMOS ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/76582?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idb094456543c75b59a8ddd80b58eb4fa1e10144f Gerrit-Change-Number: 76582 Gerrit-PatchSet: 5 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 23 Dec 2024 11:45:39 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: soc/intel/alderlake: Add IRQ mapping for PEG PCI-E ports
by Sean Rhodes (Code Review) 23 Dec '24

23 Dec '24

Attention is currently required from: Dinesh Gehlot, Jayvik Desai, Kapil Porwal, Michał Żygowski, Nick Vaccaro, Subrata Banik. Sean Rhodes has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/84620?usp=email ) Change subject: soc/intel/alderlake: Add IRQ mapping for PEG PCI-E ports ...................................................................... Patch Set 6: (1 comment) File src/soc/intel/alderlake/acpi/pcie_pch_s.asl: https://review.coreboot.org/c/coreboot/+/84620/comment/bef66655_1c2190d2?us… : PS4, Line 301: > Extra newline causing CQ failure. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/84620?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2e36cee37716d3b003b9ce250f28fdf5581a15bc Gerrit-Change-Number: 84620 Gerrit-PatchSet: 6 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Mon, 23 Dec 2024 11:34:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Kapil Porwal <kapilporwal(a)google.com>

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[XL] Change in coreboot[main]: soc/intel/snowridge: Add support for Intel Atom Snow Ridge SoC
by Patrick Rudolph (Code Review) 23 Dec '24

23 Dec '24

Attention is currently required from: yuchi.chen(a)intel.com. Patrick Rudolph has posted comments on this change by yuchi.chen(a)intel.com. ( https://review.coreboot.org/c/coreboot/+/83321?usp=email ) Change subject: soc/intel/snowridge: Add support for Intel Atom Snow Ridge SoC ...................................................................... Patch Set 64: (1 comment) File src/soc/intel/snowridge/lockdown.c: https://review.coreboot.org/c/coreboot/+/83321/comment/7f63b2d9_f7fa8b86?us… : PS64, Line 31: SMM_FEATURE_CONTROL Is this really writeable outside of SMM? -- To view, visit https://review.coreboot.org/c/coreboot/+/83321?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I32ad836dfaaff0d1816eac41e5a7d19ece11080f Gerrit-Change-Number: 83321 Gerrit-PatchSet: 64 Gerrit-Owner: yuchi.chen(a)intel.com Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Lean Sheng Tan <tanleansheng(a)outlook.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Vasiliy Khoruzhick <vasilykh(a)arista.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: yuchi.chen(a)intel.com Gerrit-Comment-Date: Mon, 23 Dec 2024 11:29:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[NoOp] Change in coreboot[main]: mb/starlabs/byte: Update the VBT from 249 to 251
by Sean Rhodes (Code Review) 23 Dec '24

23 Dec '24

Attention is currently required from: Paul Menzel. Sean Rhodes has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/85706?usp=email ) Change subject: mb/starlabs/byte: Update the VBT from 249 to 251 ...................................................................... Patch Set 3: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/85706/comment/80ff6ac9_ece61424?us… : PS1, Line 7: to 251 > from X to 251 Done https://review.coreboot.org/c/coreboot/+/85706/comment/1152ab51_829d9947?us… : PS1, Line 9: This silences a few warnings in FSP. > It’d be great if you pasted those. I've been told off before by Intel for posting FSP debug logs 😊 -- To view, visit https://review.coreboot.org/c/coreboot/+/85706?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3bef919d1c6fcb9abff4fc49300321c9d471cb82 Gerrit-Change-Number: 85706 Gerrit-PatchSet: 3 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Mon, 23 Dec 2024 11:22:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>

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