coreboot-gerrit December 2024

coreboot-gerrit@coreboot.org

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3018 discussions

[S] Change in coreboot[main]: mb/birman: Add A/B flashmap for birman
by Bao Zheng (Code Review) 25 Dec '24

25 Dec '24

Attention is currently required from: Zheng Bao. Hello Zheng Bao, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/85766?usp=email to review the following change. Change subject: mb/birman: Add A/B flashmap for birman ...................................................................... mb/birman: Add A/B flashmap for birman Change-Id: I743a3862791c3a36c1e4fca2334cc7dc2703dfb6 Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M src/mainboard/amd/birman/board_glinda.fmd M src/mainboard/amd/birman/board_phoenix.fmd 2 files changed, 17 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/85766/1 diff --git a/src/mainboard/amd/birman/board_glinda.fmd b/src/mainboard/amd/birman/board_glinda.fmd index 7567090..c1367be 100644 --- a/src/mainboard/amd/birman/board_glinda.fmd +++ b/src/mainboard/amd/birman/board_glinda.fmd @@ -1,8 +1,14 @@ -FLASH@0xFF000000 16M { +FLASH 16M { BIOS { EC_SIG 4K FMAP 4K - COREBOOT(CBFS) + EFS @128K + PARTITIION @8M { + COREBOOT(CBFS) + } + BCOPY @12M { + COREBOOTB(CBFS) + } EC_BODY@15872K 256K RW_MRC_CACHE 120K } diff --git a/src/mainboard/amd/birman/board_phoenix.fmd b/src/mainboard/amd/birman/board_phoenix.fmd index bc09fe7..9cccec2 100644 --- a/src/mainboard/amd/birman/board_phoenix.fmd +++ b/src/mainboard/amd/birman/board_phoenix.fmd @@ -1,8 +1,15 @@ -FLASH@0xFF000000 16M { +FLASH 16M { BIOS { EC_SIG 4K FMAP 4K - COREBOOT(CBFS) + EFS @128K + PARTITIION @2M { + COREBOOT(CBFS) + } + BCOPY @8M { + COREBOOTB(CBFS) + } +# COREBOOT(CBFS) EC_BODY@15872K 256K RW_MRC_CACHE 256K } -- To view, visit https://review.coreboot.org/c/coreboot/+/85766?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I743a3862791c3a36c1e4fca2334cc7dc2703dfb6 Gerrit-Change-Number: 85766 Gerrit-PatchSet: 1 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-Attention: Zheng Bao

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[S] Change in coreboot[main]: cbfstool: Do not compress the BIOS binary if A/B recovery
by Bao Zheng (Code Review) 25 Dec '24

25 Dec '24

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Julius Werner, Marshall Dawson, Matt DeVillier, Zheng Bao. Hello Felix Held, Fred Reitberger, Jason Glenesk, Julius Werner, Marshall Dawson, Matt DeVillier, Zheng Bao, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85628?usp=email to look at the new patch set (#10). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: cbfstool: Do not compress the BIOS binary if A/B recovery ...................................................................... cbfstool: Do not compress the BIOS binary if A/B recovery The hash data in bootblock will be used for CBFS verification. If bootblock is compressed, the hash is not in plain data. Change-Id: I10db7ad44d2a92c143f46d9ee6fc7824b2ff0cc6 Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M src/soc/amd/cezanne/Makefile.mk M util/cbfstool/amdcompress.c 2 files changed, 24 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/85628/10 -- To view, visit https://review.coreboot.org/c/coreboot/+/85628?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I10db7ad44d2a92c143f46d9ee6fc7824b2ff0cc6 Gerrit-Change-Number: 85628 Gerrit-PatchSet: 10 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Zheng Bao Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de>

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[M] Change in coreboot[main]: soc/amd: Add some PSP commands
by Bao Zheng (Code Review) 25 Dec '24

25 Dec '24

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Julius Werner, Matt DeVillier, Zheng Bao. Hello Felix Held, Fred Reitberger, Jason Glenesk, Julius Werner, Matt DeVillier, Zheng Bao, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85650?usp=email to look at the new patch set (#9). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/amd: Add some PSP commands ...................................................................... soc/amd: Add some PSP commands Getting and setting boot partition. Toggle boot partition. Set corruption reason. Change-Id: Ia7f2eedae5b277745cb34a0761bd1a8b61441695 Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M src/soc/amd/common/block/psp/Makefile.mk M src/soc/amd/common/block/psp/psp_def.h M src/soc/amd/common/block/psp/psp_gen2.c 3 files changed, 85 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/85650/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/85650?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia7f2eedae5b277745cb34a0761bd1a8b61441695 Gerrit-Change-Number: 85650 Gerrit-PatchSet: 9 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Zheng Bao Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de>

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[S] Change in coreboot[main]: ec/google/chromeec: Add function to detect barrel charger
by Subrata Banik (Code Review) 25 Dec '24

25 Dec '24

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85765?usp=email ) Change subject: ec/google/chromeec: Add function to detect barrel charger ...................................................................... ec/google/chromeec: Add function to detect barrel charger This commit introduces a new function, google_chromeec_is_barrel_charger_present(), which checks if a barrel charger is present. The function uses the following logic to determine if a barrel charger is present: - If both a barrel charger and USB-C PD are present, then the barrel charger takes precedence over USB-C PD. As a result, google_chromeec_is_usb_pd_attached() will return false. This logic can be used to deterministically say if a barrel charger is present even when both a barrel charger and USB-C PD are attached. - If an AC charger is detected and USB-C PD is not present, then a barrel charger must be present. This change allows the EC to accurately detect the presence of a barrel charger, even when a USB-C PD charger is also attached. BUG=b:377798581 TEST=Able to read the charger status correctly while booting google/fatcat. Experiment #1: - USB-C PD Attached = yes - Barrel Attached = No - Charger Detected = Yes ``` fatcat-rev257 ~ # cbmem -c | grep -5 "ac_charger_present" [INFO ] ac_charger_present: yes [INFO ] usb_pd_present: yes [INFO ] baseboard_devtree_update: Barrel Absent ``` Experiment #2: - USB-C PD Attached = No - Barrel Attached = Yes - Charger Detected = Yes ``` [INFO ] ac_charger_present: yes [INFO ] usb_pd_present: no [INFO ] baseboard_devtree_update: Barrel Present ``` Experiment #3: - USB-C PD Attached = Yes - Barrel Attached = Yes - Charger Detected = Yes ``` [INFO ] ac_charger_present: yes [INFO ] usb_pd_present: no [INFO ] baseboard_devtree_update: Barrel Present ``` Experiment #4: - USB-C PD Attached = No - Barrel Attached = No - Charger Detected = No ``` [INFO ] ac_charger_present: no [INFO ] usb_pd_present: no [INFO ] baseboard_devtree_update: Barrel Absent ``` Change-Id: I9644f0dec057f95bb0a22cdc18edc1a0234ee3a9 Signed-off-by: Subrata Banik <subratabanik(a)google.com> --- M src/ec/google/chromeec/ec.c M src/ec/google/chromeec/ec.h 2 files changed, 36 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/85765/1 diff --git a/src/ec/google/chromeec/ec.c b/src/ec/google/chromeec/ec.c index 502684c..670d557 100644 --- a/src/ec/google/chromeec/ec.c +++ b/src/ec/google/chromeec/ec.c @@ -1005,6 +1005,34 @@ return false; } +/* + * Using below scenarios to conclude if device has a barrel charger attached. + * +-----------+-----------------+------------------+---------------------------------+ + * | Scenarios | Charger Present | USB-C PD Present | Conclusion: Barrel Present ? | + * +-----------+-----------------+------------------+---------------------------------+ + * | #1 | Yes | Yes | Non Conclusive (comments below) | + * | #2 | No | Yes | Not possible | + * | #3 | Yes | No | Must be barrel charger | + * | #4 | No | No | Barrel not present | + * +-----------+-----------------+------------------+---------------------------------+ + */ +bool google_chromeec_is_barrel_charger_present(void) +{ + bool ac_charger_present = google_chromeec_is_charger_present(); + bool usb_pd_present = google_chromeec_is_usb_pd_attached(); + + /* + * If both barrel charger and USB-C PD present at once then barrel took the precedence + * over USB-C PD as a result `google_chromeec_is_usb_pd_attached()` will return + * `false`. This logic can be used further here to deterministically say if barrel + * charger is present even when both barrel charger and USB-C PD attached. + */ + if (ac_charger_present == true && usb_pd_present == false) + return true; + + return false; +} + int google_chromeec_override_dedicated_charger_limit(uint16_t current_lim, uint16_t voltage_lim) { diff --git a/src/ec/google/chromeec/ec.h b/src/ec/google/chromeec/ec.h index a50c311..c66db18 100644 --- a/src/ec/google/chromeec/ec.h +++ b/src/ec/google/chromeec/ec.h @@ -148,6 +148,14 @@ */ bool google_chromeec_is_charger_present(void); +/** + * Check if barrel charger is present. + * + * @return true: if the barrel_charger is present + * false: if the barrel_charger is not present + */ +bool google_chromeec_is_barrel_charger_present(void); + /* * Set max current and voltage of a dedicated charger. * -- To view, visit https://review.coreboot.org/c/coreboot/+/85765?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9644f0dec057f95bb0a22cdc18edc1a0234ee3a9 Gerrit-Change-Number: 85765 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com>

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[S] Change in coreboot[main]: soc/mediatek: Distinguish pmic_init_setting function name
by Yidi Lin (Code Review) 25 Dec '24

25 Dec '24

Yidi Lin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85764?usp=email ) Change subject: soc/mediatek: Distinguish pmic_init_setting function name ...................................................................... soc/mediatek: Distinguish pmic_init_setting function name Rename pmic_init_setting to ${PMIC model}_init_setting accordingly. Change-Id: Id591bf3089aaa2148d34c77d021c17403494a776 Signed-off-by: Yidi Lin <yidilin(a)chromium.org> --- M src/soc/mediatek/common/include/soc/mt6359p.h M src/soc/mediatek/common/include/soc/mt6363.h M src/soc/mediatek/common/mt6359p.c M src/soc/mediatek/common/mt6363.c M src/soc/mediatek/mt8188/mt6359p.c M src/soc/mediatek/mt8192/mt6359p.c M src/soc/mediatek/mt8195/mt6359p.c M src/soc/mediatek/mt8196/mt6363.c 8 files changed, 13 insertions(+), 13 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/85764/1 diff --git a/src/soc/mediatek/common/include/soc/mt6359p.h b/src/soc/mediatek/common/include/soc/mt6359p.h index 55a1a4d..fa21eaa 100644 --- a/src/soc/mediatek/common/include/soc/mt6359p.h +++ b/src/soc/mediatek/common/include/soc/mt6359p.h @@ -89,6 +89,6 @@ void mt6359p_enable_vm18(bool enable); void mt6359p_init_pmif_arb(void); void mt6359p_write_field(u32 reg, u32 val, u32 mask, u32 shift); -void pmic_init_setting(void); -void pmic_lp_setting(void); +void mt6359p_init_setting(void); +void mt6359p_lp_setting(void); #endif /* __SOC_MEDIATEK_MT6359P_H__ */ diff --git a/src/soc/mediatek/common/include/soc/mt6363.h b/src/soc/mediatek/common/include/soc/mt6363.h index 7e4487f..19b23d4 100644 --- a/src/soc/mediatek/common/include/soc/mt6363.h +++ b/src/soc/mediatek/common/include/soc/mt6363.h @@ -111,6 +111,6 @@ u32 mt6363_read16(u32 reg); void mt6363_write8(u32 reg, u8 reg_val); void mt6363_write_field(u32 reg, u32 val, u32 mask, u32 shift); -void pmic_init_setting(void); +void mt6363_init_setting(void); #endif /* __SOC_MEDIATEK_MT6363_H__ */ diff --git a/src/soc/mediatek/common/mt6359p.c b/src/soc/mediatek/common/mt6359p.c index 47c46d0..e766479 100644 --- a/src/soc/mediatek/common/mt6359p.c +++ b/src/soc/mediatek/common/mt6359p.c @@ -347,8 +347,8 @@ pmic_set_power_hold(); pmic_wdt_set(); pmic_protect_key_setting(false); - pmic_init_setting(); - pmic_lp_setting(); + mt6359p_init_setting(); + mt6359p_lp_setting(); pmic_efuse_setting(); pmic_protect_key_setting(true); pmic_wk_vs2_voter_setting(); diff --git a/src/soc/mediatek/common/mt6363.c b/src/soc/mediatek/common/mt6363.c index 9619d44..691282b 100644 --- a/src/soc/mediatek/common/mt6363.c +++ b/src/soc/mediatek/common/mt6363.c @@ -269,6 +269,6 @@ pmic_set_power_hold(); pmic_wdt_set(); pmic_protect_key_setting(false); - pmic_init_setting(); + mt6363_init_setting(); pmic_protect_key_setting(true); } diff --git a/src/soc/mediatek/mt8188/mt6359p.c b/src/soc/mediatek/mt8188/mt6359p.c index db3029e..9c8a2b5 100644 --- a/src/soc/mediatek/mt8188/mt6359p.c +++ b/src/soc/mediatek/mt8188/mt6359p.c @@ -209,14 +209,14 @@ {0x1d14, 0x1, 0x1, 0x2}, }; -void pmic_init_setting(void) +void mt6359p_init_setting(void) { for (int i = 0; i < ARRAY_SIZE(init_setting); i++) mt6359p_write_field(init_setting[i].addr, init_setting[i].val, init_setting[i].mask, init_setting[i].shift); } -void pmic_lp_setting(void) +void mt6359p_lp_setting(void) { for (int i = 0; i < ARRAY_SIZE(lp_setting); i++) mt6359p_write_field(lp_setting[i].addr, lp_setting[i].val, diff --git a/src/soc/mediatek/mt8192/mt6359p.c b/src/soc/mediatek/mt8192/mt6359p.c index 7579e2d..a5576db 100644 --- a/src/soc/mediatek/mt8192/mt6359p.c +++ b/src/soc/mediatek/mt8192/mt6359p.c @@ -283,14 +283,14 @@ {0x1d14, 0x1, 0x1, 0x2}, }; -void pmic_init_setting(void) +void mt6359p_init_setting(void) { for (int i = 0; i < ARRAY_SIZE(init_setting); i++) mt6359p_write_field(init_setting[i].addr, init_setting[i].val, init_setting[i].mask, init_setting[i].shift); } -void pmic_lp_setting(void) +void mt6359p_lp_setting(void) { for (int i = 0; i < ARRAY_SIZE(lp_setting); i++) mt6359p_write_field(lp_setting[i].addr, lp_setting[i].val, diff --git a/src/soc/mediatek/mt8195/mt6359p.c b/src/soc/mediatek/mt8195/mt6359p.c index 8a88d8c..690596b 100644 --- a/src/soc/mediatek/mt8195/mt6359p.c +++ b/src/soc/mediatek/mt8195/mt6359p.c @@ -239,14 +239,14 @@ {0x1d14, 0x1, 0x1, 0x2}, }; -void pmic_init_setting(void) +void mt6359p_init_setting(void) { for (int i = 0; i < ARRAY_SIZE(init_setting); i++) mt6359p_write_field(init_setting[i].addr, init_setting[i].val, init_setting[i].mask, init_setting[i].shift); } -void pmic_lp_setting(void) +void mt6359p_lp_setting(void) { for (int i = 0; i < ARRAY_SIZE(lp_setting); i++) mt6359p_write_field(lp_setting[i].addr, lp_setting[i].val, diff --git a/src/soc/mediatek/mt8196/mt6363.c b/src/soc/mediatek/mt8196/mt6363.c index e41ce0e..cc5ae56 100644 --- a/src/soc/mediatek/mt8196/mt6363.c +++ b/src/soc/mediatek/mt8196/mt6363.c @@ -376,7 +376,7 @@ {0x191A, 0x8, 0xFF}, }; -void pmic_init_setting(void) +void mt6363_init_setting(void) { for (int i = 0; i < ARRAY_SIZE(init_setting); i++) mt6363_write_field(init_setting[i].addr, init_setting[i].val, -- To view, visit https://review.coreboot.org/c/coreboot/+/85764?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id591bf3089aaa2148d34c77d021c17403494a776 Gerrit-Change-Number: 85764 Gerrit-PatchSet: 1 Gerrit-Owner: Yidi Lin <yidilin(a)google.com>

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[M] Change in coreboot[main]: soc/mediatek/mt8196: Add MT6685 adc init
by Yidi Lin (Code Review) 25 Dec '24

25 Dec '24

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yu-Ping Wu. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85734?usp=email ) Change subject: soc/mediatek/mt8196: Add MT6685 adc init ...................................................................... Patch Set 5: (2 comments) File src/soc/mediatek/common/include/soc/mt6685_adc_init.h: PS5: mt6685.h File src/soc/mediatek/common/mt6685.c: https://review.coreboot.org/c/coreboot/+/85734/comment/7fa92564_85e51184?us… : PS5, Line 80: mt6685_adc_init mt6685_init -- To view, visit https://review.coreboot.org/c/coreboot/+/85734?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I26ae4f416202f04a8030259c49e009b19a60712e Gerrit-Change-Number: 85734 Gerrit-PatchSet: 5 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Wed, 25 Dec 2024 03:46:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[M] Change in coreboot[main]: soc/mediatek/mt8196: Add MT6685 adc init
by Yidi Lin (Code Review) 25 Dec '24

25 Dec '24

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yu-Ping Wu. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85734?usp=email ) Change subject: soc/mediatek/mt8196: Add MT6685 adc init ...................................................................... Patch Set 5: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/85734/comment/f84fbcab_14aa70cd?us… : PS5, Line 7: adc init Clock IC driver https://review.coreboot.org/c/coreboot/+/85734/comment/b2678bac_a7280d2d?us… : PS5, Line 8: > `'intial' may be misspelled - perhaps 'initial'?` Please fix. https://review.coreboot.org/c/coreboot/+/85734/comment/de971fc5_fa65b8a6?us… : PS5, Line 9: and MT6685 ADC SW intial settings and ADC init settings -- To view, visit https://review.coreboot.org/c/coreboot/+/85734?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I26ae4f416202f04a8030259c49e009b19a60712e Gerrit-Change-Number: 85734 Gerrit-PatchSet: 5 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Wed, 25 Dec 2024 03:20:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[M] Change in coreboot[main]: soc/mediatek/mt8196: Add MT6685 adc init
by Yidi Lin (Code Review) 25 Dec '24

25 Dec '24

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yu-Ping Wu. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85734?usp=email ) Change subject: soc/mediatek/mt8196: Add MT6685 adc init ...................................................................... Patch Set 5: (3 comments) File src/soc/mediatek/common/mt6685.c: https://review.coreboot.org/c/coreboot/+/85734/comment/c185d821_0fc31142?us… : PS5, Line 38: Please also add mt6685_{read/write}8. RTC needs both APIs. https://review.coreboot.org/c/coreboot/+/85734/comment/f7324268_f51c4676?us… : PS5, Line 39: mt6685_get_reg_value16 mt6685_read16 https://review.coreboot.org/c/coreboot/+/85734/comment/0db1cedf_4ffa9cbb?us… : PS5, Line 48: mt6685_set_reg_value16 mt6685_write16 -- To view, visit https://review.coreboot.org/c/coreboot/+/85734?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I26ae4f416202f04a8030259c49e009b19a60712e Gerrit-Change-Number: 85734 Gerrit-PatchSet: 5 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Wed, 25 Dec 2024 03:05:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[M] Change in coreboot[main]: soc/mediatek/mt8196: Add MT6685 adc init
by Hope Wang (Code Review) 25 Dec '24

25 Dec '24

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yidi Lin, Yu-Ping Wu. Hope Wang has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85734?usp=email ) Change subject: soc/mediatek/mt8196: Add MT6685 adc init ...................................................................... Patch Set 5: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/85734/comment/387a4246_641061c0?us… : PS3, Line 7: adc > Please mention this in the commit message. […] Done File src/soc/mediatek/common/mt6685.c: https://review.coreboot.org/c/coreboot/+/85734/comment/894aa1e4_b15d233e?us… : PS3, Line 59: wdata = mt6685_read_field(MT6685_TOP_RST_MISC, 0xFFFF, 0); : printk(BIOS_INFO, "[%s]MT6685 TOP_RST_MISC = %#x\n", __func__, wdata); > done what ? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/85734?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I26ae4f416202f04a8030259c49e009b19a60712e Gerrit-Change-Number: 85734 Gerrit-PatchSet: 5 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Wed, 25 Dec 2024 02:51:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Comment-In-Reply-To: Yidi Lin <yidilin(a)google.com>

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[M] Change in coreboot[main]: soc/mediatek/mt8196: Add MT6685 adc init
by Jarried Lin (Code Review) 25 Dec '24

25 Dec '24

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yu-Ping Wu. Hello Hope Wang, Hung-Te Lin, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85734?usp=email to look at the new patch set (#5). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/mediatek/mt8196: Add MT6685 adc init ...................................................................... soc/mediatek/mt8196: Add MT6685 adc init Add MT6685 initial settings and MT6685 ADC SW intial settings to support Thermal Information Acquisition (TIA), TIA will read thermal info in HW. TEST=Build pass BUG=b:317009620 Change-Id: I26ae4f416202f04a8030259c49e009b19a60712e Signed-off-by: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> --- A src/soc/mediatek/common/include/soc/mt6685_adc_init.h A src/soc/mediatek/common/mt6685.c M src/soc/mediatek/mt8196/Makefile.mk A src/soc/mediatek/mt8196/mt6685.c M src/soc/mediatek/mt8196/pmif_init.c 5 files changed, 180 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/85734/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/85734?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I26ae4f416202f04a8030259c49e009b19a60712e Gerrit-Change-Number: 85734 Gerrit-PatchSet: 5 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com>

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