coreboot-gerrit December 2024

coreboot-gerrit@coreboot.org

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[XS] Change in coreboot[main]: commonlib: Add ELOG_TYPE_FW_CSE_SYNC eventLog type
by Subrata Banik (Code Review) 02 Dec '24

02 Dec '24

Attention is currently required from: Dinesh Gehlot, Kapil Porwal, Karthik Ramasubramanian. Subrata Banik has posted comments on this change by Dinesh Gehlot. ( https://review.coreboot.org/c/coreboot/+/85217?usp=email ) Change subject: commonlib: Add ELOG_TYPE_FW_CSE_SYNC eventLog type ...................................................................... Patch Set 1: (3 comments) File src/commonlib/bsd/include/commonlib/bsd/elog.h: https://review.coreboot.org/c/coreboot/+/85217/comment/4f2ccaa0_1c3d591e?us… : PS1, Line 394: ELOG_FW_ROMSTAGE_CSE_SYNC ELOG_FW_EARLY_CSE_SYNC https://review.coreboot.org/c/coreboot/+/85217/comment/2a3c2673_79e7459a?us… : PS1, Line 395: ELOG_FW_RAMSTAGE_CSE_SYNC ELOG_FW_LATE_CSE_SYNC https://review.coreboot.org/c/coreboot/+/85217/comment/b33bf45d_5ad775ac?us… : PS1, Line 396: ELOG_FW_PAYLOAD_CSE_SYNC ELOG_FW_CSE_SYNC_AT_PAYLOAD -- To view, visit https://review.coreboot.org/c/coreboot/+/85217?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id73fa3a77e5fbbae5c61dfb30ae26b4ba3dca6ab Gerrit-Change-Number: 85217 Gerrit-PatchSet: 1 Gerrit-Owner: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Mon, 02 Dec 2024 06:28:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[M] Change in coreboot[main]: mb/google/rauru: Add 2nd source tas2563 amps to support beep
by Darren Ye (Code Review) 02 Dec '24

02 Dec '24

Attention is currently required from: Hung-Te Lin, Jarried Lin, Paul Menzel, Yidi Lin, Yu-Ping Wu. Darren Ye has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85360?usp=email ) Change subject: mb/google/rauru: Add 2nd source tas2563 amps to support beep ...................................................................... Patch Set 3: (8 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/85360/comment/e10b65f0_cf8eec4b?us… : PS1, Line 10: > Please mention the audio amps in the commit message. Done https://review.coreboot.org/c/coreboot/+/85360/comment/1fc79371_b60742fb?us… : PS1, Line 11: TEST=build pass and driver init ok > Please paste the new log messages. Done File src/mainboard/google/rauru/chromeos.c: https://review.coreboot.org/c/coreboot/+/85360/comment/cbae218e_8fbf8834?us… : PS1, Line 47: set gpios for NAU8318 amps\n"); : } else if (fw_config_probe(FW_CONFIG(AUDIO_AMP, AMP_TAS2563))) { : struct lb_gpio smartamp_gpios[] = { : {GPIO_EN_SPKR.id, ACTIVE_LOW, -1, "speaker reset"}, : }; : lb_add_gpios(gpios, smartamp_gpios, ARRAY_SIZE(smartamp_gpios)); : printk(BIOS_INFO, "set gpios for TAS2563 amps\n"); : } else { : lb_add_gpios(gpios, nau8318_gpios, ARRAY_SIZE(nau8318_gpios)); : printk(BIOS_INFO, "set gpios for default amps NAU8318 > as these are info level messages, I’d use the official spelling. For examples: […] Done https://review.coreboot.org/c/coreboot/+/85360/comment/621d543d_4f1c73de?us… : PS1, Line 40: struct lb_gpio nau8318_gpios[] = { : {GPIO_EN_SPKR.id, ACTIVE_HIGH, -1, "speaker enable"}, : {GPIO_BEEP_ON_OD.id, ACTIVE_HIGH, -1, "beep enable"}, : }; : : if (fw_config_probe(FW_CONFIG(AUDIO_AMP, AMP_NAU8318))) { : lb_add_gpios(gpios, nau8318_gpios, ARRAY_SIZE(nau8318_gpios)); : printk(BIOS_INFO, "set gpios for NAU8318 amps\n"); : } else if (fw_config_probe(FW_CONFIG(AUDIO_AMP, AMP_TAS2563))) { : struct lb_gpio smartamp_gpios[] = { : {GPIO_EN_SPKR.id, ACTIVE_LOW, -1, "speaker reset"}, : }; : lb_add_gpios(gpios, smartamp_gpios, ARRAY_SIZE(smartamp_gpios)); : printk(BIOS_INFO, "set gpios for TAS2563 amps\n"); : } else { : lb_add_gpios(gpios, nau8318_gpios, ARRAY_SIZE(nau8318_gpios)); : printk(BIOS_INFO, "set gpios for default amps NAU8318\n"); : } > ``` […] Done File src/mainboard/google/rauru/mainboard.c: https://review.coreboot.org/c/coreboot/+/85360/comment/df7d37ef_18bb4c05?us… : PS1, Line 20: printk(BIOS_INFO, "%s\n", __func__); > remove Done https://review.coreboot.org/c/coreboot/+/85360/comment/f98c7e0b_76f70b06?us… : PS1, Line 20: printk(BIOS_INFO, "%s\n", __func__); > This looks like a debug message? Done https://review.coreboot.org/c/coreboot/+/85360/comment/f71aa505_9208699e?us… : PS1, Line 33: printk(BIOS_INFO, "Audio configure.\n"); : : if (fw_config_probe(FW_CONFIG(AUDIO_AMP, AMP_NAU8318))) { : printk(BIOS_INFO, "Audio configure NAU8318\n"); : } else if (fw_config_probe(FW_CONFIG(AUDIO_AMP, AMP_TAS2563))) { : mtk_i2c_bus_init(I2C3, I2C_SPEED_FAST); : configure_i2s(); : printk(BIOS_INFO, "Audio configure TAS2563\n"); : } else { : printk(BIOS_INFO, "Audio configure default amps NAU8318\n"); > Please optimize the log messages? Done https://review.coreboot.org/c/coreboot/+/85360/comment/879fe765_6f3d6796?us… : PS1, Line 35: if (fw_config_probe(FW_CONFIG(AUDIO_AMP, AMP_NAU8318))) { : printk(BIOS_INFO, "Audio configure NAU8318\n"); : } else if (fw_config_probe(FW_CONFIG(AUDIO_AMP, AMP_TAS2563))) { : mtk_i2c_bus_init(I2C3, I2C_SPEED_FAST); : configure_i2s(); : printk(BIOS_INFO, "Audio configure TAS2563\n"); : } else { : printk(BIOS_INFO, "Audio configure default amps NAU8318\n"); : } > We don't need to leave the log message everywhere. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/85360?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I10cba7964d3847f2a74341b3130ff1e7bfd8d37a Gerrit-Change-Number: 85360 Gerrit-PatchSet: 3 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-CC: Darren Ye <darren.ye(a)mediatek.corp-partner.google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Mon, 02 Dec 2024 06:16:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Yidi Lin <yidilin(a)google.com>

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[XL] Change in coreboot[main]: soc/mediatek/mt8196: Add PMIF and PMIC driver support
by Yu-Ping Wu (Code Review) 02 Dec '24

02 Dec '24

Attention is currently required from: Hung-Te Lin, Jarried Lin, Paul Menzel, Yidi Lin. Yu-Ping Wu has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85126?usp=email ) Change subject: soc/mediatek/mt8196: Add PMIF and PMIC driver support ...................................................................... Patch Set 7: (2 comments) File src/soc/mediatek/mt8196/pmif_spmi.c: https://review.coreboot.org/c/coreboot/+/85126/comment/80002365_6296a963?us… : PS7, Line 183: __func__, dev->slvid, rdata); Align https://review.coreboot.org/c/coreboot/+/85126/comment/deb37fd0_4c1b2f86?us… : PS7, Line 216: cali_data[i].dly, cali_data[i].pol, read32(&reg->mst_sampl)); Align -- To view, visit https://review.coreboot.org/c/coreboot/+/85126?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I232015f45735ee5278b09d0352410617a1565177 Gerrit-Change-Number: 85126 Gerrit-PatchSet: 7 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Mon, 02 Dec 2024 06:04:28 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[M] Change in coreboot[main]: soc/mediatek/mt8196: Add booker driver
by Yidi Lin (Code Review) 02 Dec '24

02 Dec '24

Attention is currently required from: Dehui Sun, Hung-Te Lin, Jarried Lin, Yu-Ping Wu. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85362?usp=email ) Change subject: soc/mediatek/mt8196: Add booker driver ...................................................................... Patch Set 3: (1 comment) File src/soc/mediatek/mt8196/booker.c: https://review.coreboot.org/c/coreboot/+/85362/comment/5f4185d8_655c1fe6?us… : PS1, Line 23: "ldr x0, =0x0a450a00\n" : "ldr x1, [x0]\n" : "ldr x2, =0x8\n" : "bic x1, x1, x2\n" : "str x1, [x0]\n" : : "ldr x0, =0x0ac50a00\n" : "ldr x1, [x0]\n" : "ldr x2, =0x8\n" : "bic x1, x1, x2\n" : "str x1, [x0]\n" : : "ldr x0, =0x0b450a00\n" : "ldr x1, [x0]\n" : "ldr x2, =0x8\n" : "bic x1, x1, x2\n" : "str x1, [x0]\n" : : "ldr x0, =0x0bc50a00\n" : "ldr x1, [x0]\n" : "ldr x2, =0x8\n" : "bic x1, x1, x2\n" : "str x1, [x0]\n" > This inline assembly involves general flow settings. […] Thanks. Using `clrbits32` would be clear and readable. -- To view, visit https://review.coreboot.org/c/coreboot/+/85362?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6bde1e20137890addf18b23b47f17b1f63824b22 Gerrit-Change-Number: 85362 Gerrit-PatchSet: 3 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Dehui Sun <dehui.sun(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Dehui Sun <dehui.sun(a)mediatek.corp-partner.google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Mon, 02 Dec 2024 05:49:28 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Dehui Sun <dehui.sun(a)mediatek.corp-partner.google.com> Comment-In-Reply-To: Yidi Lin <yidilin(a)google.com>

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[S] Change in coreboot[main]: soc/mediatek/common: Add read16/write16 support for PMIF
by Yidi Lin (Code Review) 02 Dec '24

02 Dec '24

Attention is currently required from: Hung-Te Lin, Jarried Lin. Yidi Lin has posted comments on this change by Yidi Lin. ( https://review.coreboot.org/c/coreboot/+/84774?usp=email ) Change subject: soc/mediatek/common: Add read16/write16 support for PMIF ...................................................................... Patch Set 7: (1 comment) File src/soc/mediatek/common/pmif.c: https://review.coreboot.org/c/coreboot/+/84774/comment/8527131f_c694d321?us… : PS3, Line 67: pmif_spmi_read > Fine. Let's also file a bug for that so that we won't forget the issue. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/84774?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3adbbaaf247a8bbd99627cf089b5b55fcf4fb115 Gerrit-Change-Number: 84774 Gerrit-PatchSet: 7 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Mon, 02 Dec 2024 04:51:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Comment-In-Reply-To: Yidi Lin <yidilin(a)google.com>

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[XL] Change in coreboot[main]: soc/mediatek/mt8196: Add PMIF and PMIC driver support
by Yu-Ping Wu (Code Review) 02 Dec '24

02 Dec '24

Attention is currently required from: Hung-Te Lin, Jarried Lin, Paul Menzel, Yidi Lin. Yu-Ping Wu has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85126?usp=email ) Change subject: soc/mediatek/mt8196: Add PMIF and PMIC driver support ...................................................................... Patch Set 7: (2 comments) File src/soc/mediatek/mt8196/include/soc/spm.h: https://review.coreboot.org/c/coreboot/+/85126/comment/13896794_c1d9a034?us… : PS6, Line 645: u32 sys_timer_latch_l[16]; Array usage is wrong. Should be a single array of structs of 2 u32 members. File src/soc/mediatek/mt8196/pmif_clk.c: https://review.coreboot.org/c/coreboot/+/85126/comment/79a80e10_abea2470?us… : PS6, Line 188: ret |= pmif_check_vlpck_freq(PMIF_VLPCK_TARGET_FREQ_MHZ); extra space after = -- To view, visit https://review.coreboot.org/c/coreboot/+/85126?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I232015f45735ee5278b09d0352410617a1565177 Gerrit-Change-Number: 85126 Gerrit-PatchSet: 7 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Mon, 02 Dec 2024 04:49:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XL] Change in coreboot[main]: soc/mediatek/mt8196: Add PMIF and PMIC driver support
by Jarried Lin (Code Review) 02 Dec '24

02 Dec '24

Attention is currently required from: Hung-Te Lin, Paul Menzel, Yidi Lin, Yu-Ping Wu. Jarried Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85126?usp=email ) Change subject: soc/mediatek/mt8196: Add PMIF and PMIC driver support ...................................................................... Patch Set 7: (9 comments) File src/soc/mediatek/mt8196/pmif_clk.c: https://review.coreboot.org/c/coreboot/+/85126/comment/95c2d114_530fe418?us… : PS6, Line 117: min_cali_vali > align with `BIOS_INFO`. Done https://review.coreboot.org/c/coreboot/+/85126/comment/dbcfe05c_46642d1b?us… : PS6, Line 149: if (freq_mhz > (target_clk * (1000 - CAL_MIS_RATE) / 1000) : && freq_mhz < (target_clk * (1000 + CAL_MIS_RATE) / 1000)) { : return 0; : } > `` […] Done File src/soc/mediatek/mt8196/pmif_spmi.c: https://review.coreboot.org/c/coreboot/+/85126/comment/2ecec488_61e306d0?us… : PS6, Line 132: . > remove `.`. Done https://review.coreboot.org/c/coreboot/+/85126/comment/9041845d_8bd72370?us… : PS6, Line 182: . > remove `.`. Done https://review.coreboot.org/c/coreboot/+/85126/comment/fbbec4c7_4641dd4e?us… : PS6, Line 206: . > remove `.`. Done https://review.coreboot.org/c/coreboot/+/85126/comment/f29d6891_6e91a074?us… : PS6, Line 235: */ > one space before `*`. Done https://review.coreboot.org/c/coreboot/+/85126/comment/7bf21299_44dbf467?us… : PS6, Line 239: */ > ditto Done https://review.coreboot.org/c/coreboot/+/85126/comment/51ff6363_ec5db99d?us… : PS6, Line 249: . > remove `.`. Done https://review.coreboot.org/c/coreboot/+/85126/comment/f9472041_4fafab24?us… : PS6, Line 317: channel > channels Done -- To view, visit https://review.coreboot.org/c/coreboot/+/85126?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I232015f45735ee5278b09d0352410617a1565177 Gerrit-Change-Number: 85126 Gerrit-PatchSet: 7 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Mon, 02 Dec 2024 04:47:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yidi Lin <yidilin(a)google.com>

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[XL] Change in coreboot[main]: soc/mediatek/mt8196: Add PMIF and PMIC driver support
by Jarried Lin (Code Review) 02 Dec '24

02 Dec '24

Attention is currently required from: Hung-Te Lin, Jarried Lin, Paul Menzel, Yidi Lin, Yu-Ping Wu. Hello Hope Wang, Hung-Te Lin, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85126?usp=email to look at the new patch set (#7). The following approvals got outdated and were removed: Code-Review+1 by Yidi Lin, Verified+1 by build bot (Jenkins) Change subject: soc/mediatek/mt8196: Add PMIF and PMIC driver support ...................................................................... soc/mediatek/mt8196: Add PMIF and PMIC driver support Implement PMIF driver for communication between SoC and PMIC. Develop SPMI driver for communication over the SPMI bus. Add necessary configurations and base addresses to support PMIF. TEST=build pass BUG=b:317009620 Change-Id: I232015f45735ee5278b09d0352410617a1565177 Signed-off-by: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> --- M src/soc/mediatek/mt8196/Makefile.mk M src/soc/mediatek/mt8196/include/soc/addressmap.h A src/soc/mediatek/mt8196/include/soc/pmif.h A src/soc/mediatek/mt8196/include/soc/spm.h A src/soc/mediatek/mt8196/pmif_clk.c A src/soc/mediatek/mt8196/pmif_init.c A src/soc/mediatek/mt8196/pmif_spmi.c 7 files changed, 1,730 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/85126/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/85126?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I232015f45735ee5278b09d0352410617a1565177 Gerrit-Change-Number: 85126 Gerrit-PatchSet: 7 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com>

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[M] Change in coreboot[main]: soc/mediatek/mt8196: Reserve DRAM buffers for HW TX TRACKING
by Yu-Ping Wu (Code Review) 02 Dec '24

02 Dec '24

Yu-Ping Wu has submitted this change. ( https://review.coreboot.org/c/coreboot/+/85124?usp=email ) Change subject: soc/mediatek/mt8196: Reserve DRAM buffers for HW TX TRACKING ...................................................................... soc/mediatek/mt8196: Reserve DRAM buffers for HW TX TRACKING HW TX tracking works by writing a pattern to the designated DRAM buffer and then reading it back automatically to calculate the appropriate TX time delay. To avoid writing the pattern to system-used memory, we need to permanently reserve last 64KB memory on each rank for the HW TX tracking feature. BUG=b:317009620 TEST=Reserve memory ok Firmware shows the following log with 12GB DDR board: 00000001ffff0000-00000001ffffffff: RESERVED 000000037fff0000-000000037fffffff: RESERVED Change-Id: I042a74c7fbdc0d3dc19dd6bfd2bf021fe1c2b5fc Signed-off-by: Crystal Guo <crystal.guo(a)mediatek.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/85124 Reviewed-by: Yu-Ping Wu <yupingso(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Yidi Lin <yidilin(a)google.com> --- M src/soc/mediatek/mt8196/Makefile.mk A src/soc/mediatek/mt8196/dramc_info.c A src/soc/mediatek/mt8196/include/soc/dramc_info.h M src/soc/mediatek/mt8196/soc.c 4 files changed, 52 insertions(+), 0 deletions(-) Approvals: Yu-Ping Wu: Looks good to me, approved build bot (Jenkins): Verified Yidi Lin: Looks good to me, approved diff --git a/src/soc/mediatek/mt8196/Makefile.mk b/src/soc/mediatek/mt8196/Makefile.mk index c0b4914..82a9076 100644 --- a/src/soc/mediatek/mt8196/Makefile.mk +++ b/src/soc/mediatek/mt8196/Makefile.mk @@ -30,6 +30,7 @@ romstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c ramstage-y += ../common/dpm_v2.c +ramstage-y += dramc_info.c ramstage-y += ../common/early_init.c ramstage-y += ../common/emi.c ramstage-y += l2c_ops.c diff --git a/src/soc/mediatek/mt8196/dramc_info.c b/src/soc/mediatek/mt8196/dramc_info.c new file mode 100644 index 0000000..d647963 --- /dev/null +++ b/src/soc/mediatek/mt8196/dramc_info.c @@ -0,0 +1,40 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <assert.h> +#include <bootmem.h> +#include <cbmem.h> +#include <commonlib/bsd/mem_chip_info.h> +#include <soc/dramc_info.h> +#include <soc/dramc_soc.h> +#include <symbols.h> + +void reserve_buffer_for_dramc(void) +{ + const struct mem_chip_info *mc = cbmem_find(CBMEM_ID_MEM_CHIP_INFO); + int i; + const uint32_t reserved_size = 64 * KiB; + uint64_t cbmem_top_addr = cbmem_top(); + uint64_t reserved_addr; + uint64_t rank_size_sum = 0; + uint64_t rank_size[RANK_MAX] = {0}; + + assert(mc); + + for (i = 0; i < mc->num_entries; i++) { + const struct mem_chip_entry *e = &mc->entries[i]; + assert(e->rank < RANK_MAX); + rank_size[e->rank] += mem_chip_info_entry_density_bytes(e); + } + + for (i = 0; i < RANK_MAX; i++) { + if (rank_size[i] == 0) + continue; + rank_size_sum += rank_size[i]; + assert(rank_size_sum >= reserved_size); + + reserved_addr = (uint64_t)_dram + rank_size_sum - reserved_size; + /* Reserved range must not overlap with CBMEM. */ + assert(reserved_addr >= cbmem_top_addr); + bootmem_add_range(reserved_addr, reserved_size, BM_MEM_RESERVED); + } +} diff --git a/src/soc/mediatek/mt8196/include/soc/dramc_info.h b/src/soc/mediatek/mt8196/include/soc/dramc_info.h new file mode 100644 index 0000000..ccc7ff9 --- /dev/null +++ b/src/soc/mediatek/mt8196/include/soc/dramc_info.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef __SOC_MEDIATEK_MT8196_DRAMC_INFO_H__ +#define __SOC_MEDIATEK_MT8196_DRAMC_INFO_H__ + +void reserve_buffer_for_dramc(void); + +#endif /* __SOC_MEDIATEK_MT8196_DRAMC_INFO_H__ */ diff --git a/src/soc/mediatek/mt8196/soc.c b/src/soc/mediatek/mt8196/soc.c index d3aeb5a..8aca5d6 100644 --- a/src/soc/mediatek/mt8196/soc.c +++ b/src/soc/mediatek/mt8196/soc.c @@ -2,6 +2,7 @@ #include <device/device.h> #include <device/pci.h> +#include <soc/dramc_info.h> #include <soc/emi.h> #include <soc/mmu_operations.h> #include <soc/pcie.h> @@ -13,6 +14,8 @@ if (CONFIG(ARM64_BL31_OPTEE_WITH_SMC)) bootmem_add_range((uint64_t)_resv_mem_optee, REGION_SIZE(resv_mem_optee), BM_MEM_RESERVED); + + reserve_buffer_for_dramc(); } static void soc_read_resources(struct device *dev) -- To view, visit https://review.coreboot.org/c/coreboot/+/85124?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I042a74c7fbdc0d3dc19dd6bfd2bf021fe1c2b5fc Gerrit-Change-Number: 85124 Gerrit-PatchSet: 22 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Crystal Guo <crystal.guo(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>

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[M] Change in coreboot[main]: soc/mediatek/mt8196: Reserve DRAM buffers for HW TX TRACKING
by Yu-Ping Wu (Code Review) 02 Dec '24

02 Dec '24

Attention is currently required from: Crystal Guo, Hung-Te Lin, Jarried Lin, Julius Werner. Yu-Ping Wu has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85124?usp=email ) Change subject: soc/mediatek/mt8196: Reserve DRAM buffers for HW TX TRACKING ...................................................................... Patch Set 21: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85124?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I042a74c7fbdc0d3dc19dd6bfd2bf021fe1c2b5fc Gerrit-Change-Number: 85124 Gerrit-PatchSet: 21 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Crystal Guo <crystal.guo(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Crystal Guo <crystal.guo(a)mediatek.corp-partner.google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Mon, 02 Dec 2024 04:24:51 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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