coreboot-gerrit December 2024

coreboot-gerrit@coreboot.org

1 participants
3018 discussions

[S] Change in coreboot[main]: soc/mediatek/common: Add read16/write16 support for PMIF
by Yu-Ping Wu (Code Review) 02 Dec '24

02 Dec '24

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yidi Lin. Yu-Ping Wu has posted comments on this change by Yidi Lin. ( https://review.coreboot.org/c/coreboot/+/84774?usp=email ) Change subject: soc/mediatek/common: Add read16/write16 support for PMIF ...................................................................... Patch Set 7: Code-Review+2 (1 comment) File src/soc/mediatek/common/pmif.c: https://review.coreboot.org/c/coreboot/+/84774/comment/7b8e0ddf_d285b505?us… : PS3, Line 67: pmif_spmi_read > The current implementation of `clk_buf_init()` in `src/soc/mediatek/common/clkbuf. […] Fine. Let's also file a bug for that so that we won't forget the issue. -- To view, visit https://review.coreboot.org/c/coreboot/+/84774?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3adbbaaf247a8bbd99627cf089b5b55fcf4fb115 Gerrit-Change-Number: 84774 Gerrit-PatchSet: 7 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Mon, 02 Dec 2024 04:06:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Yidi Lin <yidilin(a)google.com> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

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[M] Change in coreboot[main]: soc/mediatek/mt8196: Add booker driver
by Dehui Sun (Code Review) 02 Dec '24

02 Dec '24

Attention is currently required from: Dehui Sun, Hung-Te Lin, Jarried Lin, Yidi Lin, Yu-Ping Wu. Dehui Sun has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85362?usp=email ) Change subject: soc/mediatek/mt8196: Add booker driver ...................................................................... Patch Set 2: (4 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/85362/comment/41dae8ab_ca22a243?us… : PS1, Line 9: booker == CI-700 : But MTK booker does not fully comply with the CI-700 spec. The booker : only uses CHI protocol, while MTK booker does not support coherence. The : booker also uses other protocols such as AXI, which is to translate CHI : transactions into EMI's AXI transactions. : : Booker = Routing + Coherence + MTE + Debug : Currently, mt8196 booker only uses the functions of Routing&MTE&Debug. : : If downstream SLC needs CMO commands propagation from the DSU, it can : set the disable_cmo_prop = 0 in the por_sbsx_cfg_ctl register. When the : bit is programmed, the CI-700 must be idle. It's better to program it : before transactions go to CI-700. > I don't see `Booker` this term in ARM CI-700 TRM. The commit message really confuses me. […] Yes, I agree with your opinion. I will revise it later and This can be modified in the next release. Let me explain: MTK Booker is a customized version of CI-700, and most of it reuses the CI-700 transaction protocol standard. The reason why CI-700 was mentioned earlier is to facilitate understanding by others. https://review.coreboot.org/c/coreboot/+/85362/comment/c9d5e928_1d5004b0?us… : PS1, Line 20: It's better to program it : before transactions go to CI-700. > Can you elaborate what settings are configured in this patch ? What happens if those settings are mi […] Okay, I'll make the changes later. The main emphasis here is to set the booker to enable CMO bit as early as possible, before any transactions are issued by CI-700. File src/soc/mediatek/mt8196/booker.c: https://review.coreboot.org/c/coreboot/+/85362/comment/14b4268e_d8875572?us… : PS1, Line 16: NDE > NDE (No Data Error) This can be modified in the next release. Non-data Error (NDE) https://review.coreboot.org/c/coreboot/+/85362/comment/b2adbe01_e64ea011?us… : PS1, Line 23: "ldr x0, =0x0a450a00\n" : "ldr x1, [x0]\n" : "ldr x2, =0x8\n" : "bic x1, x1, x2\n" : "str x1, [x0]\n" : : "ldr x0, =0x0ac50a00\n" : "ldr x1, [x0]\n" : "ldr x2, =0x8\n" : "bic x1, x1, x2\n" : "str x1, [x0]\n" : : "ldr x0, =0x0b450a00\n" : "ldr x1, [x0]\n" : "ldr x2, =0x8\n" : "bic x1, x1, x2\n" : "str x1, [x0]\n" : : "ldr x0, =0x0bc50a00\n" : "ldr x1, [x0]\n" : "ldr x2, =0x8\n" : "bic x1, x1, x2\n" : "str x1, [x0]\n" > Any reason why it can't use `clrbits32p` ? This inline assembly involves general flow settings. If MT8196 coreboot must also use the comon API clrbits32p(), I will clarify this later. -- To view, visit https://review.coreboot.org/c/coreboot/+/85362?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6bde1e20137890addf18b23b47f17b1f63824b22 Gerrit-Change-Number: 85362 Gerrit-PatchSet: 2 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Dehui Sun <dehui.sun(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Dehui Sun <dehui.sun(a)mediatek.corp-partner.google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Mon, 02 Dec 2024 03:45:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yidi Lin <yidilin(a)google.com>

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[M] Change in coreboot[main]: mb/google/rauru: Add 2nd source tas2563 amps to support beep
by Jarried Lin (Code Review) 02 Dec '24

02 Dec '24

Attention is currently required from: Hung-Te Lin, Jarried Lin, Paul Menzel, Yu-Ping Wu. Hello Hung-Te Lin, Paul Menzel, Yidi Lin, Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85360?usp=email to look at the new patch set (#3). Change subject: mb/google/rauru: Add 2nd source tas2563 amps to support beep ...................................................................... mb/google/rauru: Add 2nd source tas2563 amps to support beep Set 2nd source used i2s and i2c interface TEST=build pass and driver init ok BUG=357969183 Change-Id: I10cba7964d3847f2a74341b3130ff1e7bfd8d37a Signed-off-by: Darren Ye <darren.ye(a)mediatek.corp-partner.google.com> --- M src/mainboard/google/rauru/chromeos.c M src/mainboard/google/rauru/devicetree.cb M src/mainboard/google/rauru/gpio.h M src/mainboard/google/rauru/mainboard.c 4 files changed, 56 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/85360/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/85360?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I10cba7964d3847f2a74341b3130ff1e7bfd8d37a Gerrit-Change-Number: 85360 Gerrit-PatchSet: 3 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com>

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[L] Change in coreboot[main]: mb/google/nissa: Create pujjogatwin variant
by Subrata Banik (Code Review) 02 Dec '24

02 Dec '24

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Luca Lai, Matt DeVillier, Nick Vaccaro, Paul Menzel, Roger Wang. Subrata Banik has posted comments on this change by Roger Wang. ( https://review.coreboot.org/c/coreboot/+/85329?usp=email ) Change subject: mb/google/nissa: Create pujjogatwin variant ...................................................................... Patch Set 17: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85329?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I345ce463699840b10016555bb104a16968e7a8c1 Gerrit-Change-Number: 85329 Gerrit-PatchSet: 17 Gerrit-Owner: Roger Wang <roger2.wang(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Luca Lai <luca.lai(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jerry2 Huang <jerry2.huang(a)lcfc.corp-partner.google.com> Gerrit-CC: Lauren Ting <lauren.ting(a)lcfc.corp-partner.google.com> Gerrit-CC: Lucien Kao <lucien.kao(a)lcfc.corp-partner.google.com> Gerrit-CC: Mike Lee <mike.lee(a)lcfc.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Luca Lai <luca.lai(a)lcfc.corp-partner.google.com> Gerrit-Attention: Roger Wang <roger2.wang(a)lcfc.corp-partner.google.com> Gerrit-Comment-Date: Mon, 02 Dec 2024 03:43:08 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XL] Change in coreboot[main]: soc/mediatek/mt8196: Add PMIF and PMIC driver support
by Yidi Lin (Code Review) 02 Dec '24

02 Dec '24

Attention is currently required from: Hung-Te Lin, Jarried Lin, Paul Menzel, Yu-Ping Wu. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85126?usp=email ) The change is no longer submittable: All-Comments-Resolved and Code-Review are unsatisfied now. Change subject: soc/mediatek/mt8196: Add PMIF and PMIC driver support ...................................................................... Patch Set 6: Code-Review+1 (10 comments) Patchset: PS6: few nits. File src/soc/mediatek/mt8196/pmif_clk.c: https://review.coreboot.org/c/coreboot/+/85126/comment/f8f5464e_2de26648?us… : PS6, Line 117: min_cali_vali align with `BIOS_INFO`. https://review.coreboot.org/c/coreboot/+/85126/comment/0e5ceeb3_442cd11f?us… : PS6, Line 149: if (freq_mhz > (target_clk * (1000 - CAL_MIS_RATE) / 1000) : && freq_mhz < (target_clk * (1000 + CAL_MIS_RATE) / 1000)) { : return 0; : } `` if (freq_mhz > (target_clk * (1000 - CAL_MIS_RATE) / 1000) && freq_mhz < (target_clk * (1000 + CAL_MIS_RATE) / 1000)) return 0; `` File src/soc/mediatek/mt8196/pmif_spmi.c: https://review.coreboot.org/c/coreboot/+/85126/comment/708b8360_919d660e?us… : PS6, Line 132: . remove `.`. https://review.coreboot.org/c/coreboot/+/85126/comment/c86d85db_75850e65?us… : PS6, Line 182: . remove `.`. https://review.coreboot.org/c/coreboot/+/85126/comment/6cef5028_e3b779c3?us… : PS6, Line 206: . remove `.`. https://review.coreboot.org/c/coreboot/+/85126/comment/5aa81bca_4d80ead8?us… : PS6, Line 235: */ one space before `*`. https://review.coreboot.org/c/coreboot/+/85126/comment/d86e4173_af6f7342?us… : PS6, Line 239: */ ditto https://review.coreboot.org/c/coreboot/+/85126/comment/e40343ec_40f41d22?us… : PS6, Line 249: . remove `.`. https://review.coreboot.org/c/coreboot/+/85126/comment/3e07892f_d0f69fc9?us… : PS6, Line 317: channel channels -- To view, visit https://review.coreboot.org/c/coreboot/+/85126?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I232015f45735ee5278b09d0352410617a1565177 Gerrit-Change-Number: 85126 Gerrit-PatchSet: 6 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Mon, 02 Dec 2024 03:40:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: soc/intel/xeon_sp: Remove lpc_lockdown_config
by Jincheng Li (Code Review) 02 Dec '24

02 Dec '24

Attention is currently required from: Christian Walter, Jincheng Li, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Michał Żygowski, Patrick Rudolph, Tim Chu. Hello Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Michał Żygowski, Patrick Rudolph, Shuo Liu, Tim Chu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85286?usp=email to look at the new patch set (#2). Change subject: soc/intel/xeon_sp: Remove lpc_lockdown_config ...................................................................... soc/intel/xeon_sp: Remove lpc_lockdown_config If CHIPSET_LOCKDOWN_COREBOOT is selected, lpc_lockdown_config() will be executed in common pch/lockdown firstly. Remove xeon_sp layer lpc_lockdown_config() to avoid duplication. It still could be added back per SoC needs. The duplicated part are in src/soc/intel/common/pch/lockdown/lockdown.c: static void platform_lockdown_config(void *unused) { int chipset_lockdown; chipset_lockdown = get_lockdown_config(); /* SPI lock down configuration */ fast_spi_lockdown_cfg(chipset_lockdown); /* LPC/eSPI lock down configuration */ lpc_lockdown_config(chipset_lockdown); ... } Change-Id: Ibec389a6d55c7885def6896a0ea435514b75a323 Signed-off-by: Jincheng Li <jincheng.li(a)intel.com> --- M src/soc/intel/xeon_sp/lockdown.c 1 file changed, 0 insertions(+), 14 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/85286/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85286?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibec389a6d55c7885def6896a0ea435514b75a323 Gerrit-Change-Number: 85286 Gerrit-PatchSet: 2 Gerrit-Owner: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com>

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[XL] Change in coreboot[main]: soc/mediatek/mt8196: Add PMIF and PMIC driver support
by Jarried Lin (Code Review) 02 Dec '24

02 Dec '24

Attention is currently required from: Hung-Te Lin, Paul Menzel, Yu-Ping Wu. Jarried Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85126?usp=email ) Change subject: soc/mediatek/mt8196: Add PMIF and PMIC driver support ...................................................................... Patch Set 6: (1 comment) Patchset: PS6: @yupingso@google.com Could you please help review it? Thank you. -- To view, visit https://review.coreboot.org/c/coreboot/+/85126?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I232015f45735ee5278b09d0352410617a1565177 Gerrit-Change-Number: 85126 Gerrit-PatchSet: 6 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Mon, 02 Dec 2024 03:07:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[M] Change in coreboot[main]: soc/mediatek/mt8196: Reserve DRAM buffers for HW TX TRACKING
by Jarried Lin (Code Review) 02 Dec '24

02 Dec '24

Attention is currently required from: Crystal Guo, Hung-Te Lin, Julius Werner, Yu-Ping Wu. Jarried Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85124?usp=email ) Change subject: soc/mediatek/mt8196: Reserve DRAM buffers for HW TX TRACKING ...................................................................... Patch Set 21: (1 comment) Patchset: PS21: @yupingso@google.com, Could you please help review it? Thank you. -- To view, visit https://review.coreboot.org/c/coreboot/+/85124?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I042a74c7fbdc0d3dc19dd6bfd2bf021fe1c2b5fc Gerrit-Change-Number: 85124 Gerrit-PatchSet: 21 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Crystal Guo <crystal.guo(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Crystal Guo <crystal.guo(a)mediatek.corp-partner.google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Mon, 02 Dec 2024 03:07:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: .checkpatch.conf: Set max line length to 96
by Yidi Lin (Code Review) 02 Dec '24

02 Dec '24

Attention is currently required from: Yu-Ping Wu. Yidi Lin has posted comments on this change by Yu-Ping Wu. ( https://review.coreboot.org/c/coreboot/+/85435?usp=email ) Change subject: .checkpatch.conf: Set max line length to 96 ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85435?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7737f3d2e0d016b0f0dd82df2865a6b51b667066 Gerrit-Change-Number: 85435 Gerrit-PatchSet: 1 Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Mon, 02 Dec 2024 03:06:57 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: soc/intel/xeon_xp: Fix lower ram range bug
by Name of user not set (Code Review) 02 Dec '24

02 Dec '24

Attention is currently required from: Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Shuo Liu, Tim Chu. Hello Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Shuo Liu, Tim Chu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85434?usp=email to look at the new patch set (#2). Change subject: soc/intel/xeon_xp: Fix lower ram range bug ...................................................................... soc/intel/xeon_xp: Fix lower ram range bug Generally the base address of FSP output is already aligned so there is no need to minus 1. The current code loses 1 byte in the lower DRAM address space. Change-Id: Ia8147702aad496c431cf10b896d68a826c9e45b1 Signed-off-by: Yuchi Chen <yuchi.chen(a)intel.com> --- M src/soc/intel/xeon_sp/uncore.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/85434/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85434?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia8147702aad496c431cf10b896d68a826c9e45b1 Gerrit-Change-Number: 85434 Gerrit-PatchSet: 2 Gerrit-Owner: yuchi.chen(a)intel.com Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com>

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coreboot-gerrit December 2024