coreboot-gerrit December 2024

coreboot-gerrit@coreboot.org

1 participants
3018 discussions

[M] Change in coreboot[main]: mb/trulo/var/uldrenite: Power management and external Settings
by Paul Menzel (Code Review) 14 Dec '24

14 Dec '24

Attention is currently required from: Dinesh Gehlot, Dtrain Hsu, Eric Lai, Jayvik Desai, John Su, Kapil Porwal, Nick Vaccaro, Subrata Banik. Paul Menzel has posted comments on this change by John Su. ( https://review.coreboot.org/c/coreboot/+/85578?usp=email ) Change subject: mb/trulo/var/uldrenite: Power management and external Settings ...................................................................... Patch Set 2: (5 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/85578/comment/cd6a6165_7c106cf1?us… : PS2, Line 7: Power management and external Settings Please make it a statement. For example: > Add power management and external settings or > Enable DPTF, S0ix and configure FIVR setting https://review.coreboot.org/c/coreboot/+/85578/comment/61096cc8_5ed26b35?us… : PS2, Line 9: dptf DPTF https://review.coreboot.org/c/coreboot/+/85578/comment/b29d3d87_9bf971e9?us… : PS2, Line 10: s0ix S0ix https://review.coreboot.org/c/coreboot/+/85578/comment/da529fc6_c2797405?us… : PS2, Line 14: TEST=emerge-nissa coreboot Do you have access to the device already? File src/mainboard/google/brya/variants/uldrenite/overridetree.cb: https://review.coreboot.org/c/coreboot/+/85578/comment/1d5b5cd4_140991df?us… : PS2, Line 85: #DPTF Add a space after #? -- To view, visit https://review.coreboot.org/c/coreboot/+/85578?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id7777b7560b40c1427df9645d991240c027e58e4 Gerrit-Change-Number: 85578 Gerrit-PatchSet: 2 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Sat, 14 Dec 2024 08:47:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

1 0

[M] Change in coreboot[main]: arch/x86: Add breakpoint to stack canary
by Patrick Rudolph (Code Review) 14 Dec '24

14 Dec '24

Patrick Rudolph has posted comments on this change by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/84833?usp=email ) Change subject: arch/x86: Add breakpoint to stack canary ...................................................................... Patch Set 20: (1 comment) Patchset: PS20: > > Without further details I cannot fix this. […] The first problem ``` [NOTE ] coreboot-coreboot-unknown.9999.06d5019 Fri Dec 13 06:11:04 UTC 2024 x86_64 verstage starting (log level: 8)... [ERROR] Failed to create address zero instruction fetch breakpoint [ERROR] Failed to create stack canary breakpoint ``` is due to `CONFIG_VBOOT_SEPARATE_VERSTAGE=n`. The verstage code is compiled into romstage, but it doesn't clear BSS when jumping to verstage. Thus there are not enough free breakpoint slots when it tries to init breakpoints for instruction and NULL deref. Previously it worked as there were enough free slots by coincidence. The other problem is more interesting: ``` [NOTE ] coreboot-coreboot-unknown.9999.06d5019 Fri Dec 13 06:11:04 UTC 2024 x86_64 romstage starting (log level: 8)... [ERROR] Stack corruption detected at rip: 0xf983007a [ERROR] Stack corruption detected at rip: 0xf983007a ``` Is this with https://review.coreboot.org/c/coreboot/+/85568 applied? I build google/fatcat and the shown address 0xf983007a seems to outside of the BIOS region and outside of CAR. Are you sure that the generic breakpoint code works on x86_64? It seems to work fine on x86_32. Do the other platforms show the same address (`0xf983007a`) ? -- To view, visit https://review.coreboot.org/c/coreboot/+/84833?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8adf07a8425856795a4a71da5c41bec2244b02a8 Gerrit-Change-Number: 84833 Gerrit-PatchSet: 20 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Alicja Michalska <ahplka19(a)gmail.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Jeremy Compostella <jeremy.compostella(a)gmail.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Jincheng Li <jincheng.li(a)intel.com> Gerrit-CC: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-CC: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-CC: Uwe Poeche <uwe.poeche(a)siemens.com> Gerrit-CC: yuchi.chen(a)intel.com Gerrit-Comment-Date: Sat, 14 Dec 2024 07:58:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Patrick Rudolph <patrick.rudolph(a)9elements.com>

1 0

[XS] Change in coreboot[main]: util/crossgcc: Update ACPICA from 20230628 to 20240927
by Elyes Haouas (Code Review) 14 Dec '24

14 Dec '24

Attention is currently required from: Felix Singer, Martin L Roth. Elyes Haouas has posted comments on this change by Elyes Haouas. ( https://review.coreboot.org/c/coreboot/+/84787?usp=email ) Change subject: util/crossgcc: Update ACPICA from 20230628 to 20240927 ...................................................................... Patch Set 3: (1 comment) Patchset: PS3: 20241212 released -- To view, visit https://review.coreboot.org/c/coreboot/+/84787?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4ae7073e46084024360ac0dd44e0df666cb32269 Gerrit-Change-Number: 84787 Gerrit-PatchSet: 3 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Comment-Date: Sat, 14 Dec 2024 06:58:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

1 0

[XS] Change in coreboot[main]: cpu/intel/car/romstage: Fix false-positive stack corruption
by Patrick Rudolph (Code Review) 14 Dec '24

14 Dec '24

Attention is currently required from: Jincheng Li, Shuo Liu, Subrata Banik, yuchi.chen(a)intel.com. Patrick Rudolph has posted comments on this change by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/85568?usp=email ) Change subject: cpu/intel/car/romstage: Fix false-positive stack corruption ...................................................................... Patch Set 1: (1 comment) File src/cpu/intel/car/romstage.c: https://review.coreboot.org/c/coreboot/+/85568/comment/93967dd0_772b59ea?us… : PS1, Line 40: stack_canary_breakpoint_remove(); > The stack canary is enabled in bootblock ahead of time, right? Not sure if it is a good pattern to d […] It cannot be enabled without an IDT in place. -- To view, visit https://review.coreboot.org/c/coreboot/+/85568?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7ebf0a5e8eaad49af77ab4d5f6b58fc849013b14 Gerrit-Change-Number: 85568 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Uwe Poeche <uwe.poeche(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: siemens-bot Gerrit-Reviewer: yuchi.chen(a)intel.com Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-CC: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: yuchi.chen(a)intel.com Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Comment-Date: Sat, 14 Dec 2024 06:45:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Shuo Liu <shuo.liu(a)intel.com>

1 0

[M] Change in coreboot[main]: soc/intel/alderlake: Add function to force disable memory channels
by Kapil Porwal (Code Review) 14 Dec '24

14 Dec '24

Attention is currently required from: Angel Pons, Christian Walter, Dinesh Gehlot, Eric Lai, Jamie Chen, Jayvik Desai, Jeremy Soller, Lean Sheng Tan, Michał Kopeć, Michał Żygowski, Nick Vaccaro, Paul Menzel, Piotr Król, Sean Rhodes, Subrata Banik, Tim Crawford. Kapil Porwal has posted comments on this change by Kapil Porwal. ( https://review.coreboot.org/c/coreboot/+/85529?usp=email ) Change subject: soc/intel/alderlake: Add function to force disable memory channels ...................................................................... Patch Set 6: (1 comment) File src/soc/intel/alderlake/meminit.c: https://review.coreboot.org/c/coreboot/+/85529/comment/cb20ef33_ebc271df?us… : PS1, Line 252: if (ch_disable_mask == 0) { > > > > I think this CL is to provide an additional option to disable memory channels. […] I have verified that we can disable Mc0Ch0+Mc0Ch1 channels while keeping Mc0Ch2+Mc0Ch3 channels enabled. The same check is present in current patch. All other combinations (except above) where Mc0Ch0 is disabled, cannot boot. -- To view, visit https://review.coreboot.org/c/coreboot/+/85529?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibfeca4509cb3d88bc1bac2ac2d480e665d895bc5 Gerrit-Change-Number: 85529 Gerrit-PatchSet: 6 Gerrit-Owner: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jamie Chen <jamie.chen(a)intel.corp-partner.google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Jamie Chen <jamie.chen(a)intel.corp-partner.google.com> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Comment-Date: Sat, 14 Dec 2024 06:28:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Eric Lai <ericllai(a)google.com> Comment-In-Reply-To: Jamie Chen <jamie.chen(a)intel.corp-partner.google.com> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Kapil Porwal <kapilporwal(a)google.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com>

1 0

[M] Change in coreboot[main]: Docs: Convert bare URLs into hyperlinks
by Felix Singer (Code Review) 14 Dec '24

14 Dec '24

Felix Singer has submitted this change. ( https://review.coreboot.org/c/coreboot/+/85433?usp=email ) Change subject: Docs: Convert bare URLs into hyperlinks ...................................................................... Docs: Convert bare URLs into hyperlinks Format bare URLs as links so that they are rendered as hyperlinks instead of plain text. Change-Id: I234d395cddd58f3d3dfb4b4ddccb6efc70d4dd9e Signed-off-by: Nicholas Chin <nic.c3.14(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/85433 Reviewed-by: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M Documentation/getting_started/kconfig.md M Documentation/infrastructure/services.md M Documentation/mainboard/emulation/qemu-sbsa.md M Documentation/mainboard/ocp/deltalake.md M Documentation/mainboard/starlabs/byte_adl.md M Documentation/mainboard/starlabs/labtop_cml.md M Documentation/mainboard/starlabs/labtop_kbl.md M Documentation/mainboard/starlabs/lite_adl.md M Documentation/mainboard/starlabs/lite_glk.md M Documentation/mainboard/starlabs/lite_glkr.md M Documentation/mainboard/starlabs/starbook_adl.md M Documentation/mainboard/starlabs/starbook_tgl.md M Documentation/mainboard/starlabs/starfighter_rpl.md M Documentation/mainboard/system76/gaze15.md M Documentation/mainboard/system76/lemp9.md M Documentation/mainboard/system76/oryp5.md M Documentation/mainboard/system76/oryp6.md M Documentation/releases/coreboot-24.02-relnotes.md M Documentation/releases/coreboot-24.05-relnotes.md M Documentation/releases/coreboot-24.11-relnotes.md M Documentation/releases/coreboot-4.1-relnotes.md M Documentation/releases/coreboot-4.10-relnotes.md M Documentation/releases/coreboot-4.14-relnotes.md M Documentation/releases/coreboot-4.16-relnotes.md M Documentation/releases/coreboot-4.17-relnotes.md M Documentation/releases/coreboot-4.18-relnotes.md M Documentation/releases/coreboot-4.19-relnotes.md M Documentation/releases/coreboot-4.2-relnotes.md M Documentation/releases/coreboot-4.20.1-relnotes.md M Documentation/releases/coreboot-4.21-relnotes.md M Documentation/releases/coreboot-4.22-relnotes.md M Documentation/releases/coreboot-4.3-relnotes.md M Documentation/releases/coreboot-4.4-relnotes.md M Documentation/releases/coreboot-4.5-relnotes.md M Documentation/releases/coreboot-4.6-relnotes.md M Documentation/releases/coreboot-4.8.1-relnotes.md M Documentation/soc/intel/xeon_sp/community_preview_guide.md M Documentation/technotes/2015-11-rebuilding-coreboot-image-generation.md M Documentation/technotes/console.md 39 files changed, 91 insertions(+), 90 deletions(-) Approvals: build bot (Jenkins): Verified Felix Singer: Looks good to me, approved diff --git a/Documentation/getting_started/kconfig.md b/Documentation/getting_started/kconfig.md index 8965458..4aa00a2 100644 --- a/Documentation/getting_started/kconfig.md +++ b/Documentation/getting_started/kconfig.md @@ -1172,13 +1172,13 @@ ### ultraedit: -https://github.com/martinlroth/wordfiles/blob/master/kconfig.uew +<https://github.com/martinlroth/wordfiles/blob/master/kconfig.uew> ### atom: -https://github.com/martinlroth/language-kconfig +<https://github.com/martinlroth/language-kconfig> ## Syntax Checking: @@ -1217,7 +1217,7 @@ ## License: This work is licensed under the Creative Commons Attribution 4.0 International License. To view a copy of this license, visit -https://creativecommons.org/licenses/by/4.0/ or send a letter to Creative +<https://creativecommons.org/licenses/by/4.0/> or send a letter to Creative Commons, PO Box 1866, Mountain View, CA 94042, USA. Code examples snippets are licensed under GPLv2, and are used here under fair diff --git a/Documentation/infrastructure/services.md b/Documentation/infrastructure/services.md index 6d7ddd9..6b2b1c7 100644 --- a/Documentation/infrastructure/services.md +++ b/Documentation/infrastructure/services.md @@ -41,7 +41,7 @@ ### Gerrit user avatar To setup an avatar to show in Gerrit, clone the avatars repository at -https://review.coreboot.org/gerrit-avatars.git and add a file named +<https://review.coreboot.org/gerrit-avatars.git> and add a file named $your-user-ID.jpg (the user ID is a number shown on the [settings screen](https://review.coreboot.org/settings)). The image must be provided in JPEG format, must be square and have at most 50000 bytes. diff --git a/Documentation/mainboard/emulation/qemu-sbsa.md b/Documentation/mainboard/emulation/qemu-sbsa.md index abbd189..e7eee24 100644 --- a/Documentation/mainboard/emulation/qemu-sbsa.md +++ b/Documentation/mainboard/emulation/qemu-sbsa.md @@ -39,4 +39,4 @@ arm and 9elements worked together in order to create a LBBR compliant bootflow consisting of ```TF-A```, ```coreboot```, ```leanefi``` and ```LinuxBoot```. A proof of concept -can be found here https://gitlab.arm.com/systemready/firmware-build/linuxboot/lbbr-coreboot-p… +can be found here <https://gitlab.arm.com/systemready/firmware-build/linuxboot/lbbr-coreboot-p…> diff --git a/Documentation/mainboard/ocp/deltalake.md b/Documentation/mainboard/ocp/deltalake.md index 404052c..05df4f2 100644 --- a/Documentation/mainboard/ocp/deltalake.md +++ b/Documentation/mainboard/ocp/deltalake.md @@ -32,7 +32,7 @@ ## How to build OSF code base is publicly available at -https://github.com/opencomputeproject/OpenSystemFirmware +<https://github.com/opencomputeproject/OpenSystemFirmware> Run following commands to build Delta Lake OSF image from scratch: git clone https://github.com/opencomputeproject/OpenSystemFirmware.git @@ -44,10 +44,11 @@ Besides coreboot, the Delta Lake OSF solution includes following components: - FSP blob: The blobs (Intel Cooper Lake Scalable Processor Firmware Support Package) - is downloaded from https://github.com/intel/FSP/tree/master/CedarIslandFspBinPkg. -- Microcode: downloaded from github.com/intel/Intel-Linux-Processor-Microcode-Data-Files. + is downloaded from <https://github.com/intel/FSP/tree/master/CedarIslandFspBinPkg>. +- Microcode: downloaded from + <https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files>. - ME ignition binary: downloaded from - https://github.com/tianocore/edk2-non-osi/tree/master/Silicon/Intel/PurleyS… + <https://github.com/tianocore/edk2-non-osi/tree/master/Silicon/Intel/PurleyS…> - ACM binaries: only required for CBnT enablement. Available under NDA with Intel. - Payload: LinuxBoot is necessary when LinuxBoot is used as the coreboot payload. U-root as initramfs, is used in the joint development. It is built diff --git a/Documentation/mainboard/starlabs/byte_adl.md b/Documentation/mainboard/starlabs/byte_adl.md index 11bed26..7805bb5 100644 --- a/Documentation/mainboard/starlabs/byte_adl.md +++ b/Documentation/mainboard/starlabs/byte_adl.md @@ -2,7 +2,7 @@ ## Specs -- CPU (full processor specs available at https://ark.intel.com) +- CPU (full processor specs available at <https://ark.intel.com>) - Intel N200 (Alder Lake) - EC - ITE IT5570E diff --git a/Documentation/mainboard/starlabs/labtop_cml.md b/Documentation/mainboard/starlabs/labtop_cml.md index e50db77..e8d846b 100644 --- a/Documentation/mainboard/starlabs/labtop_cml.md +++ b/Documentation/mainboard/starlabs/labtop_cml.md @@ -2,7 +2,7 @@ ## Specs -- CPU (full processor specs available at https://ark.intel.com) +- CPU (full processor specs available at <https://ark.intel.com>) - Intel i7-10710U (Comet Lake) - Intel i3-10110U (Comet Lake) - EC diff --git a/Documentation/mainboard/starlabs/labtop_kbl.md b/Documentation/mainboard/starlabs/labtop_kbl.md index eb68938..2b3b2cc 100644 --- a/Documentation/mainboard/starlabs/labtop_kbl.md +++ b/Documentation/mainboard/starlabs/labtop_kbl.md @@ -2,7 +2,7 @@ ## Specs -- CPU (full processor specs available at https://ark.intel.com) +- CPU (full processor specs available at <https://ark.intel.com>) - Intel i7-8550u (Kaby Lake Refresh) - EC - ITE IT8987E diff --git a/Documentation/mainboard/starlabs/lite_adl.md b/Documentation/mainboard/starlabs/lite_adl.md index 821c755..b6e7cb3 100644 --- a/Documentation/mainboard/starlabs/lite_adl.md +++ b/Documentation/mainboard/starlabs/lite_adl.md @@ -2,7 +2,7 @@ ## Specs -- CPU (full processor specs available at https://ark.intel.com) +- CPU (full processor specs available at <https://ark.intel.com>) - Intel N200 (Alder Lake) - EC - ITE IT5570E diff --git a/Documentation/mainboard/starlabs/lite_glk.md b/Documentation/mainboard/starlabs/lite_glk.md index d31b680..79aad0c 100644 --- a/Documentation/mainboard/starlabs/lite_glk.md +++ b/Documentation/mainboard/starlabs/lite_glk.md @@ -1,7 +1,7 @@ # StarLite Mk III ## Specs -- CPU (full processor specs available at https://ark.intel.com) +- CPU (full processor specs available at <https://ark.intel.com>) - Intel N5000 (Gemini Lake) - EC - ITE IT8987E diff --git a/Documentation/mainboard/starlabs/lite_glkr.md b/Documentation/mainboard/starlabs/lite_glkr.md index bf36281..e1ffe21 100644 --- a/Documentation/mainboard/starlabs/lite_glkr.md +++ b/Documentation/mainboard/starlabs/lite_glkr.md @@ -1,7 +1,7 @@ # StarLite Mk III ## Specs -- CPU (full processor specs available at https://ark.intel.com) +- CPU (full processor specs available at <https://ark.intel.com>) - Intel N5030 (Gemini Lake Refresh) - EC - Nuvoton NPCE985P/G diff --git a/Documentation/mainboard/starlabs/starbook_adl.md b/Documentation/mainboard/starlabs/starbook_adl.md index cce9cbe..3840bc9 100644 --- a/Documentation/mainboard/starlabs/starbook_adl.md +++ b/Documentation/mainboard/starlabs/starbook_adl.md @@ -2,7 +2,7 @@ ## Specs -- CPU (full processor specs available at https://ark.intel.com) +- CPU (full processor specs available at <https://ark.intel.com>) - Intel i7-1260P (Alder Lake) - Intel i3-1220P (Alder Lake) - Intel i3-1315U (Raptor Lake) diff --git a/Documentation/mainboard/starlabs/starbook_tgl.md b/Documentation/mainboard/starlabs/starbook_tgl.md index 30810dd..db447cf 100644 --- a/Documentation/mainboard/starlabs/starbook_tgl.md +++ b/Documentation/mainboard/starlabs/starbook_tgl.md @@ -2,7 +2,7 @@ ## Specs -- CPU (full processor specs available at https://ark.intel.com) +- CPU (full processor specs available at <https://ark.intel.com>) - Intel i7-1165G7 (Tiger Lake) - Intel i3-1110G4 (Tiger Lake) - EC diff --git a/Documentation/mainboard/starlabs/starfighter_rpl.md b/Documentation/mainboard/starlabs/starfighter_rpl.md index d386fb3..2468fae 100644 --- a/Documentation/mainboard/starlabs/starfighter_rpl.md +++ b/Documentation/mainboard/starlabs/starfighter_rpl.md @@ -2,7 +2,7 @@ ## Specs -- CPU (full processor specs available at https://ark.intel.com) +- CPU (full processor specs available at <https://ark.intel.com>) - Intel i3-1315U (Raptor Lake) - Intel i7-13700H (Raptor Lake) - Intel i9-13900H (Raptor Lake) diff --git a/Documentation/mainboard/system76/gaze15.md b/Documentation/mainboard/system76/gaze15.md index 45e4e26..01af254 100644 --- a/Documentation/mainboard/system76/gaze15.md +++ b/Documentation/mainboard/system76/gaze15.md @@ -5,7 +5,7 @@ - CPU - Intel Core i7 10750H - EC - - ITE5570E running https://github.com/system76/ec + - ITE5570E running <https://github.com/system76/ec> - Graphics - Intel UHD Graphics - NVIDIA GeForce GTX 1650/1650 Ti/1660 Ti diff --git a/Documentation/mainboard/system76/lemp9.md b/Documentation/mainboard/system76/lemp9.md index c216188..548cfa5 100644 --- a/Documentation/mainboard/system76/lemp9.md +++ b/Documentation/mainboard/system76/lemp9.md @@ -6,7 +6,7 @@ - Intel i7-10510U - Intel i5-10210U - EC - - ITE IT5570E running https://github.com/system76/ec + - ITE IT5570E running <https://github.com/system76/ec> - Backlit Keyboard, with standard PS/2 keycodes and SCI hotkeys - Battery - Charger, using AC adapter or USB-C PD diff --git a/Documentation/mainboard/system76/oryp5.md b/Documentation/mainboard/system76/oryp5.md index bfde6c0..902e7ce 100644 --- a/Documentation/mainboard/system76/oryp5.md +++ b/Documentation/mainboard/system76/oryp5.md @@ -6,7 +6,7 @@ - Intel Core i7-8750H - Intel Core i7-9750H - EC - - ITE8587E running https://github.com/system76/ec + - ITE8587E running <https://github.com/system76/ec> - Graphics - Intel UHD Graphics 630 - NVIDIA GeForce RTX 2080/2070/2060 diff --git a/Documentation/mainboard/system76/oryp6.md b/Documentation/mainboard/system76/oryp6.md index 6a52c54..0050ead 100644 --- a/Documentation/mainboard/system76/oryp6.md +++ b/Documentation/mainboard/system76/oryp6.md @@ -7,7 +7,7 @@ - Chipset - Intel HM470 - EC - - ITE IT5570E running https://github.com/system76/ec + - ITE IT5570E running <https://github.com/system76/ec> - GPU - NVIDIA GeForce RTX 2080 Super (Max-Q) - or NVIDIA GeForce RTX 2070 (Max-Q) diff --git a/Documentation/releases/coreboot-24.02-relnotes.md b/Documentation/releases/coreboot-24.02-relnotes.md index 4b98d57..90bd138 100644 --- a/Documentation/releases/coreboot-24.02-relnotes.md +++ b/Documentation/releases/coreboot-24.02-relnotes.md @@ -113,7 +113,7 @@ from 128060 bytes decompressed (64121 bytes after LZMA) to 172304 bytes decompressed (82734 bytes after LZMA). -[0] https://github.com/google/wuffs +[0] <https://github.com/google/wuffs> @@ -197,7 +197,7 @@ the version of verstage used in coreboot 24.02. -Issues from the coreboot bugtracker: https://ticket.coreboot.org/ +Issues from the coreboot bugtracker: <https://ticket.coreboot.org/> ### coreboot-wide or architecture-wide issues @@ -282,9 +282,9 @@ coreboot Links and Contact Information -------------------------------------- -* Main Web site: https://www.coreboot.org -* Downloads: https://coreboot.org/downloads.html -* Source control: https://review.coreboot.org -* Documentation: https://doc.coreboot.org -* Issue tracker: https://ticket.coreboot.org/projects/coreboot -* Donations: https://coreboot.org/donate.html +* Main Web site: <https://www.coreboot.org> +* Downloads: <https://coreboot.org/downloads.html> +* Source control: <https://review.coreboot.org> +* Documentation: <https://doc.coreboot.org> +* Issue tracker: <https://ticket.coreboot.org/projects/coreboot> +* Donations: <https://coreboot.org/donate.html> diff --git a/Documentation/releases/coreboot-24.05-relnotes.md b/Documentation/releases/coreboot-24.05-relnotes.md index 86910b8..6d34e5b 100644 --- a/Documentation/releases/coreboot-24.05-relnotes.md +++ b/Documentation/releases/coreboot-24.05-relnotes.md @@ -70,7 +70,7 @@ * Numerous fixes for clang support * Ongoing code cleanup * Docs: Replace Recommonmark with MyST Parser. For changes, see the commit - message in https://review.coreboot.org/73158 + message in <https://review.coreboot.org/73158> @@ -257,9 +257,9 @@ coreboot Links and Contact Information -------------------------------------- -* Main Website: https://www.coreboot.org -* Downloads: https://coreboot.org/downloads.html -* Source control: https://review.coreboot.org -* Documentation: https://doc.coreboot.org -* Issue tracker: https://ticket.coreboot.org/projects/coreboot -* Donations: https://coreboot.org/donate.html +* Main Website: <https://www.coreboot.org> +* Downloads: <https://coreboot.org/downloads.html> +* Source control: <https://review.coreboot.org> +* Documentation: <https://doc.coreboot.org> +* Issue tracker: <https://ticket.coreboot.org/projects/coreboot> +* Donations: <https://coreboot.org/donate.html> diff --git a/Documentation/releases/coreboot-24.11-relnotes.md b/Documentation/releases/coreboot-24.11-relnotes.md index 6416b87..9ff9036 100644 --- a/Documentation/releases/coreboot-24.11-relnotes.md +++ b/Documentation/releases/coreboot-24.11-relnotes.md @@ -83,7 +83,7 @@ Significant Known and Open Issues --------------------------------- -Issues from the coreboot bugtracker: https://ticket.coreboot.org/ +Issues from the coreboot bugtracker: <https://ticket.coreboot.org/> * To be filled in immediately before the release by the release team @@ -91,9 +91,9 @@ coreboot Links and Contact Information -------------------------------------- -* Main Web site: https://www.coreboot.org -* Downloads: https://coreboot.org/downloads.html -* Source control: https://review.coreboot.org -* Documentation: https://doc.coreboot.org -* Issue tracker: https://ticket.coreboot.org/projects/coreboot -* Donations: https://coreboot.org/donate.html +* Main Web site: <https://www.coreboot.org> +* Downloads: <https://coreboot.org/downloads.html> +* Source control: <https://review.coreboot.org> +* Documentation: <https://doc.coreboot.org> +* Issue tracker: <https://ticket.coreboot.org/projects/coreboot> +* Donations: <https://coreboot.org/donate.html> diff --git a/Documentation/releases/coreboot-4.1-relnotes.md b/Documentation/releases/coreboot-4.1-relnotes.md index d269688..dcc1f8d 100644 --- a/Documentation/releases/coreboot-4.1-relnotes.md +++ b/Documentation/releases/coreboot-4.1-relnotes.md @@ -31,7 +31,7 @@ overwhelming. With the release of coreboot 4.1, you get an announcement (this email), -a git tag (4.1), and tar archives at http://www.coreboot.org/releases/, +a git tag (4.1), and tar archives at <http://www.coreboot.org/releases/>, for the coreboot sources and the redistributable blobs. Starting with coreboot 4.1, we will maintain a high level changelog and diff --git a/Documentation/releases/coreboot-4.10-relnotes.md b/Documentation/releases/coreboot-4.10-relnotes.md index 0f935c2..e4c9b26 100644 --- a/Documentation/releases/coreboot-4.10-relnotes.md +++ b/Documentation/releases/coreboot-4.10-relnotes.md @@ -59,7 +59,7 @@ If you want to use Google Cyan with the release (or if you're tracking the master branch), please keep an eye on -https://review.coreboot.org/c/coreboot/+/34304 where a solution for this +<https://review.coreboot.org/c/coreboot/+/34304> where a solution for this issue is sought. Deprecations diff --git a/Documentation/releases/coreboot-4.14-relnotes.md b/Documentation/releases/coreboot-4.14-relnotes.md index 4f2b00e..8a78b40 100644 --- a/Documentation/releases/coreboot-4.14-relnotes.md +++ b/Documentation/releases/coreboot-4.14-relnotes.md @@ -147,7 +147,7 @@ With this release, the codebase for multiple generations of Xeon-SP were unified and optimized: -* SKX-SP SoC code is used in OCP TiogaPass mainboard [3]. Support for +* SKX-SP SoC code is used in [OCP TiogaPass mainboard][3]. Support for this board is in Proof Of Concept Status. * CPX-SP SoC code is used in OCP DeltaLake mainboard. Support for this board is in DVT (Design Validation Test) exit equivalent status. @@ -155,7 +155,7 @@ features gaps are described in [4]. -[1] https://www.intel.com/content/www/us/en/products/details/processors/xeon/sc… -[2] https://www.intel.com/content/www/us/en/products/docs/processors/xeon/3rd-g… -[3] ../mainboard/ocp/tiogapass.md -[4] ../mainboard/ocp/deltalake.md +[1]: <https://www.intel.com/content/www/us/en/products/details/processors/xeon/sc…> +[2]: <https://www.intel.com/content/www/us/en/products/docs/processors/xeon/3rd-g…> +[3]: <../mainboard/ocp/tiogapass.md> +[4]: <../mainboard/ocp/deltalake.md> diff --git a/Documentation/releases/coreboot-4.16-relnotes.md b/Documentation/releases/coreboot-4.16-relnotes.md index bf60d53..c9d6705 100644 --- a/Documentation/releases/coreboot-4.16-relnotes.md +++ b/Documentation/releases/coreboot-4.16-relnotes.md @@ -115,7 +115,7 @@ the BSP CPU. - Support SMM in the legacy ASEG (0xa0000 - 0xb0000) region. A POC showed that it's not that hard to do with PARALLEL_MP - https://review.coreboot.org/c/coreboot/+/58700 + <https://review.coreboot.org/c/coreboot/+/58700> No platforms in the tree have any hardware limitations that would block migrating to PARALLEL_MP / a simple !CONFIG_SMP codebase. diff --git a/Documentation/releases/coreboot-4.17-relnotes.md b/Documentation/releases/coreboot-4.17-relnotes.md index eb136f4..dbfff40 100644 --- a/Documentation/releases/coreboot-4.17-relnotes.md +++ b/Documentation/releases/coreboot-4.17-relnotes.md @@ -239,7 +239,7 @@ profiler-like output, and thus can be feed to flame graph generation tools. -Generating flame graph using https://github.com/brendangregg/FlameGraph: +Generating flame graph using <https://github.com/brendangregg/FlameGraph>: ``` cbmem -S > trace.txt FlameGraph/flamegraph.pl --flamechart trace.txt > output.svg diff --git a/Documentation/releases/coreboot-4.18-relnotes.md b/Documentation/releases/coreboot-4.18-relnotes.md index a779192..73fc445 100644 --- a/Documentation/releases/coreboot-4.18-relnotes.md +++ b/Documentation/releases/coreboot-4.18-relnotes.md @@ -78,7 +78,7 @@ version) of the firmware. Further reference: -https://web.archive.org/web/20220310104905/https://blogs.gnome.org/hughsie/2022/03/10/firmware-software-bill-of-materials/ +<https://web.archive.org/web/20220310104905/https://blogs.gnome.org/hughsie/…> - Add Makefile.inc to generate and build coswid tags - Add templates for most payloads, coreboot, intel-microcode, diff --git a/Documentation/releases/coreboot-4.19-relnotes.md b/Documentation/releases/coreboot-4.19-relnotes.md index 09e99f6..b69abe9 100644 --- a/Documentation/releases/coreboot-4.19-relnotes.md +++ b/Documentation/releases/coreboot-4.19-relnotes.md @@ -220,7 +220,7 @@ Significant Known and Open Issues --------------------------------- -Issues from the coreboot bugtracker: https://ticket.coreboot.org/ +Issues from the coreboot bugtracker: <https://ticket.coreboot.org/> ```{eval-rst} +-----+-----------------------------------------------------------------+ | # | Subject | diff --git a/Documentation/releases/coreboot-4.2-relnotes.md b/Documentation/releases/coreboot-4.2-relnotes.md index 08a0175..dfde115 100644 --- a/Documentation/releases/coreboot-4.2-relnotes.md +++ b/Documentation/releases/coreboot-4.2-relnotes.md @@ -12,7 +12,7 @@ helped shape this release. As with 4.1, the release tarballs are available at -http://www.coreboot.org/releases/. There's also a 4.2 tag and branch in +<http://www.coreboot.org/releases/>. There's also a 4.2 tag and branch in the git repository. This marks the first release that features a changelog comparing it to diff --git a/Documentation/releases/coreboot-4.20.1-relnotes.md b/Documentation/releases/coreboot-4.20.1-relnotes.md index 6f41100..d0c537d 100644 --- a/Documentation/releases/coreboot-4.20.1-relnotes.md +++ b/Documentation/releases/coreboot-4.20.1-relnotes.md @@ -62,11 +62,11 @@ transition per port. More details can be found in -https://web.archive.org/web/20230116084819/https://learn.microsoft.com/en-us/windows-hardware/drivers/bringup/usb-device-specific-method---dsm- +<https://web.archive.org/web/20230116084819/https://learn.microsoft.com/en-u…> The ACPI and USB driver of linux kernel need corresponding functions to support this feature. Please see -https://git.kernel.org/pub/scm/linux/kernel/git/mnyman/xhci.git/log/?h=port_check_acpi_dsm +<https://git.kernel.org/pub/scm/linux/kernel/git/mnyman/xhci.git/log/?h=port…> ### drivers/efi: Add EFI variable store option support @@ -229,7 +229,7 @@ Significant Known and Open Issues --------------------------------- -Issues from the coreboot bugtracker: https://ticket.coreboot.org/ +Issues from the coreboot bugtracker: <https://ticket.coreboot.org/> ```{eval-rst} +-----+-----------------------------------------------------------------+ | # | Subject | diff --git a/Documentation/releases/coreboot-4.21-relnotes.md b/Documentation/releases/coreboot-4.21-relnotes.md index 05d334f..661c019 100644 --- a/Documentation/releases/coreboot-4.21-relnotes.md +++ b/Documentation/releases/coreboot-4.21-relnotes.md @@ -19,7 +19,7 @@ repository was named ‘master’. In line with many other projects, coreboot has decided to switch away from this name and use the name ‘main’ instead. You can read about the initial reasoning on the SFC’s -website: https://sfconservancy.org/news/2020/jun/23/gitbranchname/ +website: <https://sfconservancy.org/news/2020/jun/23/gitbranchname/> At some point before the 4.22 release, coreboot will be switching from the master branch to the main branch. This shouldn’t be a difficult @@ -355,7 +355,7 @@ --------------------------------- -Issues from the coreboot bugtracker: https://ticket.coreboot.org/ +Issues from the coreboot bugtracker: <https://ticket.coreboot.org/> ```{eval-rst} +-----+-----------------------------------------------------------------+ | # | Subject | @@ -398,10 +398,10 @@ coreboot Links and Contact Information -------------------------------------- -* Main Web site: https://www.coreboot.org -* IRC: https://web.libera.chat/#coreboot -* Downloads: https://coreboot.org/downloads.html -* Source control: https://review.coreboot.org -* Documentation: https://doc.coreboot.org -* Issue tracker: https://ticket.coreboot.org/projects/coreboot -* Donations: https://coreboot.org/donate.html +* Main Web site: <https://www.coreboot.org> +* IRC: <https://web.libera.chat/#coreboot> +* Downloads: <https://coreboot.org/downloads.html> +* Source control: <https://review.coreboot.org> +* Documentation: <https://doc.coreboot.org> +* Issue tracker: <https://ticket.coreboot.org/projects/coreboot> +* Donations: <https://coreboot.org/donate.html> diff --git a/Documentation/releases/coreboot-4.22-relnotes.md b/Documentation/releases/coreboot-4.22-relnotes.md index 8d0cc7a..f5ca7e8 100644 --- a/Documentation/releases/coreboot-4.22-relnotes.md +++ b/Documentation/releases/coreboot-4.22-relnotes.md @@ -263,7 +263,7 @@ Significant Known and Open Issues --------------------------------- -Issues from the coreboot bugtracker: https://ticket.coreboot.org/ +Issues from the coreboot bugtracker: <https://ticket.coreboot.org/> ### Payload-specific issues @@ -341,9 +341,9 @@ coreboot Links and Contact Information -------------------------------------- -* Main Website: https://www.coreboot.org -* Downloads: https://coreboot.org/downloads.html -* Source control: https://review.coreboot.org -* Documentation: https://doc.coreboot.org -* Issue tracker: https://ticket.coreboot.org/projects/coreboot -* Donations: https://coreboot.org/donate.html +* Main Website: <https://www.coreboot.org> +* Downloads: <https://coreboot.org/downloads.html> +* Source control: <https://review.coreboot.org> +* Documentation: <https://doc.coreboot.org> +* Issue tracker: <https://ticket.coreboot.org/projects/coreboot> +* Donations: <https://coreboot.org/donate.html> diff --git a/Documentation/releases/coreboot-4.3-relnotes.md b/Documentation/releases/coreboot-4.3-relnotes.md index c0dda6e..d8e8f35 100644 --- a/Documentation/releases/coreboot-4.3-relnotes.md +++ b/Documentation/releases/coreboot-4.3-relnotes.md @@ -10,7 +10,7 @@ authors added a net total of 17500 lines to the source code. Thank you to all who contributed! -The release tarballs are available at http://www.coreboot.org/releases/. +The release tarballs are available at <http://www.coreboot.org/releases/>. There's also a 4.3 tag and branch in the git repository. Besides the usual addition of new mainboards (14) and chipsets diff --git a/Documentation/releases/coreboot-4.4-relnotes.md b/Documentation/releases/coreboot-4.4-relnotes.md index 2207c7f..ee3f8d4 100644 --- a/Documentation/releases/coreboot-4.4-relnotes.md +++ b/Documentation/releases/coreboot-4.4-relnotes.md @@ -5,7 +5,7 @@ fourth quarterly release. Since the last release, we've had 850 commits by 90 authors adding 59000 lines to the codebase. -The release tarballs are available at https://www.coreboot.org/releases/ +The release tarballs are available at <https://www.coreboot.org/releases/> There is a 4.4 tag and branch in the git repository. Log of commit 3141eac900 to commit 588ccaa9a7 diff --git a/Documentation/releases/coreboot-4.5-relnotes.md b/Documentation/releases/coreboot-4.5-relnotes.md index 12230b2..5b971a2 100644 --- a/Documentation/releases/coreboot-4.5-relnotes.md +++ b/Documentation/releases/coreboot-4.5-relnotes.md @@ -13,7 +13,7 @@ commits by 119 authors. The release tarballs and gpg signatures are available in the usual place -at https://www.coreboot.org/downloads +at <https://www.coreboot.org/downloads> There is a 4.5 tag in the git repository, and a branch will be created as needed. diff --git a/Documentation/releases/coreboot-4.6-relnotes.md b/Documentation/releases/coreboot-4.6-relnotes.md index 13af7e4..9f4d826 100644 --- a/Documentation/releases/coreboot-4.6-relnotes.md +++ b/Documentation/releases/coreboot-4.6-relnotes.md @@ -8,7 +8,7 @@ Since the last release in October 2016, the coreboot project had 1708 commits by 121 authors. The release tarballs and gpg signatures are -available in the usual place at https://www.coreboot.org/downloads +available in the usual place at <https://www.coreboot.org/downloads> There is a pgp signed 4.6 tag in the git repository, and a branch will be created as needed. @@ -22,7 +22,7 @@ console now persists between reboots and is able to be used on some platforms via late init. Also there is a new Linux kernel driver which removes the need for the old cbmem tool to read from the cbmem area. You -can find the patch here https://patchwork.kernel.org/patch/9641997/ and +can find the patch here <https://patchwork.kernel.org/patch/9641997/> and it can be enabled via GOOGLE_MEMCONSOLE_COREBOOT kconfig option in your kernel - Note that this name may change going forward. @@ -51,7 +51,7 @@ cbui and is based on the nuklear graphics library including keyboard and mouse support. The cbui payload is currently expected to be merged into the main coreboot tree before the next release. The upstream repository -is here: https://github.com/siro20/coreboot/tree/cbui/payloads/cbui +is here: <https://github.com/siro20/coreboot/tree/cbui/payloads/cbui> ### UEFI support: A long road to go @@ -65,7 +65,7 @@ We started to make progress with the integration into our sources and the hope is that by the end of the summer, we finally support the edk2 payload out-of-the- box. See the current patch state at -http://review.coreboot.org/#/c/15057/ +<http://review.coreboot.org/#/c/15057/> ### Fighting blobs and proprietary HW components @@ -76,7 +76,7 @@ run in a functional error state and reduce it from 1.5/5MB to 80KB. It's not perfect but it works from Nehalem up to Skylake based Intel systems. The tool is now integrated into the coreboot build system. The upstream -repository is https://github.com/corna/me_cleaner +repository is <https://github.com/corna/me_cleaner> Another ongoing improvement is the new utility blobtool. It is currently used for generating the flash descriptor and GbE configuration data on diff --git a/Documentation/releases/coreboot-4.8.1-relnotes.md b/Documentation/releases/coreboot-4.8.1-relnotes.md index f96e2cc..05fb590 100644 --- a/Documentation/releases/coreboot-4.8.1-relnotes.md +++ b/Documentation/releases/coreboot-4.8.1-relnotes.md @@ -63,7 +63,7 @@ * qemu-i440fx: Fix ACPI checksum corruption * intelmetool: Fix crash, support ME11+ platforms, fix bootguard detection -* tpm: Fix TPM software stack vulnerability in tlcl_read() for TPM 1.2 (https://github.com/nccgroup/TPMGenie) +* tpm: Fix TPM software stack vulnerability in tlcl_read() for TPM 1.2 ()<https://github.com/nccgroup/TPMGenie>) * asrock/b75pro3-m: Fixed HDMI * Intel/ibexpeak: Fix missing ACPI PIRQ entries * Intel/nehalem: Fix freeze during chipset lockdown @@ -86,7 +86,7 @@ Documentation ------------- * Switch from Hugo to Sphinx for the Documentation -* Working on markdown documentation for https://doc.coreboot.org +* Working on markdown documentation for <https://doc.coreboot.org> Added 17 mainboards ------------------- diff --git a/Documentation/soc/intel/xeon_sp/community_preview_guide.md b/Documentation/soc/intel/xeon_sp/community_preview_guide.md index 96ff86f..9e01d52 100644 --- a/Documentation/soc/intel/xeon_sp/community_preview_guide.md +++ b/Documentation/soc/intel/xeon_sp/community_preview_guide.md @@ -4,10 +4,10 @@ ## Background Xeon 6 basic boot supports are initially upstreamed at -https://review.coreboot.org/q/topic:%22Xeon6-Basic-Boot%22. +<https://review.coreboot.org/q/topic:%22Xeon6-Basic-Boot%22>. Full feature supports are previewed at -https://review.coreboot.org/admin/repos/intel-dev-pub,general +<https://review.coreboot.org/admin/repos/intel-dev-pub,general> The supported platform status are as below, diff --git a/Documentation/technotes/2015-11-rebuilding-coreboot-image-generation.md b/Documentation/technotes/2015-11-rebuilding-coreboot-image-generation.md index a3f81bf..7abfab1 100644 --- a/Documentation/technotes/2015-11-rebuilding-coreboot-image-generation.md +++ b/Documentation/technotes/2015-11-rebuilding-coreboot-image-generation.md @@ -136,8 +136,8 @@ By having a global picture of the final image’s requirements, we can also avoid issues where files added earlier may prevent later additions that have stricter constraints - without resorting to hacks like -https://chromium-review.googlesource.com/289491 that reorder the file addition -manually. +<https://chromium-review.googlesource.com/289491> that reorder the file +addition manually. Example ------- diff --git a/Documentation/technotes/console.md b/Documentation/technotes/console.md index a125728..363dfa5 100644 --- a/Documentation/technotes/console.md +++ b/Documentation/technotes/console.md @@ -1,7 +1,7 @@ # coreboot Console coreboot supports multiple ways to access its console. -https://www.coreboot.org/Console_and_outputs +<https://www.coreboot.org/Console_and_outputs> ## SMBus Console -- To view, visit https://review.coreboot.org/c/coreboot/+/85433?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I234d395cddd58f3d3dfb4b4ddccb6efc70d4dd9e Gerrit-Change-Number: 85433 Gerrit-PatchSet: 2 Gerrit-Owner: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

1 0

[XS] Change in coreboot[main]: soc/intel/pantherlake: Keep image clock configuration enable
by Kapil Porwal (Code Review) 14 Dec '24

14 Dec '24

Attention is currently required from: Pranava Y N, Subrata Banik. Kapil Porwal has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/85588?usp=email ) Change subject: soc/intel/pantherlake: Keep image clock configuration enable ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85588?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ieb022e6dc0b64106ff30f56cd17f9f219276785f Gerrit-Change-Number: 85588 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Sat, 14 Dec 2024 06:17:28 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

1 0

[S] Change in coreboot[main]: mb/google/nissa/var/rull: For probe, change unprovisioned to unknown
by Kapil Porwal (Code Review) 14 Dec '24

14 Dec '24

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, Nick Vaccaro, Rui Zhou. Kapil Porwal has posted comments on this change by Rui Zhou. ( https://review.coreboot.org/c/coreboot/+/85566?usp=email ) Change subject: mb/google/nissa/var/rull: For probe, change unprovisioned to unknown ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85566?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id2415d18c635dece94500f511bccdc9d2b69d1b4 Gerrit-Change-Number: 85566 Gerrit-PatchSet: 3 Gerrit-Owner: Rui Zhou <zhourui(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Kun Liu <liukun11(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Rui Zhou <zhourui(a)huaqin.corp-partner.google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Sat, 14 Dec 2024 05:57:33 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

1 0

[M] Change in coreboot[main]: mb/trulo/var/uldrenite: Configuration Network and Audio
by Kapil Porwal (Code Review) 14 Dec '24

14 Dec '24

Attention is currently required from: Dinesh Gehlot, Dtrain Hsu, Eric Lai, Jayvik Desai, John Su, Nick Vaccaro, Subrata Banik. Kapil Porwal has posted comments on this change by John Su. ( https://review.coreboot.org/c/coreboot/+/85583?usp=email ) Change subject: mb/trulo/var/uldrenite: Configuration Network and Audio ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/85583/comment/61f397dc_c1fa92bd?us… : PS1, Line 9: Configuration WLAN, WWAN and audio `Enable CNVi WiFI and BT` -- To view, visit https://review.coreboot.org/c/coreboot/+/85583?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2fd292550700817f15813dabfbaf9ccab3a907d8 Gerrit-Change-Number: 85583 Gerrit-PatchSet: 1 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Sat, 14 Dec 2024 04:32:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

1 0

[M] Change in coreboot[main]: mb/trulo/var/uldrenite: Configuration Network and Audio
by Kapil Porwal (Code Review) 14 Dec '24

14 Dec '24

Attention is currently required from: Dinesh Gehlot, Dtrain Hsu, Eric Lai, Jayvik Desai, John Su, Nick Vaccaro, Subrata Banik. Kapil Porwal has posted comments on this change by John Su. ( https://review.coreboot.org/c/coreboot/+/85583?usp=email ) Change subject: mb/trulo/var/uldrenite: Configuration Network and Audio ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85583?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2fd292550700817f15813dabfbaf9ccab3a907d8 Gerrit-Change-Number: 85583 Gerrit-PatchSet: 1 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Sat, 14 Dec 2024 04:30:49 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit December 2024