coreboot-gerrit December 2024

coreboot-gerrit@coreboot.org

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[M] Change in coreboot[main]: soc/intel/xeon_sp: Use \_SB.POSC on all platforms
by Patrick Rudolph (Code Review) 14 Dec '24

14 Dec '24

Attention is currently required from: Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Shuo Liu, Tim Chu. Hello Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Shuo Liu, Tim Chu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85559?usp=email to look at the new patch set (#6). The following approvals got outdated and were removed: Code-Review+1 by Shuo Liu, Verified+1 by build bot (Jenkins) Change subject: soc/intel/xeon_sp: Use \_SB.POSC on all platforms ...................................................................... soc/intel/xeon_sp: Use \_SB.POSC on all platforms Reduce ACPI code size by using the existing \_SB.POSC instead of duplicating the method in every PCI/CXL host bridge. TEST: On ocp/tiogapass the OS still gets granted the PCIe capabilities as previously through _OSC. Reduces DSDT size by 1366 bytes. Change-Id: I2f25ffbde9b83d286c568202fcffb75ffb07286c Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/soc/intel/xeon_sp/14nm/acpi/iiostack.asl M src/soc/intel/xeon_sp/spr/acpi/cxl_resource.asl M src/soc/intel/xeon_sp/spr/acpi/pci_resource.asl M src/soc/intel/xeon_sp/spr/acpi/uncore.asl 4 files changed, 21 insertions(+), 139 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/85559/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/85559?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2f25ffbde9b83d286c568202fcffb75ffb07286c Gerrit-Change-Number: 85559 Gerrit-PatchSet: 6 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com>

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[XS] Change in coreboot[main]: soc/intel/xeon_sp: Enable IDT_IN_EVERY_STAGE
by Shuo Liu (Code Review) 14 Dec '24

14 Dec '24

Attention is currently required from: Christian Walter, Jincheng Li, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Ray Ni, Tim Chu, yuchi.chen(a)intel.com. Shuo Liu has posted comments on this change by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/85569?usp=email ) The change is no longer submittable: All-Comments-Resolved is unsatisfied now. Change subject: soc/intel/xeon_sp: Enable IDT_IN_EVERY_STAGE ...................................................................... Patch Set 3: Code-Review+2 (1 comment) Patchset: PS3: We need to wait till https://review.coreboot.org/c/coreboot/+/85568/3?usp=related-change merged. -- To view, visit https://review.coreboot.org/c/coreboot/+/85569?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8a9f12b9ae041ce47c14f2ef7f09b029d408260e Gerrit-Change-Number: 85569 Gerrit-PatchSet: 3 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Ray Ni <ray.ni(a)intel.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: yuchi.chen(a)intel.com Gerrit-Attention: Ray Ni <ray.ni(a)intel.com> Gerrit-Attention: yuchi.chen(a)intel.com Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Sat, 14 Dec 2024 10:03:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: soc/intel/xeon_sp: Enable IDT_IN_EVERY_STAGE
by Shuo Liu (Code Review) 14 Dec '24

14 Dec '24

Attention is currently required from: Christian Walter, Jincheng Li, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Ray Ni, Tim Chu, yuchi.chen(a)intel.com. Shuo Liu has posted comments on this change by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/85569?usp=email ) Change subject: soc/intel/xeon_sp: Enable IDT_IN_EVERY_STAGE ...................................................................... Patch Set 1: Code-Review+2 Copied votes on follow-up patch sets have been updated: * Code-Review+2 has been copied to patch set 2, 3 (copy condition: "changekind:NO_CHANGE OR changekind:NO_CODE_CHANGE OR changekind:TRIVIAL_REBASE OR is:MIN"). -- To view, visit https://review.coreboot.org/c/coreboot/+/85569?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8a9f12b9ae041ce47c14f2ef7f09b029d408260e Gerrit-Change-Number: 85569 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Ray Ni <ray.ni(a)intel.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: yuchi.chen(a)intel.com Gerrit-Attention: Ray Ni <ray.ni(a)intel.com> Gerrit-Attention: yuchi.chen(a)intel.com Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Sat, 14 Dec 2024 10:02:59 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: cpu/intel/car/romstage: Fix false-positive stack corruption
by Shuo Liu (Code Review) 14 Dec '24

14 Dec '24

Attention is currently required from: Christian Walter, Jincheng Li, Jérémy Compostella, Patrick Rudolph, Subrata Banik, Uwe Poeche, yuchi.chen(a)intel.com. Shuo Liu has posted comments on this change by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/85568?usp=email ) Change subject: cpu/intel/car/romstage: Fix false-positive stack corruption ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85568?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7ebf0a5e8eaad49af77ab4d5f6b58fc849013b14 Gerrit-Change-Number: 85568 Gerrit-PatchSet: 3 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Uwe Poeche <uwe.poeche(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: siemens-bot Gerrit-Reviewer: yuchi.chen(a)intel.com Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-CC: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: yuchi.chen(a)intel.com Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Uwe Poeche <uwe.poeche(a)siemens.com> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Comment-Date: Sat, 14 Dec 2024 09:56:03 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: soc/intel/xeon_sp: Move DFX and UNCORE PCI drivers
by Patrick Rudolph (Code Review) 14 Dec '24

14 Dec '24

Attention is currently required from: Alicja Michalska, Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Tim Chu. Patrick Rudolph has posted comments on this change by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/85560?usp=email ) Change subject: soc/intel/xeon_sp: Move DFX and UNCORE PCI drivers ...................................................................... Patch Set 5: (1 comment) Patchset: PS5: > Wouldn't it make more sense to add it to existing `src/soc/intel/xeon_sp/skx` directory? No, as it's used by skx and cpx. -- To view, visit https://review.coreboot.org/c/coreboot/+/85560?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie3d6cc11806669b8adf5041367cfbe36605612b1 Gerrit-Change-Number: 85560 Gerrit-PatchSet: 5 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Alicja Michalska <ahplka19(a)gmail.com> Gerrit-Attention: Alicja Michalska <ahplka19(a)gmail.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Sat, 14 Dec 2024 09:54:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Alicja Michalska <ahplka19(a)gmail.com>

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[S] Change in coreboot[main]: cpu/intel/car/romstage: Fix false-positive stack corruption
by Shuo Liu (Code Review) 14 Dec '24

14 Dec '24

Attention is currently required from: Christian Walter, Jincheng Li, Jérémy Compostella, Patrick Rudolph, Subrata Banik, Uwe Poeche, yuchi.chen(a)intel.com. Shuo Liu has posted comments on this change by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/85568?usp=email ) Change subject: cpu/intel/car/romstage: Fix false-positive stack corruption ...................................................................... Patch Set 2: Code-Review+2 (1 comment) File src/cpu/intel/car/romstage.c: https://review.coreboot.org/c/coreboot/+/85568/comment/75df61f7_982f3da3?us… : PS1, Line 44: > Added a comment. Thanks! -- To view, visit https://review.coreboot.org/c/coreboot/+/85568?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7ebf0a5e8eaad49af77ab4d5f6b58fc849013b14 Gerrit-Change-Number: 85568 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Uwe Poeche <uwe.poeche(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: siemens-bot Gerrit-Reviewer: yuchi.chen(a)intel.com Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-CC: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: yuchi.chen(a)intel.com Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Uwe Poeche <uwe.poeche(a)siemens.com> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Comment-Date: Sat, 14 Dec 2024 09:54:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Patrick Rudolph <patrick.rudolph(a)9elements.com> Comment-In-Reply-To: Shuo Liu <shuo.liu(a)intel.com>

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[S] Change in coreboot[main]: cpu/intel/car/romstage: Fix false-positive stack corruption
by Patrick Rudolph (Code Review) 14 Dec '24

14 Dec '24

Attention is currently required from: Christian Walter, Jincheng Li, Jérémy Compostella, Shuo Liu, Subrata Banik, Uwe Poeche, yuchi.chen(a)intel.com. Hello Christian Walter, Jincheng Li, Jérémy Compostella, Shuo Liu, Subrata Banik, Uwe Poeche, build bot (Jenkins), siemens-bot, yuchi.chen(a)intel.com, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85568?usp=email to look at the new patch set (#3). Change subject: cpu/intel/car/romstage: Fix false-positive stack corruption ...................................................................... cpu/intel/car/romstage: Fix false-positive stack corruption Fix regression introduced in commit 03518727313119a8c7a273eb745663c99f8e4d22 ("arch/x86: Add breakpoint to stack canary"). romstage_main writes to the stack-canary, but since that's expected temporarily disable the breakpoint. This only caused a warning on platforms that do select IDT_IN_EVERY_STAGE, since those install the stack canary breakpoint. TEST: No more exceptions are printed in romstage when IDT_IN_EVERY_STAGE is enabled. Change-Id: I7ebf0a5e8eaad49af77ab4d5f6b58fc849013b14 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/cpu/intel/car/romstage.c 1 file changed, 18 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/85568/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/85568?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7ebf0a5e8eaad49af77ab4d5f6b58fc849013b14 Gerrit-Change-Number: 85568 Gerrit-PatchSet: 3 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Uwe Poeche <uwe.poeche(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: siemens-bot Gerrit-Reviewer: yuchi.chen(a)intel.com Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-CC: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: yuchi.chen(a)intel.com Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Uwe Poeche <uwe.poeche(a)siemens.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com>

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[S] Change in coreboot[main]: cpu/intel/car/romstage: Fix false-positive stack corruption
by Patrick Rudolph (Code Review) 14 Dec '24

14 Dec '24

Attention is currently required from: Christian Walter, Jincheng Li, Jérémy Compostella, Shuo Liu, Subrata Banik, Uwe Poeche, yuchi.chen(a)intel.com. Patrick Rudolph has posted comments on this change by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/85568?usp=email ) Change subject: cpu/intel/car/romstage: Fix false-positive stack corruption ...................................................................... Patch Set 2: (1 comment) File src/cpu/intel/car/romstage.c: https://review.coreboot.org/c/coreboot/+/85568/comment/d2e250c9_4e303b6d?us… : PS1, Line 44: > Unblock the merge so that the regression could be fixed soon. Added a comment. -- To view, visit https://review.coreboot.org/c/coreboot/+/85568?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7ebf0a5e8eaad49af77ab4d5f6b58fc849013b14 Gerrit-Change-Number: 85568 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Uwe Poeche <uwe.poeche(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: siemens-bot Gerrit-Reviewer: yuchi.chen(a)intel.com Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-CC: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: yuchi.chen(a)intel.com Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Uwe Poeche <uwe.poeche(a)siemens.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Comment-Date: Sat, 14 Dec 2024 09:52:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Shuo Liu <shuo.liu(a)intel.com>

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[XS] Change in coreboot[main]: arch/x86: Disable DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES
by Patrick Rudolph (Code Review) 14 Dec '24

14 Dec '24

Attention is currently required from: Jérémy Compostella. Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85594?usp=email ) Change subject: arch/x86: Disable DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES ...................................................................... arch/x86: Disable DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES Disable the debug code as there were unexplainable stack corruptions detected on some platforms. No problems were observed on: - QEMU - Xeon-SP Change-Id: I1f1b9f01af7fbb0c19becf6ea53d436898584c5e Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/arch/x86/Kconfig 1 file changed, 4 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/85594/1 diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig index 2077405..7ef1a6d 100644 --- a/src/arch/x86/Kconfig +++ b/src/arch/x86/Kconfig @@ -377,8 +377,11 @@ config DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES bool - default y + default n depends on DEBUG_STACK_OVERFLOW_BREAKPOINTS && DEBUG_HW_BREAKPOINTS_IN_ALL_STAGES + help + Disabled as false-positive stack corruptions where observed on some platforms. + TODO: Investigate those reported errors before defaulting to yes. # Some EC need an "EC firmware pointer" (a data structure hinting the address # of its firmware blobs) being put at a fixed position. Its space -- To view, visit https://review.coreboot.org/c/coreboot/+/85594?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1f1b9f01af7fbb0c19becf6ea53d436898584c5e Gerrit-Change-Number: 85594 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com>

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[XS] Change in coreboot[main]: cpu/qemu: Enable IDT_IN_EVERY_STAGE
by Patrick Rudolph (Code Review) 14 Dec '24

14 Dec '24

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85593?usp=email ) Change subject: cpu/qemu: Enable IDT_IN_EVERY_STAGE ...................................................................... cpu/qemu: Enable IDT_IN_EVERY_STAGE Enable IDT_IN_EVERY_STAGE in qemu to easily debug HW breakpoints. TEST: Can use breakpoints in pre RAM stages to debug invalid memory accesses on QEMU. Change-Id: If4a386d1adc788ff717899027881590b7c8b3369 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/cpu/qemu-x86/Kconfig 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/85593/1 diff --git a/src/cpu/qemu-x86/Kconfig b/src/cpu/qemu-x86/Kconfig index e1469d6..f564d70 100644 --- a/src/cpu/qemu-x86/Kconfig +++ b/src/cpu/qemu-x86/Kconfig @@ -8,6 +8,7 @@ select TSC_MONOTONIC_TIMER select UNKNOWN_TSC_RATE select NEED_SMALL_2MB_PAGE_TABLES # QEMU doesn't support 1GB pages + select IDT_IN_EVERY_STAGE if CPU_QEMU_X86 -- To view, visit https://review.coreboot.org/c/coreboot/+/85593?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If4a386d1adc788ff717899027881590b7c8b3369 Gerrit-Change-Number: 85593 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com>

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coreboot-gerrit December 2024