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Change subject: mb/google/rauru: Add SD card configurations
......................................................................
Patch Set 9:
(5 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/85565/comment/eabd2d13_982980aa?us… :
PS2, Line 12: TEST=Build pass.
> Were you able to run-time test it?
Done
https://review.coreboot.org/c/coreboot/+/85565/comment/8b5c90d1_420315e3?us… :
PS2, Line 16: Andy-ld
> Is -ld part of the name?
yes
https://review.coreboot.org/c/coreboot/+/85565/comment/d2d1fc30_77ea7cf0?us… :
PS2, Line 17:
> Jarried, please add your Signed-off-by line, as you are in the author field.
I think the current Signed-off-by line is fine with me because the main effort is still on Andy. Thanks.
Commit Message:
https://review.coreboot.org/c/coreboot/+/85565/comment/c490d020_d5fd5401?us… :
PS7, Line 16: BUG=b:317009620
> Move `BUG` to the top of `TEST`.
Done
File src/mainboard/google/rauru/mainboard.c:
https://review.coreboot.org/c/coreboot/+/85565/comment/0f8c925f_95626b2f?us… :
PS2, Line 14: #include <soc/msdc.h>
> sort
Done
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Change subject: soc/mediatek/mt8196: Add MMinfra driver support
......................................................................
Patch Set 25:
(1 comment)
File src/soc/mediatek/mt8196/mminfra.c:
https://review.coreboot.org/c/coreboot/+/85188/comment/dfdfc5ea_2226ff49?us… :
PS25, Line 68: write32p(MMPC_PM_BOOT_UP_PWR_CON,
: read32p(MMPC_PM_BOOT_UP_PWR_CON) | MM_INFRA0_PM_BOOT_UP | MM_INFRA1_PM_BOOT_UP);
setbits32p
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Change subject: mb/google/rauru: Add SD card configurations
......................................................................
mb/google/rauru: Add SD card configurations
Rauru reference design has SD card interfaces, so we configure it in
mainboard_init() in ramstage.
BUG=b:317009620
TEST=Build pass. Check storage in depthcharge.
firmware-shell: storage init
* 0: UFS LUN 0
1: removable mtk_mmc
Change-Id: Ia9f12df85c5f9f9d134990edcf82bf0df9ea995d
Signed-off-by: Andy-ld Lu <andy-ld.lu(a)mediatek.corp-partner.google.com>
---
M src/mainboard/google/rauru/Kconfig
M src/mainboard/google/rauru/mainboard.c
2 files changed, 6 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/85565/9
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Change subject: mb/google/rauru: Add SD card configurations
......................................................................
mb/google/rauru: Add SD card configurations
Rauru reference design has SD card interfaces, so we configure it in
mainboard_init() in ramstage.
TEST=Build pass. Check storage in depthcharge.
firmware-shell: storage init
* 0: UFS LUN 0
1: removable mtk_mmc
BUG=b:317009620
Change-Id: Ia9f12df85c5f9f9d134990edcf82bf0df9ea995d
Signed-off-by: Andy-ld Lu <andy-ld.lu(a)mediatek.corp-partner.google.com>
---
M src/mainboard/google/rauru/Kconfig
M src/mainboard/google/rauru/mainboard.c
2 files changed, 6 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/85565/8
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Change subject: mb/google/rauru: Add SD card configurations
......................................................................
Patch Set 7:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/85565/comment/9be31bb3_ddee3144?us… :
PS7, Line 16: BUG=b:317009620
Move `BUG` to the top of `TEST`.
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Change subject: arch/x86: Disable DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/85594/comment/09df437e_20ad57dd?us… :
PS2, Line 14: - Xeon-SP
Suppose for Xeon-SP, the issue is already fixed by https://review.coreboot.org/c/coreboot/+/85568?
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Change subject: soc/intel/xeon_sp/spr/acpi: Fix regression
......................................................................
Patch Set 4: Code-Review+2
(1 comment)
File src/soc/intel/xeon_sp/spr/acpi/uncore.asl:
https://review.coreboot.org/c/coreboot/+/85562/comment/57849251_5a80e168?us… :
PS3, Line 15: #define SOCKET_NAME 0
> I had problems using the preprocessor. It didn't evaluate the expression <<.
I see, can we just add a comment in the file as a reminder for the readers?
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Change subject: soc/mediatek/mt8196: Add MMinfra driver support
......................................................................
Patch Set 25:
(1 comment)
File src/soc/mediatek/mt8196/mminfra.c:
https://review.coreboot.org/c/coreboot/+/85188/comment/d607031c_76eb1699?us… :
PS24, Line 38: read32p
> This is definitely not correct. […]
Done
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Change subject: mb/google/rauru: Add SD card configurations
......................................................................
mb/google/rauru: Add SD card configurations
Rauru reference design has SD card interfaces, so we configure it in
mainboard_init() in ramstage.
TEST=Build pass. Check storage in depthcharge.
firmware-shell: storage init
* 0: UFS LUN 0
1: removable mtk_mmc
BUG=b:317009620
Change-Id: Ia9f12df85c5f9f9d134990edcf82bf0df9ea995d
Signed-off-by: Andy-ld Lu <andy-ld.lu(a)mediatek.corp-partner.google.com>
---
M src/mainboard/google/rauru/Kconfig
M src/mainboard/google/rauru/mainboard.c
2 files changed, 6 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/85565/7
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