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Change subject: soc/mediatek/mt8196: Add MMinfra driver support
......................................................................
soc/mediatek/mt8196: Add MMinfra driver support
MMinfra is the Multimedia Infrastructure. All the Multimedia modules
depend on it. This file adds some initial settings for MMinfra.
Test=Build pass
BUG=b:317009620
Signed-off-by: Xueqi Zhang <xueqi.zhang(a)mediatek.corp-partner.google.com>
Change-Id: Ie86f141a0957fc60d4973875c0dbcbdb57be1f75
---
M src/soc/mediatek/mt8196/Makefile.mk
M src/soc/mediatek/mt8196/bootblock.c
M src/soc/mediatek/mt8196/include/soc/addressmap.h
A src/soc/mediatek/mt8196/include/soc/mminfra.h
A src/soc/mediatek/mt8196/mminfra.c
5 files changed, 167 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/85188/25
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Change subject: soc/intel/xeon_sp: Guard function prototypes
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/85595/comment/ec09d830_92c38abc?us… :
PS1, Line 10: code. The defines will be used in the next commit.
Maybe to mention 'ASL' code to be more specific?
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Change subject: soc/intel/xeon_sp: Guard function prototypes
......................................................................
Patch Set 1: Code-Review+2
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Change subject: soc/mediatek/mt8196: Add MMinfra driver support
......................................................................
Patch Set 24:
(1 comment)
File src/soc/mediatek/mt8196/mminfra.c:
https://review.coreboot.org/c/coreboot/+/85188/comment/904ea027_2d4863fd?us… :
PS24, Line 38: read32p
This is definitely not correct. Just pass MMINFRA_MM0_GALS_PROT_TX_EN and MMINFRA_MM0_GALS_PROT_TX_RDY.
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Change subject: ec/google/chromeec: Publish LPC GMR address range via CREC _CRS
......................................................................
ec/google/chromeec: Publish LPC GMR address range via CREC _CRS
This change allows the Chrome EC (CREC) ACPI device to publish the LPC
Generic Memory Range (GMR) address range using the _CRS method.
The Google CREC driver can now parse this information to determine the
MMIO address map, enabling access to the LPC GMR register space.
This addresses the issue where the CREC driver was unable to
automatically determine the LPC GMR base address.
Change-Id: Ib3ea3e2a482f9eceaa8c15e38b7e708b156bc978
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
---
M src/ec/google/chromeec/Kconfig
M src/ec/google/chromeec/acpi/cros_ec.asl
2 files changed, 35 insertions(+), 15 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/85603/2
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Change subject: soc/mediatek/mt8196: Add SD card configurations
......................................................................
soc/mediatek/mt8196: Add SD card configurations
Rauru reference design has SD card interfaces, so we have to configure
it in ramstage.
Implement msdc.c (memory and SD Card controller) to place the SD card
drivers.
This implementation is based on chapter 10.3 in MT8196 Functional
Specification.
TEST=Build pass
BUG=b:317009620
Change-Id: Ibb6a075d0f1b5a647e93a58b3ea1029b7676c765
Signed-off-by: Andy-ld Lu <andy-ld.lu(a)mediatek.corp-partner.google.com>
---
M src/soc/mediatek/mt8196/Makefile.mk
A src/soc/mediatek/mt8196/msdc.c
2 files changed, 37 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/85564/6
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Change subject: soc/mediatek/mt8196: Add MMinfra driver support
......................................................................
soc/mediatek/mt8196: Add MMinfra driver support
MMinfra is the Multimedia Infrastructure. All the Multimedia modules
depend on it. This file adds some initial settings for MMinfra.
Test=Build pass
BUG=b:317009620
Signed-off-by: Xueqi Zhang <xueqi.zhang(a)mediatek.corp-partner.google.com>
Change-Id: Ie86f141a0957fc60d4973875c0dbcbdb57be1f75
---
M src/soc/mediatek/mt8196/Makefile.mk
M src/soc/mediatek/mt8196/bootblock.c
M src/soc/mediatek/mt8196/include/soc/addressmap.h
A src/soc/mediatek/mt8196/include/soc/mminfra.h
A src/soc/mediatek/mt8196/mminfra.c
5 files changed, 167 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/85188/24
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Change subject: soc/intel/xeon_sp/acpi: Convert spaces to tabs
......................................................................
Patch Set 6:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/85558/comment/57d1dae6_09de01be?us… :
PS2, Line 7: Whitespace fixes
> Use a statement: […]
Done
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