coreboot-gerrit December 2024

coreboot-gerrit@coreboot.org

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[M] Change in coreboot[main]: soc/mediatek/mt8196: Add MMinfra driver support
by Yu-Ping Wu (Code Review) 16 Dec '24

16 Dec '24

Attention is currently required from: Hung-Te Lin, Jarried Lin, Paul Menzel. Yu-Ping Wu has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85188?usp=email ) Change subject: soc/mediatek/mt8196: Add MMinfra driver support ...................................................................... Patch Set 26: (2 comments) File src/soc/mediatek/mt8196/include/soc/addressmap.h: https://review.coreboot.org/c/coreboot/+/85188/comment/6ec67f13_96392946?us… : PS23, Line 146: VLPCFG_BASE Upload a separate patch to rename this to `VLP_CFG_BASE`. https://review.coreboot.org/c/coreboot/+/85188/comment/18c4aeb5_e4e90cfe?us… : PS23, Line 175: tabs -- To view, visit https://review.coreboot.org/c/coreboot/+/85188?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie86f141a0957fc60d4973875c0dbcbdb57be1f75 Gerrit-Change-Number: 85188 Gerrit-PatchSet: 26 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Mon, 16 Dec 2024 09:36:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[L] Change in coreboot[main]: soc/intel/xeon_sp: Merge SKX and CPX
by Angel Pons (Code Review) 16 Dec '24

16 Dec '24

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[L] Change in coreboot[main]: soc/intel/xeon_sp: Merge SKX and CPX
by Angel Pons (Code Review) 16 Dec '24

16 Dec '24

Attention is currently required from: Arthur Heymans, Christian Walter, Johnny Lin, Jonathan Zhang, Morgan Jang, Patrick Rudolph, Tim Chu. Angel Pons has posted comments on this change by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/85557?usp=email ) Change subject: soc/intel/xeon_sp: Merge SKX and CPX ...................................................................... Patch Set 5: Code-Review+1 (4 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/85557/comment/c4393098_cfee49da?us… : PS5, Line 10: - Create a new 14nm folder > There are '(xx)nm - old' and 'intel(x) - new' for process namings which is confusing. […] Is there an Intel name for the "Xeon-SP SPR and CPX" group? File src/soc/intel/xeon_sp/14nm/Kconfig: https://review.coreboot.org/c/coreboot/+/85557/comment/601db22f_ab6500bc?us… : PS5, Line 9: Intel 14nm SoC (CPUID 506fx and CPUID 5065x) ```suggestion Intel Xeon-SP 14nm SoC (CPUID 506fx and CPUID 5065x) ``` File src/soc/intel/xeon_sp/14nm/cpu.c: https://review.coreboot.org/c/coreboot/+/85557/comment/946d8768_a99564bd?us… : PS5, Line 86: assert(chip_config); Not sure if losing this is important File src/soc/intel/xeon_sp/cpx/Kconfig: https://review.coreboot.org/c/coreboot/+/85557/comment/ce43f2e7_24c2ee69?us… : PS5, Line 5: select SOC_INTEL_XEON_SP_14NM > Maybe we can have a SOC_INTEL_XEON_SP_GEN3 but select the same kconfigs as SOC_INTEL_XEON_SP_GEN1 I don't know what GEN1 and GEN3 correspond to, SKX and CPX respectively? -- To view, visit https://review.coreboot.org/c/coreboot/+/85557?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I915d502efc36b299e089158c60e81822dfa2b333 Gerrit-Change-Number: 85557 Gerrit-PatchSet: 5 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Morgan Jang <Morgan_Jang(a)wiwynn.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Morgan Jang <Morgan_Jang(a)wiwynn.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Mon, 16 Dec 2024 09:31:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Shuo Liu <shuo.liu(a)intel.com>

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[M] Change in coreboot[main]: soc/intel/xeon_sp: Use \_SB.POSC on all platforms
by Patrick Rudolph (Code Review) 16 Dec '24

16 Dec '24

Attention is currently required from: Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Tim Chu. Patrick Rudolph has posted comments on this change by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/85559?usp=email ) Change subject: soc/intel/xeon_sp: Use \_SB.POSC on all platforms ...................................................................... Patch Set 7: (1 comment) Patchset: PS6: > Will test on SPR as well. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/85559?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2f25ffbde9b83d286c568202fcffb75ffb07286c Gerrit-Change-Number: 85559 Gerrit-PatchSet: 7 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Mon, 16 Dec 2024 09:30:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Rudolph <patrick.rudolph(a)9elements.com>

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[S] Change in coreboot[main]: soc/mediatek/mt8196: Add SD card configurations
by Yu-Ping Wu (Code Review) 16 Dec '24

16 Dec '24

Attention is currently required from: Hung-Te Lin, Jarried Lin. Yu-Ping Wu has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85564?usp=email ) Change subject: soc/mediatek/mt8196: Add SD card configurations ...................................................................... Patch Set 8: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85564?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibb6a075d0f1b5a647e93a58b3ea1029b7676c765 Gerrit-Change-Number: 85564 Gerrit-PatchSet: 8 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Mon, 16 Dec 2024 09:26:51 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: cpu/intel/car/romstage: Fix false-positive stack corruption
by Angel Pons (Code Review) 16 Dec '24

16 Dec '24

Attention is currently required from: Christian Walter, Jincheng Li, Jérémy Compostella, Patrick Rudolph, Subrata Banik, Uwe Poeche, yuchi.chen(a)intel.com. Angel Pons has posted comments on this change by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/85568?usp=email ) The change is no longer submittable: All-Comments-Resolved is unsatisfied now. Change subject: cpu/intel/car/romstage: Fix false-positive stack corruption ...................................................................... Patch Set 3: Code-Review+2 (3 comments) File src/cpu/intel/car/romstage.c: https://review.coreboot.org/c/coreboot/+/85568/comment/5c8badf4_0a2a553a?us… : PS3, Line 45: behviour typo: ```suggestion * (and thus hard to debug) behaviour. ``` https://review.coreboot.org/c/coreboot/+/85568/comment/da8f0a6d_40f8b5b3?us… : PS3, Line 47: serve typo? ```suggestion * severe and allowed romstage to run. It's useful to detect problems when ``` https://review.coreboot.org/c/coreboot/+/85568/comment/92343a72_e78ada0a?us… : PS3, Line 50: * When HW breakpoints are used and enabled the stack canary breakpoint will : * report the instruction pointer immediately and thus gives hint which function : * does use too much stack. FSP might disable HW breakpoints though. nit: some grammar fixes and a bit of rewording ```suggestion * When HW breakpoints are used and enabled, the stack canary breakpoint will * reports the instruction pointer immediately, which can hint at which function * may be using too much stack. FSP might disable HW breakpoints, though. ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/85568?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7ebf0a5e8eaad49af77ab4d5f6b58fc849013b14 Gerrit-Change-Number: 85568 Gerrit-PatchSet: 3 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Uwe Poeche <uwe.poeche(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: siemens-bot Gerrit-Reviewer: yuchi.chen(a)intel.com Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-CC: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: yuchi.chen(a)intel.com Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Uwe Poeche <uwe.poeche(a)siemens.com> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Comment-Date: Mon, 16 Dec 2024 09:26:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: mb/google/rauru: Add SD card configurations
by Yu-Ping Wu (Code Review) 16 Dec '24

16 Dec '24

Attention is currently required from: Hung-Te Lin, Jarried Lin, Paul Menzel. Yu-Ping Wu has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85565?usp=email ) Change subject: mb/google/rauru: Add SD card configurations ...................................................................... Patch Set 10: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85565?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia9f12df85c5f9f9d134990edcf82bf0df9ea995d Gerrit-Change-Number: 85565 Gerrit-PatchSet: 10 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Mon, 16 Dec 2024 09:26:09 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: soc/mediatek/mt8196: Add MMinfra driver support
by Yidi Lin (Code Review) 16 Dec '24

16 Dec '24

Attention is currently required from: Hung-Te Lin, Jarried Lin, Paul Menzel, Yu-Ping Wu. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85188?usp=email ) Change subject: soc/mediatek/mt8196: Add MMinfra driver support ...................................................................... Patch Set 26: (1 comment) File src/soc/mediatek/mt8196/mminfra.c: https://review.coreboot.org/c/coreboot/+/85188/comment/d805e535_30f9aa78?us… : PS26, Line 110: int ret; : : /* mminfra0 */ : ret = mtcmos_cb_register(MTCMOS_ID_MM_INFRA0, &mm_infra0_pb_cb); : if (ret) : return; : : /* mminfra1 */ : ret = mtcmos_cb_register(MTCMOS_ID_MM_INFRA1, &mm_infra1_pb_cb); : if (ret) : return; : } ``` if (mtcmos_cb_register(MTCMOS_ID_MM_INFRA0, &mm_infra0_pb_cb)) return; mtcmos_cb_register(MTCMOS_ID_MM_INFRA1, &mm_infra1_pb_cb); ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/85188?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie86f141a0957fc60d4973875c0dbcbdb57be1f75 Gerrit-Change-Number: 85188 Gerrit-PatchSet: 26 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Mon, 16 Dec 2024 09:21:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[L] Change in coreboot[main]: mainboard: Add MSI MS-7788
by Angel Pons (Code Review) 16 Dec '24

16 Dec '24

Attention is currently required from: Felix Singer, Maximilian Brune, Name of user not set #1005283. Angel Pons has posted comments on this change by Name of user not set #1005283. ( https://review.coreboot.org/c/coreboot/+/79979?usp=email ) Change subject: mainboard: Add MSI MS-7788 ...................................................................... Patch Set 9: (4 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/79979/comment/9dcd282d_9ed974bc?us… : PS9, Line 24: * I had changed Sandybridge `chipset.cb` because I : was getting warnings in my logs about leftover : static devices : * Is there something wrong with my configuration : or are those warnings supposed to be there? : * Do I leave the warnings be? : * Or is there something else I can do? There should be no need to modify chipset.cb File src/mainboard/msi/ms7788/dsdt.asl: https://review.coreboot.org/c/coreboot/+/79979/comment/cbd6c55f_b5ff5dc9?us… : PS9, Line 11: /* OEM revision */ I'm pretty sure that's the number hardcoded in autoport. Please remove the comment ```suggestion 0x20141018 ``` File src/mainboard/msi/ms7788/gma-mainboard.ads: PS9: Please use 3 spaces for indentation (it's the convention for Ada source code in coreboot) File src/northbridge/intel/sandybridge/romstage.c: https://review.coreboot.org/c/coreboot/+/79979/comment/55fbf13b_3ed7fb5d?us… : PS9, Line 56: //if (mchbar_read16(SSKPD_HI) == 0xcafe) > Please avoid modifying common code. […] I think one of the Dell Optiplex boards needs a similar workaround for some reason. It's implemented in mainboard code. -- To view, visit https://review.coreboot.org/c/coreboot/+/79979?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia7830fcc7552e9734ec7c57e508a6a77f689e5b0 Gerrit-Change-Number: 79979 Gerrit-PatchSet: 9 Gerrit-Owner: Name of user not set #1005283 Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Name of user not set #1005283 Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Alicja Michalska <ahplka19(a)gmail.com> Gerrit-Attention: Name of user not set #1005283 Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Comment-Date: Mon, 16 Dec 2024 09:21:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Alicja Michalska <ahplka19(a)gmail.com>

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[M] Change in coreboot[main]: soc/intel/alderlake: Add function to force disable memory channels
by Kapil Porwal (Code Review) 16 Dec '24

16 Dec '24

Attention is currently required from: Angel Pons, Christian Walter, Dinesh Gehlot, Eric Lai, Jayvik Desai, Jeremy Soller, Lean Sheng Tan, Michał Kopeć, Michał Żygowski, Nick Vaccaro, Paul Menzel, Piotr Król, Sean Rhodes, Subrata Banik, Tim Crawford. Kapil Porwal has posted comments on this change by Kapil Porwal. ( https://review.coreboot.org/c/coreboot/+/85529?usp=email ) Change subject: soc/intel/alderlake: Add function to force disable memory channels ...................................................................... Patch Set 7: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/85529/comment/b8672f30_aaf2a25f?us… : PS3, Line 8: > Yes, I understand. The motivation could still be better described. […] In firmware context, "memory channel" is not at all ambiguous term. Here is a wiki link https://en.wikipedia.org/wiki/Multi-channel_memory_architecture -- To view, visit https://review.coreboot.org/c/coreboot/+/85529?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibfeca4509cb3d88bc1bac2ac2d480e665d895bc5 Gerrit-Change-Number: 85529 Gerrit-PatchSet: 7 Gerrit-Owner: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jamie Chen <jamie.chen(a)intel.corp-partner.google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Comment-Date: Mon, 16 Dec 2024 09:20:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Kapil Porwal <kapilporwal(a)google.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com>

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coreboot-gerrit December 2024