coreboot-gerrit December 2024

coreboot-gerrit@coreboot.org

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[L] Change in coreboot[main]: mainboard: Add MSI MS-7788
by Angel Pons (Code Review) 16 Dec '24

16 Dec '24

Attention is currently required from: Felix Singer, Maximilian Brune, Name of user not set #1005283. Angel Pons has posted comments on this change by Name of user not set #1005283. ( https://review.coreboot.org/c/coreboot/+/79979?usp=email ) Change subject: mainboard: Add MSI MS-7788 ...................................................................... Patch Set 9: (6 comments) File src/mainboard/msi/ms7788/devicetree.cb: https://review.coreboot.org/c/coreboot/+/79979/comment/430bd4b8_50f88886?us… : PS9, Line 1: # FIXME: GPU registers may not always apply. This comment is referring to some settings that aren't present here, so you should remove it https://review.coreboot.org/c/coreboot/+/79979/comment/189ba82b_538f98d5?us… : PS9, Line 5: Put host_bridge, peg10 and igd here https://review.coreboot.org/c/coreboot/+/79979/comment/30b9b6e1_89eee437?us… : PS9, Line 8: register "docking_supported" = "0" > Why? This board isn't a laptop, right? autoport default, it can be removed because 0 is the default value for devicetree registers (they're converted to a struct initialiser). https://review.coreboot.org/c/coreboot/+/79979/comment/fd80c3bc_a750abfb?us… : PS9, Line 11: register "gen3_dec" = "0x00000000" : register "gen4_dec" = "0x00000000" : register "pcie_hotplug_map" = "{ 0, 0, 0, 0, 0, 0, 0, 0 }" These are zero as well and can be removed https://review.coreboot.org/c/coreboot/+/79979/comment/16bc61ec_a6b8385b?us… : PS9, Line 41: device ref sata2 off end # SATA Controller 2 Unsupported PCI device 8086:1c08 I think this device is off by default so you can remove this https://review.coreboot.org/c/coreboot/+/79979/comment/4c074d81_600a1b34?us… : PS9, Line 43: device ref host_bridge on end # Host bridge Host bridge : device ref peg10 on end # PEG : device ref igd on end # iGPU nit: move these above the southbridge chip (see comment above) -- To view, visit https://review.coreboot.org/c/coreboot/+/79979?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia7830fcc7552e9734ec7c57e508a6a77f689e5b0 Gerrit-Change-Number: 79979 Gerrit-PatchSet: 9 Gerrit-Owner: Name of user not set #1005283 Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Name of user not set #1005283 Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Alicja Michalska <ahplka19(a)gmail.com> Gerrit-Attention: Name of user not set #1005283 Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Comment-Date: Mon, 16 Dec 2024 09:17:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Alicja Michalska <ahplka19(a)gmail.com>

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[M] Change in coreboot[main]: soc/mediatek/mt8196: Add MMinfra driver support
by Jarried Lin (Code Review) 16 Dec '24

16 Dec '24

Attention is currently required from: Hung-Te Lin, Paul Menzel, Yidi Lin, Yu-Ping Wu. Jarried Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85188?usp=email ) Change subject: soc/mediatek/mt8196: Add MMinfra driver support ...................................................................... Patch Set 26: (1 comment) File src/soc/mediatek/mt8196/mminfra.c: https://review.coreboot.org/c/coreboot/+/85188/comment/42a08649_7a501b19?us… : PS25, Line 68: write32p(MMPC_PM_BOOT_UP_PWR_CON, : read32p(MMPC_PM_BOOT_UP_PWR_CON) | MM_INFRA0_PM_BOOT_UP | MM_INFRA1_PM_BOOT_UP); > setbits32p Done -- To view, visit https://review.coreboot.org/c/coreboot/+/85188?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie86f141a0957fc60d4973875c0dbcbdb57be1f75 Gerrit-Change-Number: 85188 Gerrit-PatchSet: 26 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Mon, 16 Dec 2024 09:17:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yidi Lin <yidilin(a)google.com>

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[M] Change in coreboot[main]: soc/mediatek/mt8196: Add MMinfra driver support
by Jarried Lin (Code Review) 16 Dec '24

16 Dec '24

Attention is currently required from: Hung-Te Lin, Jarried Lin, Paul Menzel, Yu-Ping Wu. Hello Hung-Te Lin, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85188?usp=email to look at the new patch set (#26). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/mediatek/mt8196: Add MMinfra driver support ...................................................................... soc/mediatek/mt8196: Add MMinfra driver support MMinfra is the Multimedia Infrastructure. All the Multimedia modules depend on it. This file adds some initial settings for MMinfra. Test=Build pass BUG=b:317009620 Signed-off-by: Xueqi Zhang <xueqi.zhang(a)mediatek.corp-partner.google.com> Change-Id: Ie86f141a0957fc60d4973875c0dbcbdb57be1f75 --- M src/soc/mediatek/mt8196/Makefile.mk M src/soc/mediatek/mt8196/bootblock.c M src/soc/mediatek/mt8196/include/soc/addressmap.h A src/soc/mediatek/mt8196/include/soc/mminfra.h A src/soc/mediatek/mt8196/mminfra.c 5 files changed, 166 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/85188/26 -- To view, visit https://review.coreboot.org/c/coreboot/+/85188?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie86f141a0957fc60d4973875c0dbcbdb57be1f75 Gerrit-Change-Number: 85188 Gerrit-PatchSet: 26 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com>

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[M] Change in coreboot[main]: soc/intel/xeon_sp/lbg: Add support to hide HDA
by Angel Pons (Code Review) 16 Dec '24

16 Dec '24

Attention is currently required from: Christian Walter, Johnny Lin, Jonathan Zhang, Patrick Rudolph, Paul Menzel, Shuo Liu, Tim Chu, yuchi.chen(a)intel.com. Angel Pons has posted comments on this change by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/85496?usp=email ) Change subject: soc/intel/xeon_sp/lbg: Add support to hide HDA ...................................................................... Patch Set 7: Code-Review+2 (1 comment) File src/soc/intel/xeon_sp/cpx/romstage.c: https://review.coreboot.org/c/coreboot/+/85496/comment/5c450786_07bb50cd?us… : PS4, Line 113: if (!is_devfn_enabled(PCH_DEVFN_HDA)) > 1. FSP might remember it was working and assumes it still is. […] Okay, thanks for adding this to the commit message -- To view, visit https://review.coreboot.org/c/coreboot/+/85496?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I84ac53621b2dcf7baa68f2efb30d0b7e77595c8d Gerrit-Change-Number: 85496 Gerrit-PatchSet: 7 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: yuchi.chen(a)intel.com Gerrit-Attention: yuchi.chen(a)intel.com Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Mon, 16 Dec 2024 09:12:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Patrick Rudolph <patrick.rudolph(a)9elements.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com>

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[XS] Change in coreboot[main]: mb/google/rauru: Add SD card configurations
by Yidi Lin (Code Review) 16 Dec '24

16 Dec '24

Attention is currently required from: Hung-Te Lin, Jarried Lin, Paul Menzel, Yu-Ping Wu. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85565?usp=email ) Change subject: mb/google/rauru: Add SD card configurations ...................................................................... Patch Set 9: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85565?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia9f12df85c5f9f9d134990edcf82bf0df9ea995d Gerrit-Change-Number: 85565 Gerrit-PatchSet: 9 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Mon, 16 Dec 2024 09:11:37 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: soc/mediatek/mt8196: Add SD card configurations
by Yidi Lin (Code Review) 16 Dec '24

16 Dec '24

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yu-Ping Wu. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85564?usp=email ) Change subject: soc/mediatek/mt8196: Add SD card configurations ...................................................................... Patch Set 7: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85564?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibb6a075d0f1b5a647e93a58b3ea1029b7676c765 Gerrit-Change-Number: 85564 Gerrit-PatchSet: 7 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Mon, 16 Dec 2024 09:11:09 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: cpu/x86/topology: Simplify CPU topology initialization
by Shuo Liu (Code Review) 16 Dec '24

16 Dec '24

Attention is currently required from: Christian Walter, Jincheng Li, Johnny Lin, Jonathan Zhang, Jérémy Compostella, Lean Sheng Tan, Patrick Rudolph, Ronak Kanabar, Tim Chu. Shuo Liu has posted comments on this change by Jérémy Compostella. ( https://review.coreboot.org/c/coreboot/+/85576?usp=email ) Change subject: cpu/x86/topology: Simplify CPU topology initialization ...................................................................... Patch Set 4: (1 comment) Patchset: PS1: > I will waiting for your test results. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/85576?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie9424559f895af69e79c36b919e80af803861148 Gerrit-Change-Number: 85576 Gerrit-PatchSet: 4 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Mon, 16 Dec 2024 09:06:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Jérémy Compostella <jeremy.compostella(a)intel.com> Comment-In-Reply-To: Shuo Liu <shuo.liu(a)intel.com>

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[M] Change in coreboot[main]: cpu/x86/topology: Simplify CPU topology initialization
by Shuo Liu (Code Review) 16 Dec '24

16 Dec '24

Attention is currently required from: Christian Walter, Jincheng Li, Johnny Lin, Jonathan Zhang, Jérémy Compostella, Lean Sheng Tan, Patrick Rudolph, Ronak Kanabar, Tim Chu. Shuo Liu has posted comments on this change by Jérémy Compostella. ( https://review.coreboot.org/c/coreboot/+/85576?usp=email ) Change subject: cpu/x86/topology: Simplify CPU topology initialization ...................................................................... Patch Set 4: Code-Review+2 (1 comment) Patchset: PS4: Tested in SPR and no changes before & after. -- To view, visit https://review.coreboot.org/c/coreboot/+/85576?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie9424559f895af69e79c36b919e80af803861148 Gerrit-Change-Number: 85576 Gerrit-PatchSet: 4 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Mon, 16 Dec 2024 09:06:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: soc/intel/alderlake: Add function to force disable memory channels
by Kapil Porwal (Code Review) 16 Dec '24

16 Dec '24

Attention is currently required from: Angel Pons, Christian Walter, Dinesh Gehlot, Eric Lai, Jayvik Desai, Jeremy Soller, Lean Sheng Tan, Michał Kopeć, Michał Żygowski, Nick Vaccaro, Piotr Król, Sean Rhodes, Subrata Banik, Tim Crawford. Kapil Porwal has posted comments on this change by Kapil Porwal. ( https://review.coreboot.org/c/coreboot/+/85529?usp=email ) Change subject: soc/intel/alderlake: Add function to force disable memory channels ...................................................................... Patch Set 6: (5 comments) File src/soc/intel/alderlake/include/soc/meminit.h: https://review.coreboot.org/c/coreboot/+/85529/comment/b3fee309_cd6660c8?us… : PS6, Line 120: mb_fill_override_channel_mask > +1 […] Acknowledged File src/soc/intel/alderlake/meminit.c: https://review.coreboot.org/c/coreboot/+/85529/comment/97ba0f76_0ff17196?us… : PS1, Line 264: void memcfg_init(FSPM_UPD *memupd, const struct mb_cfg *mb_cfg, : const struct mem_spd *spd_info, bool half_populated, : uint32_t ch_disable_mask) > Looks good to me. Acknowledged File src/soc/intel/alderlake/meminit.c: https://review.coreboot.org/c/coreboot/+/85529/comment/35969fdd_c6cf4156?us… : PS6, Line 260: if ((ch_disable_mask & BIT(0)) && : !((ch_disable_mask & 0xf) == (BIT(0) | BIT(1))) : ) { > I'm confused about this check. […] That is correct. Also check https://review.coreboot.org/c/coreboot/+/85529/comment/9166abbc_80078807/ https://review.coreboot.org/c/coreboot/+/85529/comment/38a9e8ae_3abcc3cd?us… : PS6, Line 269: { > Sharing some thoughts on this, but I don't have a strong opinion. […] I also prefer using braces to avoid the cases where we use a macro which expands into multiple lines of code. In this case, we can safely remove them. Ack. https://review.coreboot.org/c/coreboot/+/85529/comment/a1cf4503_f73c4111?us… : PS6, Line 325: mem_init_override_channel_mask(mem_cfg, mb_fill_override_channel_mask()); > nit: You can call `mb_fill_override_channel_mask()` inside `mem_init_override_channel_mask()` Acknowledged -- To view, visit https://review.coreboot.org/c/coreboot/+/85529?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibfeca4509cb3d88bc1bac2ac2d480e665d895bc5 Gerrit-Change-Number: 85529 Gerrit-PatchSet: 6 Gerrit-Owner: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jamie Chen <jamie.chen(a)intel.corp-partner.google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Comment-Date: Mon, 16 Dec 2024 09:00:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Kapil Porwal <kapilporwal(a)google.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com>

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[M] Change in coreboot[main]: soc/intel/alderlake: Add function to force disable memory channels
by Kapil Porwal (Code Review) 16 Dec '24

16 Dec '24

Attention is currently required from: Angel Pons, Christian Walter, Dinesh Gehlot, Eric Lai, Jayvik Desai, Jeremy Soller, Kapil Porwal, Lean Sheng Tan, Michał Kopeć, Michał Żygowski, Nick Vaccaro, Piotr Król, Sean Rhodes, Subrata Banik, Tim Crawford. Hello Angel Pons, Christian Walter, Dinesh Gehlot, Eric Lai, Jamie Chen, Jayvik Desai, Jeremy Soller, Lean Sheng Tan, Michał Kopeć, Michał Żygowski, Nick Vaccaro, Piotr Król, Sean Rhodes, Subrata Banik, Tim Crawford, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85529?usp=email to look at the new patch set (#7). The following approvals got outdated and were removed: Code-Review+1 by Angel Pons, Code-Review+1 by Subrata Banik Change subject: soc/intel/alderlake: Add function to force disable memory channels ...................................................................... soc/intel/alderlake: Add function to force disable memory channels Add a function `mem_init_override_channel_mask` to disable memory channels based on given bitmap where each bit represents a memory channel. A set bit will disable corresponding memory channel. Variants can override this bitmap by selecting `ENFORCE_MEM_CHANNEL_DISABLE` and implementing `mb_get_channel_disable_mask` to return the bitmap. BUG=b:379311559 TEST=Make sure that channel mask is applied correctly. Lotso without any channel mask: ``` lotso-rev0 ~ # dmidecode -t 17 | grep -E "(Locator: C|Size)" Size: 2 GB Locator: Channel-0-DIMM-0 Size: 2 GB Locator: Channel-1-DIMM-0 Size: 2 GB Locator: Channel-2-DIMM-0 Size: 2 GB Locator: Channel-3-DIMM-0 Size: 2 GB Locator: Channel-0-DIMM-0 Size: 2 GB Locator: Channel-1-DIMM-0 Size: 2 GB Locator: Channel-2-DIMM-0 Size: 2 GB Locator: Channel-3-DIMM-0 lotso-rev0 ~ # dmidecode -t 17 | grep Size | wc -l 8 ``` Lotso with channel 2 & 3 masked: ``` lotso-rev0 ~ # dmidecode -t 17 | grep -E "(Locator: C|Size)" Size: 2 GB Locator: Channel-0-DIMM-0 Size: 2 GB Locator: Channel-1-DIMM-0 Size: 2 GB Locator: Channel-0-DIMM-0 Size: 2 GB Locator: Channel-1-DIMM-0 lotso-rev0 ~ # dmidecode -t 17 | grep Size | wc -l 4 ``` Change-Id: Ibfeca4509cb3d88bc1bac2ac2d480e665d895bc5 Signed-off-by: Kapil Porwal <kapilporwal(a)google.com> --- M src/soc/intel/alderlake/Kconfig M src/soc/intel/alderlake/include/soc/meminit.h M src/soc/intel/alderlake/meminit.c 3 files changed, 58 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/85529/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/85529?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibfeca4509cb3d88bc1bac2ac2d480e665d895bc5 Gerrit-Change-Number: 85529 Gerrit-PatchSet: 7 Gerrit-Owner: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jamie Chen <jamie.chen(a)intel.corp-partner.google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com>

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coreboot-gerrit December 2024