coreboot-gerrit December 2024

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[main]: soc/amd/glinda/cpu: Update smbios parameters
by Naresh Solanki (Code Review) 17 Dec '24

17 Dec '24

Naresh Solanki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85637?usp=email ) Change subject: soc/amd/glinda/cpu: Update smbios parameters ...................................................................... soc/amd/glinda/cpu: Update smbios parameters Change-Id: If8eaa54c9a0086f4d397a7ddb01009acfd3f1aee Signed-off-by: Naresh Solanki <naresh.solanki(a)9elements.com> --- M src/soc/amd/glinda/cpu.c 1 file changed, 15 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/85637/1 diff --git a/src/soc/amd/glinda/cpu.c b/src/soc/amd/glinda/cpu.c index 3be2ddb..680b095 100644 --- a/src/soc/amd/glinda/cpu.c +++ b/src/soc/amd/glinda/cpu.c @@ -18,6 +18,21 @@ return 100; // 100 MHz } +unsigned int smbios_cache_error_correction_type(u8 level) +{ + return SMBIOS_CACHE_ERROR_CORRECTION_MULTI_BIT; +} + +unsigned int smbios_cache_conf_operation_mode(u8 level) +{ + return SMBIOS_CACHE_OP_MODE_WRITE_BACK; +} + +unsigned int smbios_cache_sram_type(void) +{ + return SMBIOS_CACHE_SRAM_TYPE_PIPELINE_BURST; +} + static void zen_2_3_init(struct device *dev) { check_mca(); -- To view, visit https://review.coreboot.org/c/coreboot/+/85637?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If8eaa54c9a0086f4d397a7ddb01009acfd3f1aee Gerrit-Change-Number: 85637 Gerrit-PatchSet: 1 Gerrit-Owner: Naresh Solanki <naresh.solanki(a)9elements.com>

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[XS] Change in coreboot[main]: soc/amd/glinda/cpu: smbios: update external clock
by Naresh Solanki (Code Review) 17 Dec '24

17 Dec '24

Naresh Solanki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85636?usp=email ) Change subject: soc/amd/glinda/cpu: smbios: update external clock ...................................................................... soc/amd/glinda/cpu: smbios: update external clock Change-Id: I99f73695019612d58b0c78c6985370d23c78b729 Signed-off-by: Naresh Solanki <naresh.solanki(a)9elements.com> --- M src/soc/amd/glinda/cpu.c 1 file changed, 6 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/85636/1 diff --git a/src/soc/amd/glinda/cpu.c b/src/soc/amd/glinda/cpu.c index a716127..3be2ddb 100644 --- a/src/soc/amd/glinda/cpu.c +++ b/src/soc/amd/glinda/cpu.c @@ -7,11 +7,17 @@ #include <cpu/amd/microcode.h> #include <cpu/cpu.h> #include <device/device.h> +#include <smbios.h> #include <soc/cpu.h> _Static_assert(CONFIG_MAX_CPUS == 24, "Do not override MAX_CPUS. To reduce the number of " "available cores, use the downcore_mode and disable_smt devicetree settings instead."); +unsigned int smbios_processor_external_clock(void) +{ + return 100; // 100 MHz +} + static void zen_2_3_init(struct device *dev) { check_mca(); -- To view, visit https://review.coreboot.org/c/coreboot/+/85636?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I99f73695019612d58b0c78c6985370d23c78b729 Gerrit-Change-Number: 85636 Gerrit-PatchSet: 1 Gerrit-Owner: Naresh Solanki <naresh.solanki(a)9elements.com>

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[S] Change in coreboot[main]: mb/ocp/tiogapass: Wait for BMC
by Patrick Rudolph (Code Review) 17 Dec '24

17 Dec '24

Attention is currently required from: Angel Pons, Christian Walter, Johnny Lin, Morgan Jang, Paul Menzel, Shuo Liu, yuchi.chen(a)intel.com. Patrick Rudolph has posted comments on this change by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/85492?usp=email ) Change subject: mb/ocp/tiogapass: Wait for BMC ...................................................................... Patch Set 8: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/85492/comment/d5dd6c0e_716aabe6?us… : PS6, Line 15: lot's > typo: "lots" Done https://review.coreboot.org/c/coreboot/+/85492/comment/e5cb6b0d_6723119e?us… : PS6, Line 15: error messages > From coreboot? From the payload (which one)? From the OS (which one)? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/85492?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I925aff1ff1ffd3d7388835e62aad2ba339e52472 Gerrit-Change-Number: 85492 Gerrit-PatchSet: 8 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Morgan Jang <Morgan_Jang(a)wiwynn.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: yuchi.chen(a)intel.com Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: yuchi.chen(a)intel.com Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Morgan Jang <Morgan_Jang(a)wiwynn.com> Gerrit-Comment-Date: Tue, 17 Dec 2024 16:17:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com>

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[S] Change in coreboot[main]: mb/ocp/tiogapass: Wait for BMC
by Patrick Rudolph (Code Review) 17 Dec '24

17 Dec '24

Attention is currently required from: Angel Pons, Christian Walter, Johnny Lin, Morgan Jang, Patrick Rudolph, Paul Menzel, Shuo Liu, yuchi.chen(a)intel.com. Hello Angel Pons, Christian Walter, Johnny Lin, Morgan Jang, Paul Menzel, Shuo Liu, build bot (Jenkins), yuchi.chen(a)intel.com, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85492?usp=email to look at the new patch set (#8). Change subject: mb/ocp/tiogapass: Wait for BMC ...................................................................... mb/ocp/tiogapass: Wait for BMC The mainboard code relies on IPMI communication with the BMC. Since the x86 and BMC start booting at the same time on ACPI G3 exit and the x86 is a bit faster, wait for the BMC to signal it's done booting by pulling GPP_F4 low. Fixes lots of error messages in coreboot about not working IPMI: [ERROR] wait_ibf timeout! [ERROR] IPMI START WRITE failed [ERROR] ipmi_kcs_send_message failed TEST: Once GPP_F4 is low IPMI communication over the KCS is also working on ocp/tiogapass. The log contains the line: [DEBUG] BMC ready after 125560 ms Change-Id: I925aff1ff1ffd3d7388835e62aad2ba339e52472 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/mainboard/ocp/tiogapass/include/tp_pch_gpio.h M src/mainboard/ocp/tiogapass/romstage.c 2 files changed, 29 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/85492/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/85492?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I925aff1ff1ffd3d7388835e62aad2ba339e52472 Gerrit-Change-Number: 85492 Gerrit-PatchSet: 8 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Morgan Jang <Morgan_Jang(a)wiwynn.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: yuchi.chen(a)intel.com Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: yuchi.chen(a)intel.com Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Morgan Jang <Morgan_Jang(a)wiwynn.com>

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[S] Change in coreboot[main]: mb/ocp/tiogapass: Wait for BMC
by Patrick Rudolph (Code Review) 17 Dec '24

17 Dec '24

Attention is currently required from: Angel Pons, Christian Walter, Johnny Lin, Morgan Jang, Patrick Rudolph, Paul Menzel, Shuo Liu, yuchi.chen(a)intel.com. Hello Angel Pons, Christian Walter, Johnny Lin, Morgan Jang, Paul Menzel, Shuo Liu, build bot (Jenkins), yuchi.chen(a)intel.com, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85492?usp=email to look at the new patch set (#7). The following approvals got outdated and were removed: Code-Review+1 by Shuo Liu, Code-Review+2 by Angel Pons, Verified+1 by build bot (Jenkins) Change subject: mb/ocp/tiogapass: Wait for BMC ...................................................................... mb/ocp/tiogapass: Wait for BMC The mainboard code relies on IPMI communication with the BMC. Since the x86 and BMC start booting at the same time on ACPI G3 exit and the x86 is a bit faster, wait for the BMC to signal it's done booting by pulling GPP_F4 low. Fixes lot's of error messages in coreboot about not working IPMI: [ERROR] wait_ibf timeout! [ERROR] IPMI START WRITE failed [ERROR] ipmi_kcs_send_message failed TEST: Once GPP_F4 is low IPMI communication over the KCS is also working on ocp/tiogapass. The log contains the line: [DEBUG] BMC ready after 125560 ms Change-Id: I925aff1ff1ffd3d7388835e62aad2ba339e52472 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/mainboard/ocp/tiogapass/include/tp_pch_gpio.h M src/mainboard/ocp/tiogapass/romstage.c 2 files changed, 29 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/85492/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/85492?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I925aff1ff1ffd3d7388835e62aad2ba339e52472 Gerrit-Change-Number: 85492 Gerrit-PatchSet: 7 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Morgan Jang <Morgan_Jang(a)wiwynn.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: yuchi.chen(a)intel.com Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: yuchi.chen(a)intel.com Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Morgan Jang <Morgan_Jang(a)wiwynn.com>

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[XL] Change in coreboot[main]: drivers/option: Add forms in cbtables
by Angel Pons (Code Review) 17 Dec '24

17 Dec '24

Attention is currently required from: Benjamin Doron, Lean Sheng Tan, Martin L Roth, Maximilian Brune, Nico Huber, Patrick Rudolph, Sean Rhodes, Werner Zeh. Angel Pons has posted comments on this change by Angel Pons. ( https://review.coreboot.org/c/coreboot/+/74121?usp=email ) Change subject: drivers/option: Add forms in cbtables ...................................................................... Patch Set 27: Code-Review+1 (9 comments) File Documentation/drivers/cfr.md: https://review.coreboot.org/c/coreboot/+/74121/comment/4caca4fa_71293744?us… : PS27, Line 9: S lowercase s https://review.coreboot.org/c/coreboot/+/74121/comment/b58ae18b_eefcd5be?us… : PS27, Line 15: means meaning? https://review.coreboot.org/c/coreboot/+/74121/comment/9c96617a_606d69e0?us… : PS27, Line 24: it's its (there are multiple ocurrences) File src/commonlib/include/commonlib/cfr.h: https://review.coreboot.org/c/coreboot/+/74121/comment/1cf92cce_1c046472?us… : PS27, Line 1: /* SPDX-License-Identifier: GPL-2.0-only */ We should consider moving this to commonlib/bsd for interoperability. I (wrote the initial implementation) am OK with the license change, but we'd need to ask others first. https://review.coreboot.org/c/coreboot/+/74121/comment/2372341f_dc34df68?us… : PS27, Line 6: #include <stdint.h> Redundant, types.h already includes it. https://review.coreboot.org/c/coreboot/+/74121/comment/8c2b493a_b1303600?us… : PS27, Line 106: * CFR_TAG_VARCHAR_UI_HELPTEXT or CFR_TAG_VARCHAR_DEF_VALUE nit: remove extra space ```suggestion * CFR_TAG_VARCHAR_UI_HELPTEXT or CFR_TAG_VARCHAR_DEF_VALUE ``` https://review.coreboot.org/c/coreboot/+/74121/comment/df5734b0_98b455ef?us… : PS27, Line 143: uint32_t tag; /* CFR_TAG_OPTION_VARCHAR */ : uint32_t size; : uint64_t object_id; /* Uniqueue ID */ : uint64_t dependency_id; /* Grayout if value of lb_cfr_numeric_option with given ID is 0. : * Ignore if field is 0. : */ : uint32_t flags; /* enum cfr_option_flags */ We could have an `option header` structure so that we can factor out filling in the header fields. File src/drivers/option/cfr.c: https://review.coreboot.org/c/coreboot/+/74121/comment/ad93cf6a_f0ed2c15?us… : PS27, Line 42: data = (uint8_t *)(cfr_str + 1); Right, this is a variable length structure and we don't have a struct member for the data. I would prefer this for clarity: ```suggestion char *data = current + sizeof(*cfr_str); ``` https://review.coreboot.org/c/coreboot/+/74121/comment/f4628b3c_5c829b52?us… : PS27, Line 48: /* Fill padding bytes */ : padding = cfr_str->size - (sizeof(*cfr_str) + cfr_str->data_length); : memset(&data[cfr_str->data_length], 0, padding); This should not be necessary -- To view, visit https://review.coreboot.org/c/coreboot/+/74121?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I304de7d26d79245a2e31a6d01f6c5643b31cb772 Gerrit-Change-Number: 74121 Gerrit-PatchSet: 27 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Christian Walter <christian.walter(a)9elements.com> Gerrit-CC: Daniel Maslowski <info(a)orangecms.org> Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-CC: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Tue, 17 Dec 2024 15:17:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: amdfwtool: Check fletcher of each header
by Bao Zheng (Code Review) 17 Dec '24

17 Dec '24

Attention is currently required from: Felix Held, Zheng Bao. Bao Zheng has posted comments on this change by Bao Zheng. ( https://review.coreboot.org/c/coreboot/+/84338?usp=email ) Change subject: amdfwtool: Check fletcher of each header ...................................................................... Patch Set 3: (1 comment) File util/amdfwtool/amdfwtool.c: https://review.coreboot.org/c/coreboot/+/84338/comment/308973ba_ccd22581?us… : PS1, Line 571: default: /* ISH */ > hmm, the ISH table has its checksum where all other tables have the cookie field, so if we're unluck […] It seems there isn't a way to identify the ISH. -- To view, visit https://review.coreboot.org/c/coreboot/+/84338?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie7540386027c6449317e9b7c0b4fd22d09d4a3a3 Gerrit-Change-Number: 84338 Gerrit-PatchSet: 3 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Zheng Bao Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 17 Dec 2024 14:34:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de>

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[S] Change in coreboot[main]: cbfstool: Do not compress the BIOS binary if A/B recovery
by Paul Menzel (Code Review) 17 Dec '24

17 Dec '24

Attention is currently required from: Bao Zheng, Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier, Zheng Bao. Paul Menzel has posted comments on this change by Bao Zheng. ( https://review.coreboot.org/c/coreboot/+/85628?usp=email ) Change subject: cbfstool: Do not compress the BIOS binary if A/B recovery ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/85628/comment/145b6708_c7036e79?us… : PS1, Line 8: Why? -- To view, visit https://review.coreboot.org/c/coreboot/+/85628?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I10db7ad44d2a92c143f46d9ee6fc7824b2ff0cc6 Gerrit-Change-Number: 85628 Gerrit-PatchSet: 1 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Zheng Bao Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 17 Dec 2024 14:24:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: soc/mediatek/common: Move SPM_SYSTEM_BASE_OFFSET to soc folders
by Yidi Lin (Code Review) 17 Dec '24

17 Dec '24

Attention is currently required from: Hung-Te Lin, Xi Chen, Yu-Ping Wu. Hello Hung-Te Lin, Xi Chen, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85625?usp=email to look at the new patch set (#2). Change subject: soc/mediatek/common: Move SPM_SYSTEM_BASE_OFFSET to soc folders ...................................................................... soc/mediatek/common: Move SPM_SYSTEM_BASE_OFFSET to soc folders MT8196's SPM_SYSTEM_BASE_OFFSET has a different offset due to the hardware design. To avoid adding a new kconfig for differentiation, migrate this definition into SoC specific value. BUG=none TEST=emerge-geralt coreboot && emerge-corsola coreboot Change-Id: I5df510d5d05a0594d87e7e96e1e03e20a018785f Signed-off-by: Yidi Lin <yidilin(a)chromium.org> --- M src/soc/mediatek/common/include/soc/spm_common.h M src/soc/mediatek/mt8186/include/soc/spm.h M src/soc/mediatek/mt8188/include/soc/spm.h M src/soc/mediatek/mt8192/include/soc/spm.h M src/soc/mediatek/mt8195/include/soc/spm.h 5 files changed, 7 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/85625/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85625?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5df510d5d05a0594d87e7e96e1e03e20a018785f Gerrit-Change-Number: 85625 Gerrit-PatchSet: 2 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com>

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[S] Change in coreboot[main]: soc/amd/common: Add function to check the if it is in A/B recovery
by Bao Zheng (Code Review) 17 Dec '24

17 Dec '24

Bao Zheng has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/84576?usp=email ) Change subject: soc/amd/common: Add function to check the if it is in A/B recovery ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/84576?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: abandon Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iadd0f91221e92eab5e563fa19d6e4ab199871b11 Gerrit-Change-Number: 84576 Gerrit-PatchSet: 5 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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coreboot-gerrit December 2024