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Change subject: soc/mediatek/common: Save dram_reserved_buffer info to sram
......................................................................
Patch Set 11:
(1 comment)
File src/soc/mediatek/common/memory.c:
https://review.coreboot.org/c/coreboot/+/85123/comment/80ca3b76_419f40c8?us… :
PS8, Line 359: reserved_buffer_ptr->dram_rank_num = curr_ddr_info->support_ranks;
> Yes, it works, thanks […]
Thanks. Instead of calculating the ranges in `bootmem_platform_add_ranges`, please add an API in mt8196/emi.c.
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Change subject: soc/mediatek/mt8196: Add MMinfra driver support
......................................................................
Patch Set 5:
(3 comments)
File src/soc/mediatek/mt8196/bootblock.c:
https://review.coreboot.org/c/coreboot/+/85188/comment/cc580518_48e6c4f9?us… :
PS5, Line 19: mm_pre_init
Why is this called `pre_init`? This only registers callbacks for 3 IDs. Looking at the code, I don't think we need to register them before `mt_pll_post_init`. The `disp_vcore_cb` callback in mtcmos.c is also registered in `mtcmos_post_init`, not in `pre_init` or `init` function.
I wonder if we can rename this function to `mminfra_post_init`, and move the 3 `mtcmos_ctrl` calls there:
```
void mminfra_post_init(void)
{
mtcmos_cb_register(...);
mtcmos_cb_register(...);
mtcmos_cb_register(...);
mtcmos_ctrl(MTCMOS_ID_MM_INFRA_AO, MTCMOS_POWER_ON);
mtcmos_ctrl(MTCMOS_ID_MM_INFRA0, MTCMOS_POWER_ON);
mtcmos_ctrl(MTCMOS_ID_MM_INFRA1, MTCMOS_POWER_ON);
}
```
Then the flow here would be:
```
mtcmos_init();
mt_pll_post_init();
mminfra_post_init();
mtcmos_post_init();
```
Does that make sense to you?
File src/soc/mediatek/mt8196/include/soc/mminfra.h:
https://review.coreboot.org/c/coreboot/+/85188/comment/5f27db01_8ff7fe78?us… :
PS5, Line 33: mm
mminfra
File src/soc/mediatek/mt8196/mminfra_pd.c:
PS5:
If there's no other `mminfra_*.c` files, can we rename this to `mminfra.c`?
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Change subject: soc/mediatek/mt8196: Add mtcmos init support
......................................................................
Patch Set 34:
(2 comments)
File src/soc/mediatek/mt8196/mtcmos.c:
https://review.coreboot.org/c/coreboot/+/84497/comment/d293607f_9a5c4b58?us… :
PS34, Line 390: if (!strcmp(item->name, cb->name)) {
Using a string as the unique identifier is inefficient. If we really worry about having register duplicate callbacks, please use numeric IDs. However I'm not sure if the check is needed here.
https://review.coreboot.org/c/coreboot/+/84497/comment/41651479_d3492d78?us… :
PS34, Line 836: mtcmos_ctrl(MTCMOS_ID_MM_INFRA_AO, MTCMOS_POWER_ON);
: mtcmos_ctrl(MTCMOS_ID_MM_INFRA0, MTCMOS_POWER_ON);
: mtcmos_ctrl(MTCMOS_ID_MM_INFRA1, MTCMOS_POWER_ON);
:
: mtcmos_ctrl(MTCMOS_ID_DISP_VCORE, MTCMOS_POWER_ON);
So, the whole callback code is only for these 4 `mtcmos_ctrl` calls? If there are no other calls that need callbacks, then we can remove the callback infrastructure altogether.
```
// spm_mtcmos.h
struct mtcmos_ops {
int (*pre_on)(void);
int (*pre_off)(void);
...
int (*post_on_sram)(void);
};
// mtcmos.c
void mtcmos_ctrl_ops(enum mtcmos_id id, enum mtcmos_state state,
const struct mtcmos_ops *ops)
{
...;
}
void mtcmos_ctrl(enum mtcmos_id id, enum mtcmos_state state)
{
mtcmos_ctrl_ops(id, state, NULL);
}
static struct mtcmos_ops disp_vcore_ops {
...;
};
void mtcmos_post_init(void)
{
...
mtcmos_ctrl_ops(MTCMOS_ID_DISP_VCORE, MTCMOS_POWER_ON, &disp_vcore_ops);
...
}
```
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Change subject: soc/mediatek/mt8196: Update SSPM firmware to v2.0
......................................................................
Patch Set 8:
(2 comments)
Commit Message:
https://review.coreboot.org/c/blobs/+/85247/comment/ab92af2d_6dc4925f?usp=e… :
PS8, Line 9: Update sspm.bin to fix suspend issue.
Can you elaborate the original suspend issue ?
https://review.coreboot.org/c/blobs/+/85247/comment/d730c1d1_9df31631?usp=e… :
PS8, Line 11: b:317009620
I don't think this is the correct bug ID.
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Change subject: soc/mediatek/mt8196: Update SSPM firmware to v2.0
......................................................................
Patch Set 8: Code-Review+1
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Hello Jarried Lin,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/blobs/+/85247?usp=email
to look at the new patch set (#6).
The following approvals got outdated and were removed:
Code-Review+1 by Kenji Yu
Change subject: soc/mediatek/mt8196: Update SSPM firmware to v2.0
......................................................................
soc/mediatek/mt8196: Update SSPM firmware to v2.0
Update sspm.bin to fix suspend issue.
BUG=b:317009620
TEST=test of suspend and resume pass.
Change-Id: I2c5503e31c2d97bc23d39c7ae442a1849a0dec85
Signed-off-by: Kenji Yu <kenji.yu(a)mediatek.corp-partner.google.com>
---
M mainboard/google/guybrush/dewatt_psp_verstage.signed.bin
M mainboard/google/guybrush/guybrush_psp_verstage.signed.bin
M mainboard/google/guybrush/nipperkin_psp_verstage.signed.bin
M soc/mediatek/mt8196/sspm.bin
M soc/mediatek/mt8196/sspm.bin.md5
M soc/mediatek/mt8196/sspm_release_notes.txt
6 files changed, 4 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/blobs refs/changes/47/85247/6
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Change subject: soc/mediatek/mt8196: Update SSPM firmware to v2.0
......................................................................
Set Ready For Review
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