coreboot-gerrit November 2024

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[M] Change in coreboot[main]: soc/intel/xeon_sp: Reserve PRMRR
by Shuo Liu (Code Review) 12 Nov '24

12 Nov '24

Attention is currently required from: Angel Pons, Arthur Heymans, Chen, Gang C, Christian Walter, Jincheng Li, Johnny Lin, Jonathan Zhang, Jérémy Compostella, Patrick Rudolph, Paul Menzel, Tim Chu. Shuo Liu has posted comments on this change by Shuo Liu. ( https://review.coreboot.org/c/coreboot/+/84314?usp=email ) Change subject: soc/intel/xeon_sp: Reserve PRMRR ...................................................................... Patch Set 6: (1 comment) File src/include/cpu/x86/mtrr.h: https://review.coreboot.org/c/coreboot/+/84314/comment/c9a3378c_d2e10f10?us… : PS6, Line 171: /* : * fls64: find least significant bit set in a 64-bit word : * As samples, fls64(0x0) = 64; fls64(0x4400) = 10; : * fls64(0x40400000000) = 34. : */ : static uint32_t fls64(uint64_t x) : { : uint32_t lo = (uint32_t)x; : if (lo) : return fls(lo); : uint32_t hi = x >> 32; : return fls(hi) + 32; : } > https://github.com/coreboot/coreboot/blob/2dd8f2e13b9e8bf10cd98e707534975f9…. […] Agree, the lib.h implementation is more generic. So I will ack this first and add another patch upon this one. -- To view, visit https://review.coreboot.org/c/coreboot/+/84314?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I81d17b1376459510f7c0d43ba4b519b1f2bd3e1f Gerrit-Change-Number: 84314 Gerrit-PatchSet: 6 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Tue, 12 Nov 2024 01:34:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com>

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[XS] Change in coreboot[main]: 3rdparty/fsp: Update submodule to upstream master
by Elyes Haouas (Code Review) 12 Nov '24

12 Nov '24

Attention is currently required from: Felix Singer, Matt DeVillier. Elyes Haouas has posted comments on this change by Felix Singer. ( https://review.coreboot.org/c/coreboot/+/84986?usp=email ) Change subject: 3rdparty/fsp: Update submodule to upstream master ...................................................................... Patch Set 1: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/84986/comment/3f64afca_ce220850?us… : PS1, Line 9: commit id 68328e2 > The SHA-1 references in this auto-generated message use only 7 characters and do not follow the Linu […] Acknowledged https://review.coreboot.org/c/coreboot/+/84986/comment/74bc7d56_adc32a93?us… : PS1, Line 12: d793185 > same here Acknowledged https://review.coreboot.org/c/coreboot/+/84986/comment/1982158a_8b8c3a7c?us… : PS1, Line 16: d793185 > same here Acknowledged -- To view, visit https://review.coreboot.org/c/coreboot/+/84986?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib4887f9ce8a76c374aeaa3fb03a8679ba446dff4 Gerrit-Change-Number: 84986 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Comment-Date: Tue, 12 Nov 2024 01:16:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Elyes Haouas <ehaouas(a)noos.fr>

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[S] Change in coreboot[main]: soc/intel/alderlake: Support early Sign of Life for CSE FW Sync
by Karthik Ramasubramanian (Code Review) 12 Nov '24

12 Nov '24

Karthik Ramasubramanian has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85103?usp=email ) Change subject: soc/intel/alderlake: Support early Sign of Life for CSE FW Sync ...................................................................... soc/intel/alderlake: Support early Sign of Life for CSE FW Sync This will ensure that the user is informed about an ongoing CSE FW Sync. BUG=b:378458829 TEST=Build Brox BIOS image and boot to OS. Ensure that ESOL is displayed during CSE FW Sync. Change-Id: I5e7b71da7a98be87361dc7ab9e6c4ae572f61773 Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> --- M src/soc/intel/alderlake/romstage/romstage.c M src/soc/intel/alderlake/romstage/ux.h 2 files changed, 10 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/85103/1 diff --git a/src/soc/intel/alderlake/romstage/romstage.c b/src/soc/intel/alderlake/romstage/romstage.c index 3acd2fd..9c60ba4 100644 --- a/src/soc/intel/alderlake/romstage/romstage.c +++ b/src/soc/intel/alderlake/romstage/romstage.c @@ -182,8 +182,12 @@ if (!CONFIG(INTEL_TXT)) disable_intel_txt(); - if (CONFIG(SOC_INTEL_CSE_LITE_SYNC_IN_ROMSTAGE) && !s3wake) + if (CONFIG(SOC_INTEL_CSE_LITE_SYNC_IN_ROMSTAGE) && !s3wake) { + cse_fill_bp_info(); + if (CONFIG(CHROMEOS_ENABLE_ESOL) && is_cse_fw_update_required()) + ux_inform_user_of_update_operation("CSE update"); cse_fw_sync(); + } /* Program to Disable UFS Controllers */ if (!is_devfn_enabled(PCH_DEVFN_UFS) && diff --git a/src/soc/intel/alderlake/romstage/ux.h b/src/soc/intel/alderlake/romstage/ux.h index e7e1d99..14c10e7 100644 --- a/src/soc/intel/alderlake/romstage/ux.h +++ b/src/soc/intel/alderlake/romstage/ux.h @@ -1,3 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#ifndef _SOC_INTEL_ALDERLAKE_ROMSTAGE_UX_H_ +#define _SOC_INTEL_ALDERLAKE_ROMSTAGE_UX_H_ + bool ux_inform_user_of_update_operation(const char *name); + +#endif /* _SOC_INTEL_ALDERLAKE_ROMSTAGE_UX_H_ */ -- To view, visit https://review.coreboot.org/c/coreboot/+/85103?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5e7b71da7a98be87361dc7ab9e6c4ae572f61773 Gerrit-Change-Number: 85103 Gerrit-PatchSet: 1 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com>

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[S] Change in coreboot[main]: build system: define and use an OS-specific sed
by Idwer Vollering (Code Review) 12 Nov '24

12 Nov '24

Attention is currently required from: Felix Singer, Jérémy Compostella, Martin L Roth. Idwer Vollering has posted comments on this change by Idwer Vollering. ( https://review.coreboot.org/c/coreboot/+/84807?usp=email ) Change subject: build system: define and use an OS-specific sed ...................................................................... Patch Set 1: (1 comment) File Makefile: https://review.coreboot.org/c/coreboot/+/84807/comment/dc146c67_97f058be?us… : PS1, Line 209: SED = /usr/local/bin/gsed Todo: add a check and error out, show a hint, when gsed is not installed. -- To view, visit https://review.coreboot.org/c/coreboot/+/84807?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia7c2d188f1deee67ffb2e0f4eaea4212fa2f98f0 Gerrit-Change-Number: 84807 Gerrit-PatchSet: 1 Gerrit-Owner: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Comment-Date: Mon, 11 Nov 2024 23:43:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: build system: switch to awk, to handle whitespace better
by Idwer Vollering (Code Review) 12 Nov '24

12 Nov '24

Attention is currently required from: Idwer Vollering. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84806?usp=email to look at the new patch set (#3). Change subject: build system: switch to awk, to handle whitespace better ...................................................................... build system: switch to awk, to handle whitespace better On BSD, FreeBSD, `wc -c` reserves or adds whitespace to the left of a filename. On linux, `wc -c` does not add whitespace. Use the printed number, instead of attempting to remove whitespace. Tested on: FreeBSD, archlinux. Change-Id: I0d145af9e091c7a9c52266791fa31086feeee923 Signed-off-by: Idwer Vollering <vidwer(a)gmail.com> --- M Makefile.mk 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/84806/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/84806?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0d145af9e091c7a9c52266791fa31086feeee923 Gerrit-Change-Number: 84806 Gerrit-PatchSet: 3 Gerrit-Owner: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Idwer Vollering <vidwer(a)gmail.com>

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[XS] Change in coreboot[main]: build system: switch to awk, to handle whitespace better
by Idwer Vollering (Code Review) 12 Nov '24

12 Nov '24

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84806?usp=email to look at the new patch set (#2). Change subject: build system: switch to awk, to handle whitespace better ...................................................................... build system: switch to awk, to handle whitespace better On BSD, FreeBSD, `wc -c` reserves or adss some whitespace to the left of a filename. On linux, `wc -c` does not add whitespace. Use the printed number, instead of attempting to remove whitespace. Tested on: FreeBSD, archlinux. Change-Id: I0d145af9e091c7a9c52266791fa31086feeee923 Signed-off-by: Idwer Vollering <vidwer(a)gmail.com> --- M Makefile.mk 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/84806/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84806?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0d145af9e091c7a9c52266791fa31086feeee923 Gerrit-Change-Number: 84806 Gerrit-PatchSet: 2 Gerrit-Owner: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[S] Change in coreboot[main]: soc/intel/cmn/pmc: Perform PM register init for CSE
by Karthik Ramasubramanian (Code Review) 11 Nov '24

11 Nov '24

Attention is currently required from: Nick Vaccaro, Subrata Banik. Karthik Ramasubramanian has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/85025?usp=email ) Change subject: soc/intel/cmn/pmc: Perform PM register init for CSE ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85025?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iae9c026da86fef4a3571e06b1bb20504c3d8c9be Gerrit-Change-Number: 85025 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Comment-Date: Mon, 11 Nov 2024 19:14:53 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: mb/google/fatcat: Limit memory speed for MT62F2G32D4DS-020 WT:F
by Subrata Banik (Code Review) 11 Nov '24

11 Nov '24

Attention is currently required from: Amanda Hwang. Subrata Banik has posted comments on this change by Amanda Hwang. ( https://review.coreboot.org/c/coreboot/+/85095?usp=email ) Change subject: mb/google/fatcat: Limit memory speed for MT62F2G32D4DS-020 WT:F ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > Thank you, Subrata. I’ve also verified that these two CLs work on Orisa. amazing , thanks for doing that -- To view, visit https://review.coreboot.org/c/coreboot/+/85095?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I45227cda12009b1cd1294a275393faa48b3e76a7 Gerrit-Change-Number: 85095 Gerrit-PatchSet: 1 Gerrit-Owner: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-CC: Eric Lai <ericllai(a)google.com> Gerrit-CC: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Attention: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Mon, 11 Nov 2024 18:16:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com>

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[XS] Change in coreboot[main]: mb/google/fatcat: Limit memory speed for MT62F2G32D4DS-020 WT:F
by Amanda Hwang (Code Review) 11 Nov '24

11 Nov '24

Amanda Hwang has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/85095?usp=email ) Change subject: mb/google/fatcat: Limit memory speed for MT62F2G32D4DS-020 WT:F ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/85095?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: abandon Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I45227cda12009b1cd1294a275393faa48b3e76a7 Gerrit-Change-Number: 85095 Gerrit-PatchSet: 1 Gerrit-Owner: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-CC: Eric Lai <ericllai(a)google.com> Gerrit-CC: Ian Feng <ian_feng(a)compal.corp-partner.google.com>

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[XS] Change in coreboot[main]: mb/google/fatcat: Limit memory speed for MT62F2G32D4DS-020 WT:F
by Amanda Hwang (Code Review) 11 Nov '24

11 Nov '24

Attention is currently required from: Pranava Y N, Subrata Banik. Amanda Hwang has posted comments on this change by Amanda Hwang. ( https://review.coreboot.org/c/coreboot/+/85095?usp=email ) Change subject: mb/google/fatcat: Limit memory speed for MT62F2G32D4DS-020 WT:F ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > > let me come back with something that is more meaningful here […] Thank you, Subrata. I’ve also verified that these two CLs work on Orisa. -- To view, visit https://review.coreboot.org/c/coreboot/+/85095?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I45227cda12009b1cd1294a275393faa48b3e76a7 Gerrit-Change-Number: 85095 Gerrit-PatchSet: 1 Gerrit-Owner: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-CC: Eric Lai <ericllai(a)google.com> Gerrit-CC: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Mon, 11 Nov 2024 18:09:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

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coreboot-gerrit November 2024