coreboot-gerrit October 2024

coreboot-gerrit@coreboot.org

1 participants
2622 discussions

[M] Change in coreboot[main]: soc/mediatek/mt8196: Enable lastbus debug hardware
by Paul Menzel (Code Review) 30 Oct '24

30 Oct '24

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yidi Lin, Yu-Ping Wu. Paul Menzel has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/84928?usp=email ) Change subject: soc/mediatek/mt8196: Enable lastbus debug hardware ...................................................................... Patch Set 1: Code-Review+1 (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/84928/comment/4e7659c7_cfaf8b11?us… : PS1, Line 12: printed out On the serial console? https://review.coreboot.org/c/coreboot/+/84928/comment/21e748a1_61b050c3?us… : PS1, Line 14: Do you have an example output? -- To view, visit https://review.coreboot.org/c/coreboot/+/84928?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib030d88faa2d4d6f6a8501f8c752deeafff92c5c Gerrit-Change-Number: 84928 Gerrit-PatchSet: 1 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Wed, 30 Oct 2024 12:43:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: mb/google/rauru: Enable ChromeOS EC
by Paul Menzel (Code Review) 30 Oct '24

30 Oct '24

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yu-Ping Wu. Paul Menzel has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/84931?usp=email ) Change subject: mb/google/rauru: Enable ChromeOS EC ...................................................................... Patch Set 2: Code-Review+1 (1 comment) File src/mainboard/google/rauru/bootblock.c: https://review.coreboot.org/c/coreboot/+/84931/comment/8733e51b_b768a88d?us… : PS2, Line 20: mtk_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, SPI_PAD0_MASK, 3 * MHz, 0); I’d be great if you mentioned the datasheet in the commit message, where it’s specified, that it operates at 3 MHz. -- To view, visit https://review.coreboot.org/c/coreboot/+/84931?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I20828eee93975e75dfb777fe29d5e1c3454b5059 Gerrit-Change-Number: 84931 Gerrit-PatchSet: 2 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-CC: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Wed, 30 Oct 2024 12:43:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: mb/google/nissa/var/glassway: Add initial LTE related settings
by Paul Menzel (Code Review) 30 Oct '24

30 Oct '24

Attention is currently required from: Daniel Peng, Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Subrata Banik. Paul Menzel has posted comments on this change by Daniel Peng. ( https://review.coreboot.org/c/coreboot/+/84925?usp=email ) Change subject: mb/google/nissa/var/glassway: Add initial LTE related settings ...................................................................... Patch Set 4: Code-Review+1 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/84925/comment/f1fc8a8c_1a059b7d?us… : PS2, Line 12: 4. Add I2C SX9324(P-sensor) support. > I just know that both SX9324 and LTE setting have relationship. […] Thank you for your quick reply. I do not have the schematics, so I do not know. If they are related, then keeping it in one commit is fine. -- To view, visit https://review.coreboot.org/c/coreboot/+/84925?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ida56ff338d82f48aef419a65830a3380c83123d5 Gerrit-Change-Number: 84925 Gerrit-PatchSet: 4 Gerrit-Owner: Daniel Peng <daniel_peng(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Daniel Peng <daniel_peng(a)pegatron.corp-partner.google.com> Gerrit-Comment-Date: Wed, 30 Oct 2024 12:42:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Daniel Peng <daniel_peng(a)pegatron.corp-partner.google.com>

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[M] Change in coreboot[main]: mb/google/nissa/var/glassway: Add initial LTE related settings
by Daniel Peng (Code Review) 30 Oct '24

30 Oct '24

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Paul Menzel, Subrata Banik. Daniel Peng has posted comments on this change by Daniel Peng. ( https://review.coreboot.org/c/coreboot/+/84925?usp=email ) Change subject: mb/google/nissa/var/glassway: Add initial LTE related settings ...................................................................... Patch Set 4: (5 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/84925/comment/84b1e859_83ad5ede?us… : PS2, Line 7: Initial LTE Related Settings > Please make it a statement by adding a verb (in imperative mood): […] Done https://review.coreboot.org/c/coreboot/+/84925/comment/2e47ebf7_b31c36e8?us… : PS2, Line 9: fw_config . > Please remove the space before the dot/period, or remove the period at the end of the items. Done https://review.coreboot.org/c/coreboot/+/84925/comment/6a712f2a_22c85a6b?us… : PS2, Line 12: SX9324(P-sensor) > Please add a space before (. Done https://review.coreboot.org/c/coreboot/+/84925/comment/71680e39_6702ac57?us… : PS2, Line 12: 4. Add I2C SX9324(P-sensor) support. > What is the sensor needed for in LTE setting? Should the proximity sensor be a separate commit? I just know that both SX9324 and LTE setting have relationship. That's why we set DB_1C_LTE for I2C SX9324 device in override.cb. On your experience, I could separate this CL to 2 commit if need? https://review.coreboot.org/c/coreboot/+/84925/comment/87267384_8b006487?us… : PS2, Line 13: > Please add the schematics file name. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/84925?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ida56ff338d82f48aef419a65830a3380c83123d5 Gerrit-Change-Number: 84925 Gerrit-PatchSet: 4 Gerrit-Owner: Daniel Peng <daniel_peng(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Wed, 30 Oct 2024 12:34:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>

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[M] Change in coreboot[main]: mb/google/nissa/var/glassway: Add initial LTE related settings
by Daniel Peng (Code Review) 30 Oct '24

30 Oct '24

Attention is currently required from: Daniel Peng, Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Subrata Banik. Hello Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84925?usp=email to look at the new patch set (#4). Change subject: mb/google/nissa/var/glassway: Add initial LTE related settings ...................................................................... mb/google/nissa/var/glassway: Add initial LTE related settings 1. Add DB_1C_LTE 4 on DB_USB fw_config. 2. Implement WWAN power sequencing. 3. Disable LTE-related GPIOs based on fw_config. 4. Add I2C SX9324 (P-sensor) support. Refer Schematic file: CA31AC_R10_MB_SUB_240903A_P.pdf BUG=b:374666995 BRANCH=firmware-nissa-15217.B TEST=emerge-nissa coreboot chromeos-bootimage Change-Id: Ida56ff338d82f48aef419a65830a3380c83123d5 Signed-off-by: Daniel Peng <Daniel_Peng(a)pegatron.corp-partner.google.com> --- M src/mainboard/google/brya/Kconfig M src/mainboard/google/brya/variants/glassway/fw_config.c M src/mainboard/google/brya/variants/glassway/include/variant/gpio.h M src/mainboard/google/brya/variants/glassway/overridetree.cb 4 files changed, 117 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/84925/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/84925?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ida56ff338d82f48aef419a65830a3380c83123d5 Gerrit-Change-Number: 84925 Gerrit-PatchSet: 4 Gerrit-Owner: Daniel Peng <daniel_peng(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Daniel Peng <daniel_peng(a)pegatron.corp-partner.google.com>

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[S] Change in coreboot[main]: mb/google/rauru: Enable ChromeOS EC
by Jarried Lin (Code Review) 30 Oct '24

30 Oct '24

Attention is currently required from: Hung-Te Lin, Yu-Ping Wu. Hello Hung-Te Lin, Yidi Lin, Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84931?usp=email to look at the new patch set (#2). Change subject: mb/google/rauru: Enable ChromeOS EC ...................................................................... mb/google/rauru: Enable ChromeOS EC 1. Configure ChromeOS EC 2. Pass GPIO_EC_AP_INT_ODL to the payload TEST=build pass BUG=b:317009620 Change-Id: I20828eee93975e75dfb777fe29d5e1c3454b5059 Signed-off-by: Yidi Lin <yidilin(a)chromium.org> --- M src/mainboard/google/rauru/Kconfig M src/mainboard/google/rauru/bootblock.c M src/mainboard/google/rauru/chromeos.c M src/mainboard/google/rauru/gpio.h M src/mainboard/google/rauru/reset.c 5 files changed, 19 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/84931/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84931?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I20828eee93975e75dfb777fe29d5e1c3454b5059 Gerrit-Change-Number: 84931 Gerrit-PatchSet: 2 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-CC: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com>

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[S] Change in coreboot[main]: mb/google/rauru: Configure TPM
by Jarried Lin (Code Review) 30 Oct '24

30 Oct '24

Attention is currently required from: Hung-Te Lin, Yu-Ping Wu. Hello Hung-Te Lin, Yidi Lin, Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84932?usp=email to look at the new patch set (#2). Change subject: mb/google/rauru: Configure TPM ...................................................................... mb/google/rauru: Configure TPM 1. Add TPM support 2. Configure I2C speed to I2C_SPEED_FAST_PLUS 3. Pass GPIO_GSC_AP_INT_ODL to the payload 4. Configure IRQ type to IRQ_TYPE_LEVEL_LOW for now TEST=build pass BUG=b:317009620 Change-Id: I582f010a9033ccb1771dbb3ccab9f16314628796 Signed-off-by: Yidi Lin <yidilin(a)chromium.org> --- M src/mainboard/google/rauru/Kconfig M src/mainboard/google/rauru/bootblock.c M src/mainboard/google/rauru/chromeos.c M src/mainboard/google/rauru/gpio.h 4 files changed, 26 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/84932/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84932?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I582f010a9033ccb1771dbb3ccab9f16314628796 Gerrit-Change-Number: 84932 Gerrit-PatchSet: 2 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-CC: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com>

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[S] Change in coreboot[main]: mb/google/nissa/var/glassway: Add touch screen ILIT2901 support
by Subrata Banik (Code Review) 30 Oct '24

30 Oct '24

Attention is currently required from: Daniel Peng, Dinesh Gehlot, Kapil Porwal, Nick Vaccaro, Paul Menzel. Subrata Banik has posted comments on this change by Daniel Peng. ( https://review.coreboot.org/c/coreboot/+/84894?usp=email ) Change subject: mb/google/nissa/var/glassway: Add touch screen ILIT2901 support ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84894?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6e13c948edca5a894e1a00a1954f0f88c4a079cf Gerrit-Change-Number: 84894 Gerrit-PatchSet: 5 Gerrit-Owner: Daniel Peng <daniel_peng(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Daniel Peng <daniel_peng(a)pegatron.corp-partner.google.com> Gerrit-Comment-Date: Wed, 30 Oct 2024 12:28:01 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: mb/google/rauru: Pass reset gpio parameter to BL31
by Jarried Lin (Code Review) 30 Oct '24

30 Oct '24

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[S] Change in coreboot[main]: Rauru: Configure TPM
by Jarried Lin (Code Review) 30 Oct '24

30 Oct '24

Attention is currently required from: Hung-Te Lin, Yidi Lin, Yu-Ping Wu. Hello Yidi Lin, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/84932?usp=email to review the following change. Change subject: Rauru: Configure TPM ...................................................................... Rauru: Configure TPM 1. Add TPM support 2. Configure I2C speed to I2C_SPEED_FAST_PLUS 3. Pass GPIO_GSC_AP_INT_ODL to the payload 4. Configure IRQ type to IRQ_TYPE_LEVEL_LOW for now Change-Id: I582f010a9033ccb1771dbb3ccab9f16314628796 Signed-off-by: Yidi Lin <yidilin(a)chromium.org> --- M src/mainboard/google/rauru/Kconfig M src/mainboard/google/rauru/bootblock.c M src/mainboard/google/rauru/chromeos.c M src/mainboard/google/rauru/gpio.h 4 files changed, 26 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/84932/1 diff --git a/src/mainboard/google/rauru/Kconfig b/src/mainboard/google/rauru/Kconfig index 011beed..fc1e839 100644 --- a/src/mainboard/google/rauru/Kconfig +++ b/src/mainboard/google/rauru/Kconfig @@ -10,7 +10,6 @@ config VBOOT select VBOOT_VBNV_FLASH select EC_GOOGLE_CHROMEEC_SWITCHES - select VBOOT_MOCK_SECDATA config BOARD_SPECIFIC_OPTIONS def_bool y @@ -24,6 +23,9 @@ select EC_GOOGLE_CHROMEEC select EC_GOOGLE_CHROMEEC_BOARDID select EC_GOOGLE_CHROMEEC_SPI + select I2C_TPM if VBOOT + select MAINBOARD_HAS_TPM2 if VBOOT + select TPM_GOOGLE_TI50 if VBOOT config MAINBOARD_DIR string @@ -41,4 +43,13 @@ config EC_GOOGLE_CHROMEEC_SPI_BUS hex default 0x1 + +config DRIVER_TPM_I2C_BUS + hex + default 0x1 + +config DRIVER_TPM_I2C_ADDR + hex + default 0x50 + endif diff --git a/src/mainboard/google/rauru/bootblock.c b/src/mainboard/google/rauru/bootblock.c index bbebf52..234c89b 100644 --- a/src/mainboard/google/rauru/bootblock.c +++ b/src/mainboard/google/rauru/bootblock.c @@ -2,6 +2,8 @@ #include <bootblock_common.h> #include <gpio.h> +#include <soc/gpio.h> +#include <soc/i2c.h> #include <soc/pcie.h> #include <soc/spi.h> @@ -17,8 +19,10 @@ if (CONFIG(PCI)) mtk_pcie_pre_init(); + mtk_i2c_bus_init(CONFIG_DRIVER_TPM_I2C_BUS, I2C_SPEED_FAST_PLUS); mtk_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, SPI_PAD0_MASK, 3 * MHz, 0); mtk_snfc_init(); usb3_hub_reset(); setup_chromeos_gpios(); + gpio_eint_configure(GPIO_GSC_AP_INT_ODL, IRQ_TYPE_LEVEL_LOW); } diff --git a/src/mainboard/google/rauru/chromeos.c b/src/mainboard/google/rauru/chromeos.c index a24995f..de36114 100644 --- a/src/mainboard/google/rauru/chromeos.c +++ b/src/mainboard/google/rauru/chromeos.c @@ -1,13 +1,16 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <boot/coreboot_tables.h> +#include <drivers/tpm/cr50.h> #include <gpio.h> +#include <console/console.h> #include "gpio.h" void setup_chromeos_gpios(void) { gpio_input(GPIO_EC_AP_INT_ODL); + gpio_input(GPIO_GSC_AP_INT_ODL); gpio_output(GPIO_AP_EC_WARM_RST_REQ, 0); gpio_output(GPIO_AP_FP_FW_UP_STRAP, 0); gpio_output(GPIO_BEEP_ON_OD, 0); @@ -24,6 +27,12 @@ { GPIO_EN_SPKR.id, ACTIVE_HIGH, -1, "speaker enable" }, { GPIO_EC_AP_INT_ODL.id, ACTIVE_LOW, -1, "EC interrupt" }, { GPIO_BEEP_ON_OD.id, ACTIVE_HIGH, -1, "beep enable" }, + { GPIO_GSC_AP_INT_ODL.id, ACTIVE_HIGH, -1, "TPM interrupt" }, }; lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); } + +int cr50_plat_irq_status(void) +{ + return gpio_eint_poll(GPIO_GSC_AP_INT_ODL); +} diff --git a/src/mainboard/google/rauru/gpio.h b/src/mainboard/google/rauru/gpio.h index b8c9a82..d97b38d 100644 --- a/src/mainboard/google/rauru/gpio.h +++ b/src/mainboard/google/rauru/gpio.h @@ -7,6 +7,7 @@ #define GPIO_BEEP_ON_OD GPIO(PERIPHERAL_EN1) #define GPIO_EN_SPKR GPIO(PERIPHERAL_EN0) +#define GPIO_GSC_AP_INT_ODL GPIO(EINT18) #define GPIO_EC_AP_INT_ODL GPIO(EINT19) #define GPIO_XHCI_INIT_DONE GPIO(EINT28) #define GPIO_AP_EC_WARM_RST_REQ GPIO(EINT29) -- To view, visit https://review.coreboot.org/c/coreboot/+/84932?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I582f010a9033ccb1771dbb3ccab9f16314628796 Gerrit-Change-Number: 84932 Gerrit-PatchSet: 1 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com>

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coreboot-gerrit October 2024