coreboot-gerrit October 2024

coreboot-gerrit@coreboot.org

1 participants
2622 discussions

[XS] Change in coreboot[main]: security/tpm/tspi/log-tpm1.c: Clear whole log area on creation
by Sergii Dmytruk (Code Review) 30 Oct '24

30 Oct '24

Attention is currently required from: Christian Walter, Krystian Hebel, Michał Żygowski. Sergii Dmytruk has posted comments on this change by Michał Żygowski. ( https://review.coreboot.org/c/coreboot/+/84927?usp=email ) Change subject: security/tpm/tspi/log-tpm1.c: Clear whole log area on creation ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84927?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7c780b62b1c6507e1dd1806b20b0270e364cde3d Gerrit-Change-Number: 84927 Gerrit-PatchSet: 1 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Comment-Date: Wed, 30 Oct 2024 22:33:55 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: util/cbmem/cbmem.c: Avoid overflows when parsing TCG TPM logs
by Sergii Dmytruk (Code Review) 30 Oct '24

30 Oct '24

Attention is currently required from: Krystian Hebel, Michał Żygowski, Paul Menzel. Sergii Dmytruk has posted comments on this change by Michał Żygowski. ( https://review.coreboot.org/c/coreboot/+/84926?usp=email ) Change subject: util/cbmem/cbmem.c: Avoid overflows when parsing TCG TPM logs ...................................................................... Patch Set 3: (1 comment) File util/cbmem/cbmem.c: https://review.coreboot.org/c/coreboot/+/84926/comment/0dd3af63_76a34834?us… : PS3, Line 999: if (current + len >= (uintptr_t)tpm2_log + size) { `>=` looks weird here and above. Maybe allow this case and add `tpm2_log - current >= sizeof(zero_block) + 4` to the condition of the loop? -- To view, visit https://review.coreboot.org/c/coreboot/+/84926?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7e057db3378b701d046d4e578272b10f294142a7 Gerrit-Change-Number: 84926 Gerrit-PatchSet: 3 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Comment-Date: Wed, 30 Oct 2024 22:33:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: mb/google/fatcat: support ISH
by Bora Guvendik (Code Review) 30 Oct '24

30 Oct '24

Attention is currently required from: Cliff Huang, Hannah Williams, Li1 Feng, Pranava Y N, Subrata Banik, Tanu Malhotra. Bora Guvendik has posted comments on this change by Bora Guvendik. ( https://review.coreboot.org/c/coreboot/+/84739?usp=email ) Change subject: mb/google/fatcat: support ISH ...................................................................... Patch Set 3: (1 comment) Patchset: PS3: > we need to hold the ISH enabling unless we have right strategy in place. […] ACK, holding until blobs are ready -- To view, visit https://review.coreboot.org/c/coreboot/+/84739?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2b6eb39fe7b07fcabc255d66df4aa0aa2865df79 Gerrit-Change-Number: 84739 Gerrit-PatchSet: 3 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Li1 Feng <li1.feng(a)intel.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tanu Malhotra <tanu.malhotra(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.corp-partner.google.com> Gerrit-Attention: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tanu Malhotra <tanu.malhotra(a)intel.com> Gerrit-Attention: Li1 Feng <li1.feng(a)intel.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Wed, 30 Oct 2024 20:53:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

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[M] Change in coreboot[main]: util/amdfwtool: Add binaries
by Maximilian Brune (Code Review) 30 Oct '24

30 Oct '24

Attention is currently required from: Anand Vaikar, Bao Zheng, Felix Held. Maximilian Brune has posted comments on this change by Maximilian Brune. ( https://review.coreboot.org/c/coreboot/+/84373?usp=email ) Change subject: util/amdfwtool: Add binaries ...................................................................... Patch Set 4: (6 comments) Patchset: PS4: Sry for the late reply. I had some other stuff on my TODO list. File util/amdfwtool/amdfwtool.c: https://review.coreboot.org/c/coreboot/+/84373/comment/5fd81587_d13809e4?us… : PS4, Line 374: BDT_BOTH > not sure what's correct here, but this is inconsistent with the rest. […] I don't know the right answer either. What do you think how we should proceed? I am honestly not sure what many of these binaries actually so I don't know if we need them all in both directory levels. File util/amdfwtool/data_parse.c: https://review.coreboot.org/c/coreboot/+/84373/comment/bfb93f6f_5bcf90bd?us… : PS4, Line 556: subprog = 0; > why is this removed? not sure how that happened. https://review.coreboot.org/c/coreboot/+/84373/comment/8ae440f0_fa6f8a68?us… : PS4, Line 629: } else if (strcmp(fw_name, "PSP_BDT_UCODE_INS0") == 0) { : fw_type = AMD_BIOS_UCODE; : subprog = 0; : instance = 0; : } else if (strcmp(fw_name, "PSP_BDT_UCODE_INS1") == 0) { : fw_type = AMD_BIOS_UCODE; : subprog = 0; : instance = 1; > is this needed? for other socs, we keep the ucode update in cbfs and apply it from coreboot. […] I got that from AMD, but I also assumed microcode update went through PSP, since no AMD SOC uses `CONFIG_SUPPORT_CPU_UCODE_IN_CBFS`. But now I see it goes through `CONFIG_SOC_AMD_COMMON_BLOCK_UCODE`. Anyway I removed it and now use coreboot (CBFS) to apply the microcode. https://review.coreboot.org/c/coreboot/+/84373/comment/202cd67a_011cf600?us… : PS4, Line 637: } else if (strcmp(fw_name, "PSP_BDT_APCB_BK_INS0") == 0) { : fw_type = AMD_BIOS_APCB_BK; : subprog = 0; : instance = 0; : } else if (strcmp(fw_name, "PSP_BDT_APCB_BK_INS8") == 0) { : fw_type = AMD_BIOS_APCB_BK; : subprog = 0; : instance = 8; > this should be already handled in util/amdfwtool/opts. […] Done https://review.coreboot.org/c/coreboot/+/84373/comment/a5d71100_8039c532?us… : PS4, Line 649: fw_type = AMD_BIOS_NV_ST; > probably not the right location in the code to comment about this, but i wonder if this is a file th […] I can only say that it is a fairly big file (~300K), I don't know its actual contents. -- To view, visit https://review.coreboot.org/c/coreboot/+/84373?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I78d7a9dba71de557e0a9a885d8561eea1f4191ef Gerrit-Change-Number: 84373 Gerrit-PatchSet: 4 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Anand Vaikar <a.vaikar2021(a)gmail.com> Gerrit-Reviewer: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Anand Vaikar <a.vaikar2021(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 30 Oct 2024 19:54:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de>

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[M] Change in coreboot[main]: util/amdfwtool: Add binaries
by Maximilian Brune (Code Review) 30 Oct '24

30 Oct '24

Attention is currently required from: Anand Vaikar, Bao Zheng, Maximilian Brune. Hello Anand Vaikar, Bao Zheng, Felix Held, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84373?usp=email to look at the new patch set (#5). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: util/amdfwtool: Add binaries ...................................................................... util/amdfwtool: Add binaries Change-Id: I78d7a9dba71de557e0a9a885d8561eea1f4191ef Signed-off-by: Maximilian Brune <maximilian.brune(a)9elements.com> Signed-off-by: Anand Vaikar <a.vaikar2021(a)gmail.com> --- M util/amdfwtool/amdfwtool.c M util/amdfwtool/amdfwtool.h M util/amdfwtool/data_parse.c 3 files changed, 116 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/84373/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/84373?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I78d7a9dba71de557e0a9a885d8561eea1f4191ef Gerrit-Change-Number: 84373 Gerrit-PatchSet: 5 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Anand Vaikar <a.vaikar2021(a)gmail.com> Gerrit-Reviewer: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Anand Vaikar <a.vaikar2021(a)gmail.com>

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[S] Change in coreboot[main]: soc/intel/common/gpio: add function to lock GPIO configuration
by Cliff Huang (Code Review) 30 Oct '24

30 Oct '24

Attention is currently required from: Bora Guvendik, Jérémy Compostella, Pranava Y N, Subrata Banik. Cliff Huang has posted comments on this change by Cliff Huang. ( https://review.coreboot.org/c/coreboot/+/84901?usp=email ) Change subject: soc/intel/common/gpio: add function to lock GPIO configuration ...................................................................... Patch Set 3: (1 comment) File src/soc/intel/common/block/gpio/gpio.c: https://review.coreboot.org/c/coreboot/+/84901/comment/28a0f40d_bf17a30c?us… : PS3, Line 485: /* Clear lock for the exception PADs */ > > Locked pads still function as it is configured, just that we won't be able to change the configura […] The thing is that we don't enable lock in our MB gpio.c and fw_config.c for pretty much all GPIOs today, In particularly, those configuration are generated from HW mapping document where lock decision are not determined and provided. We either manually replaced with lock macros for each of PAD in the ramstage table or fw_config.c or we could use this new function to add lock prior to writing to the registers. -- To view, visit https://review.coreboot.org/c/coreboot/+/84901?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iabe4e4b1d282a5f6cae8f330100c9139e0c2691d Gerrit-Change-Number: 84901 Gerrit-PatchSet: 3 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Wed, 30 Oct 2024 18:54:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Cliff Huang <cliff.huang(a)intel.com> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

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[S] Change in coreboot[main]: soc/intel/common/gpio: add function to lock GPIO configuration
by Subrata Banik (Code Review) 30 Oct '24

30 Oct '24

Attention is currently required from: Bora Guvendik, Cliff Huang, Jérémy Compostella, Pranava Y N. Subrata Banik has posted comments on this change by Cliff Huang. ( https://review.coreboot.org/c/coreboot/+/84901?usp=email ) Change subject: soc/intel/common/gpio: add function to lock GPIO configuration ...................................................................... Patch Set 3: (1 comment) File src/soc/intel/common/block/gpio/gpio.c: https://review.coreboot.org/c/coreboot/+/84901/comment/70805255_ec6fa45c?us… : PS3, Line 485: /* Clear lock for the exception PADs */ > Locked pads still function as it is configured, just that we won't be able to change the configuration afterwards (i.e. dp & OS). There is also TX state lock bit(s) in separate registers, but we don't consider locking those output for a selected GPOs. my points is even w/o these two cls, when we have marked any PAD as lock config, we won't be able to change the PAD configuration post FSP_S, unless we are in SMM. I don't follow what value this CL is bringing? -- To view, visit https://review.coreboot.org/c/coreboot/+/84901?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iabe4e4b1d282a5f6cae8f330100c9139e0c2691d Gerrit-Change-Number: 84901 Gerrit-PatchSet: 3 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Wed, 30 Oct 2024 18:00:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Cliff Huang <cliff.huang(a)intel.com> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

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[S] Change in coreboot[main]: soc/intel/common/gpio: add function to lock GPIO configuration
by Cliff Huang (Code Review) 30 Oct '24

30 Oct '24

Attention is currently required from: Bora Guvendik, Jérémy Compostella, Pranava Y N, Subrata Banik. Cliff Huang has posted comments on this change by Cliff Huang. ( https://review.coreboot.org/c/coreboot/+/84901?usp=email ) Change subject: soc/intel/common/gpio: add function to lock GPIO configuration ...................................................................... Patch Set 3: (1 comment) File src/soc/intel/common/block/gpio/gpio.c: https://review.coreboot.org/c/coreboot/+/84901/comment/c77da5f6_ceed937e?us… : PS3, Line 485: /* Clear lock for the exception PADs */ > > Yes. that is the intention. This function only updates the base table lock_action field. […] Locked pads still function as it is configured, just that we won't be able to change the configuration afterwards (i.e. dp & OS). There is also TX state lock bit(s) in separate registers, but we don't consider locking those output for a selected GPOs. -- To view, visit https://review.coreboot.org/c/coreboot/+/84901?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iabe4e4b1d282a5f6cae8f330100c9139e0c2691d Gerrit-Change-Number: 84901 Gerrit-PatchSet: 3 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Wed, 30 Oct 2024 17:52:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Cliff Huang <cliff.huang(a)intel.com> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

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[S] Change in coreboot[main]: soc/intel/common/gpio: add function to lock GPIO configuration
by Subrata Banik (Code Review) 30 Oct '24

30 Oct '24

Attention is currently required from: Bora Guvendik, Cliff Huang, Jérémy Compostella, Pranava Y N. Subrata Banik has posted comments on this change by Cliff Huang. ( https://review.coreboot.org/c/coreboot/+/84901?usp=email ) Change subject: soc/intel/common/gpio: add function to lock GPIO configuration ...................................................................... Patch Set 3: (1 comment) File src/soc/intel/common/block/gpio/gpio.c: https://review.coreboot.org/c/coreboot/+/84901/comment/e6c52f1f_15030080?us… : PS3, Line 485: /* Clear lock for the exception PADs */ > Yes. that is the intention. This function only updates the base table lock_action field. After the base table is overridden via fw_config for the final configuration in the mainboard.c, we perform configuration lock. Currently, this function is called to add the lock property to the table before we actually write to GPIO config registers prior to calling FSP-S. We could defer locking after FSP-S exit. The lock configuration bits are located in different registers other than the individual DW0/1 registers and we update those lock bits according to this GPIO base table. isn't that is even the case today for GPIO PADs with lock_config ? noone would be able to update those GPIO PADs if marked as lock enabled ? -- To view, visit https://review.coreboot.org/c/coreboot/+/84901?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iabe4e4b1d282a5f6cae8f330100c9139e0c2691d Gerrit-Change-Number: 84901 Gerrit-PatchSet: 3 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Wed, 30 Oct 2024 17:25:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Cliff Huang <cliff.huang(a)intel.com> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

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[S] Change in coreboot[main]: mb/google/fatcat: Apply GPIO configuration lock
by Cliff Huang (Code Review) 30 Oct '24

30 Oct '24

Attention is currently required from: Bora Guvendik, Jérémy Compostella, Pranava Y N, Subrata Banik, Wonkyu Kim. Cliff Huang has posted comments on this change by Cliff Huang. ( https://review.coreboot.org/c/coreboot/+/84902?usp=email ) Change subject: mb/google/fatcat: Apply GPIO configuration lock ...................................................................... Patch Set 3: (2 comments) This change is ready for review. Patchset: PS3: > why we have to lock all the GPIO PADs? what if we have a GPO ? […] Only configuration is locked. the TX states is not. File src/mainboard/google/fatcat/variants/fatcat/gpio.c: https://review.coreboot.org/c/coreboot/+/84902/comment/ec50d2d8_fb9361e6?us… : PS3, Line 404: static const gpio_t gpio_lock_exception_table[] = { > i'm unable to follow what all PAD configuration should reside here ? This exception list for not locking is empty for now as we haven't identified the pads that OS driver or ACPI need to modify the configuration currently. -- To view, visit https://review.coreboot.org/c/coreboot/+/84902?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Icc991910b9d3f2dae4b1a07bcf16ad7ac4bc61ca Gerrit-Change-Number: 84902 Gerrit-PatchSet: 3 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Wed, 30 Oct 2024 17:13:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

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coreboot-gerrit October 2024