coreboot-gerrit October 2024

coreboot-gerrit@coreboot.org

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[XS] Change in coreboot[main]: mb/google/dedede/var/awasuki: Tune I2C touchpad for freq and TH
by Paul Menzel (Code Review) 31 Oct '24

31 Oct '24

Attention is currently required from: hualin wei. Paul Menzel has posted comments on this change by hualin wei. ( https://review.coreboot.org/c/coreboot/+/84898?usp=email ) Change subject: mb/google/dedede/var/awasuki: Tune I2C touchpad for freq and TH ...................................................................... Patch Set 10: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/84898?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5ccaa3a669e18319311de14833966410c7adf40d Gerrit-Change-Number: 84898 Gerrit-PatchSet: 10 Gerrit-Owner: hualin wei <weihualin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: hualin wei <weihualin(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Thu, 31 Oct 2024 11:10:03 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: mb/google/dedede/var/awasuki: Tune I2C touchpad for freq and TH
by hualin wei (Code Review) 31 Oct '24

31 Oct '24

Attention is currently required from: Paul Menzel. hualin wei has posted comments on this change by hualin wei. ( https://review.coreboot.org/c/coreboot/+/84898?usp=email ) Change subject: mb/google/dedede/var/awasuki: Tune I2C touchpad for freq and TH ...................................................................... Patch Set 10: (1 comment) File src/mainboard/google/dedede/variants/awasuki/overridetree.cb: https://review.coreboot.org/c/coreboot/+/84898/comment/3e161d8a_3bad2c27?us… : PS10, Line 32: .speed = I2C_SPEED_FAST, : .speed_config[0] = { : .speed = I2C_SPEED_FAST, > By the way, does `. […] Yes, .speed need to be set twice. -- To view, visit https://review.coreboot.org/c/coreboot/+/84898?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5ccaa3a669e18319311de14833966410c7adf40d Gerrit-Change-Number: 84898 Gerrit-PatchSet: 10 Gerrit-Owner: hualin wei <weihualin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Thu, 31 Oct 2024 11:08:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>

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[XS] Change in coreboot[main]: mb/google/dedede/var/awasuki: Tune I2C touchpad for freq and TH
by Paul Menzel (Code Review) 31 Oct '24

31 Oct '24

Attention is currently required from: Hualin Wei. Paul Menzel has posted comments on this change by Hualin Wei. ( https://review.coreboot.org/c/coreboot/+/84898?usp=email ) The change is no longer submittable: All-Comments-Resolved is unsatisfied now. Change subject: mb/google/dedede/var/awasuki: Tune I2C touchpad for freq and TH ...................................................................... Patch Set 10: (1 comment) File src/mainboard/google/dedede/variants/awasuki/overridetree.cb: https://review.coreboot.org/c/coreboot/+/84898/comment/c03b8dd0_8d7deb6d?us… : PS10, Line 32: .speed = I2C_SPEED_FAST, : .speed_config[0] = { : .speed = I2C_SPEED_FAST, By the way, does `.speed` need to be set twice? -- To view, visit https://review.coreboot.org/c/coreboot/+/84898?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5ccaa3a669e18319311de14833966410c7adf40d Gerrit-Change-Number: 84898 Gerrit-PatchSet: 10 Gerrit-Owner: Hualin Wei <weihualin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hualin Wei <weihualin(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Thu, 31 Oct 2024 10:44:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: mb/google/dedede/var/awasuki: Tune I2C touchpad for freq and TH
by Hualin Wei (Code Review) 31 Oct '24

31 Oct '24

Attention is currently required from: Paul Menzel. Hualin Wei has posted comments on this change by Hualin Wei. ( https://review.coreboot.org/c/coreboot/+/84898?usp=email ) Change subject: mb/google/dedede/var/awasuki: Tune I2C touchpad for freq and TH ...................................................................... Patch Set 10: (4 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/84898/comment/8d147552_cc71034a?us… : PS6, Line 4: hualin wei > Please update your Gerrit settings to also use Wei Hualin. […] Done https://review.coreboot.org/c/coreboot/+/84898/comment/e18d10cf_5663f45a?us… : PS6, Line 7: Modify parameters of touchpad I2C > Maybe: […] We have made changes to prevent exceeding 72 characters. https://review.coreboot.org/c/coreboot/+/84898/comment/02a79063_1f70b0b9?us… : PS6, Line 11: time of high(TH) > Please add a space before the (. Done File src/mainboard/google/dedede/variants/awasuki/overridetree.cb: https://review.coreboot.org/c/coreboot/+/84898/comment/356d319b_3f4a7488?us… : PS6, Line 34: .speed = I2C_SPEED_FAST, : .scl_lcnt = 178, : .scl_hcnt = 92, : .sda_hold = 40, > Which of the four values did you have to edit for the frequency and which for time of high? We need to use speed, scl_lcnt and scl_hcnt to adjust the frequency, and scl_lcnt and scl_hcnt to adjust the TH. And sda_hold should be greater than 30. -- To view, visit https://review.coreboot.org/c/coreboot/+/84898?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5ccaa3a669e18319311de14833966410c7adf40d Gerrit-Change-Number: 84898 Gerrit-PatchSet: 10 Gerrit-Owner: Hualin Wei <weihualin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Thu, 31 Oct 2024 09:23:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>

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[XS] Change in coreboot[main]: soc/intel/jasperlake: add support for RP LTR mechanism
by Paul Menzel (Code Review) 31 Oct '24

31 Oct '24

Attention is currently required from: Curtis Chen, David Ruth, Jamie Chen, Lawrence Chang, Nick Vaccaro, Simon Yang. Paul Menzel has posted comments on this change by Lawrence Chang. ( https://review.coreboot.org/c/coreboot/+/84866?usp=email ) The change is no longer submittable: All-Comments-Resolved is unsatisfied now. Change subject: soc/intel/jasperlake: add support for RP LTR mechanism ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/84866/comment/1eaf7e2b_9ee8bb85?us… : PS3, Line 13: Tested on Awasuki with RTL8852BE How to check this exactly? coreboot logs or `lspci`? -- To view, visit https://review.coreboot.org/c/coreboot/+/84866?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I85e50b01cc9fb5522d457cfce3700b7c85d7012f Gerrit-Change-Number: 84866 Gerrit-PatchSet: 3 Gerrit-Owner: Lawrence Chang <lawrence.chang(a)intel.com> Gerrit-Reviewer: Curtis Chen <curtis.chen(a)intel.com> Gerrit-Reviewer: David Ruth <druth(a)chromium.org> Gerrit-Reviewer: David Ruth <druth(a)google.com> Gerrit-Reviewer: Jamie Chen <jamie.chen(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Simon Yang <simon1.yang(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jamie Chen <jamie.chen(a)intel.com> Gerrit-Attention: Simon Yang <simon1.yang(a)intel.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: David Ruth <druth(a)google.com> Gerrit-Attention: Curtis Chen <curtis.chen(a)intel.com> Gerrit-Attention: Lawrence Chang <lawrence.chang(a)intel.com> Gerrit-Comment-Date: Thu, 31 Oct 2024 08:00:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: soc/intel/common/gpio: add function to lock GPIO configuration
by Subrata Banik (Code Review) 31 Oct '24

31 Oct '24

Attention is currently required from: Bora Guvendik, Cliff Huang, Jérémy Compostella, Pranava Y N. Subrata Banik has posted comments on this change by Cliff Huang. ( https://review.coreboot.org/c/coreboot/+/84901?usp=email ) Change subject: soc/intel/common/gpio: add function to lock GPIO configuration ...................................................................... Patch Set 3: (1 comment) File src/soc/intel/common/block/gpio/gpio.c: https://review.coreboot.org/c/coreboot/+/84901/comment/251d5040_8904ed20?us… : PS3, Line 485: /* Clear lock for the exception PADs */ > The thing is that we don't enable lock in our MB gpio.c and fw_config.c for pretty much all GPIOs today, In particularly, those configuration are generated from HW mapping document where lock decision are not determined and provided. We either manually replaced with lock macros for each of PAD in the ramstage table or fw_config.c or we could use this new function to add lock prior to writing to the registers. IMO, gpio.c with LOCK config is better option rather maintaining two different source of truth to update the same GPIO configuration. Can you please create a TODO task to apply the LOCK config, we can start with N-1 platform aka Rex and try to apply the lock config for similar functional GPIOs. -- To view, visit https://review.coreboot.org/c/coreboot/+/84901?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iabe4e4b1d282a5f6cae8f330100c9139e0c2691d Gerrit-Change-Number: 84901 Gerrit-PatchSet: 3 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Thu, 31 Oct 2024 07:58:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Cliff Huang <cliff.huang(a)intel.com> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

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[XS] Change in coreboot[main]: soc/intel/jasperlake: add support for RP LTR mechanism
by Subrata Banik (Code Review) 31 Oct '24

31 Oct '24

Attention is currently required from: Curtis Chen, David Ruth, Jamie Chen, Lawrence Chang, Nick Vaccaro, Simon Yang. Subrata Banik has posted comments on this change by Lawrence Chang. ( https://review.coreboot.org/c/coreboot/+/84866?usp=email ) Change subject: soc/intel/jasperlake: add support for RP LTR mechanism ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84866?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I85e50b01cc9fb5522d457cfce3700b7c85d7012f Gerrit-Change-Number: 84866 Gerrit-PatchSet: 3 Gerrit-Owner: Lawrence Chang <lawrence.chang(a)intel.com> Gerrit-Reviewer: Curtis Chen <curtis.chen(a)intel.com> Gerrit-Reviewer: David Ruth <druth(a)chromium.org> Gerrit-Reviewer: David Ruth <druth(a)google.com> Gerrit-Reviewer: Jamie Chen <jamie.chen(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Simon Yang <simon1.yang(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jamie Chen <jamie.chen(a)intel.com> Gerrit-Attention: Simon Yang <simon1.yang(a)intel.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: David Ruth <druth(a)google.com> Gerrit-Attention: Curtis Chen <curtis.chen(a)intel.com> Gerrit-Attention: Lawrence Chang <lawrence.chang(a)intel.com> Gerrit-Comment-Date: Thu, 31 Oct 2024 07:56:24 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: mb/google/dedede/var/awasuki: Modify parameters of touchpad I2C
by Paul Menzel (Code Review) 31 Oct '24

31 Oct '24

Attention is currently required from: hualin wei. Paul Menzel has posted comments on this change by hualin wei. ( https://review.coreboot.org/c/coreboot/+/84898?usp=email ) The change is no longer submittable: All-Comments-Resolved is unsatisfied now. Change subject: mb/google/dedede/var/awasuki: Modify parameters of touchpad I2C ...................................................................... Patch Set 6: (4 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/84898/comment/2e13e463_57b6181f?us… : PS6, Line 4: hualin wei Please update your Gerrit settings to also use Wei Hualin. (The surname should go second, no idea, which is which.) https://review.coreboot.org/c/coreboot/+/84898/comment/069362fd_68ea6648?us… : PS6, Line 7: Modify parameters of touchpad I2C Maybe: > Tune I2C touchpad for freq < 400 kHz and TH > 600 ns https://review.coreboot.org/c/coreboot/+/84898/comment/b9b46d95_6c4dfb40?us… : PS6, Line 11: time of high(TH) Please add a space before the (. File src/mainboard/google/dedede/variants/awasuki/overridetree.cb: https://review.coreboot.org/c/coreboot/+/84898/comment/d575c096_1b492220?us… : PS6, Line 34: .speed = I2C_SPEED_FAST, : .scl_lcnt = 178, : .scl_hcnt = 92, : .sda_hold = 40, Which of the four values did you have to edit for the frequency and which for time of high? -- To view, visit https://review.coreboot.org/c/coreboot/+/84898?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5ccaa3a669e18319311de14833966410c7adf40d Gerrit-Change-Number: 84898 Gerrit-PatchSet: 6 Gerrit-Owner: hualin wei <weihualin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: hualin wei <weihualin(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Thu, 31 Oct 2024 07:45:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: Makefile.mk: Remove Wno-packed-not-aligned flag
by Elyes Haouas (Code Review) 31 Oct '24

31 Oct '24

Attention is currently required from: Felix Singer, Martin L Roth, Paul Menzel. Hello Martin L Roth, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84562?usp=email to look at the new patch set (#9). Change subject: Makefile.mk: Remove Wno-packed-not-aligned flag ...................................................................... Makefile.mk: Remove Wno-packed-not-aligned flag commit 035ee6a6 (Makefile.inc: disable warnings on unaligned struct members) added Wno-packed-not-aligned to silent GCC warning. Now, this GCC's flag is not needed anymore. Change-Id: I8759603ff7b2c75e4a863a25c796781544be14ed Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M Makefile.mk 1 file changed, 0 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/84562/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/84562?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8759603ff7b2c75e4a863a25c796781544be14ed Gerrit-Change-Number: 84562 Gerrit-PatchSet: 9 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org>

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[M] Change in coreboot[main]: mb/google/nissa/var/teliks: Match VBT with SSFC
by Eric Lai (Code Review) 31 Oct '24

31 Oct '24

Eric Lai has submitted this change. ( https://review.coreboot.org/c/coreboot/+/84871?usp=email ) ( 15 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: mb/google/nissa/var/teliks: Match VBT with SSFC ...................................................................... mb/google/nissa/var/teliks: Match VBT with SSFC We want to configure different VBT timings for panels of different sizes and distinguish them through SSFC. We select the reserved bit 6 of SSFC as the flag bit. When using a 12-inch panel, set this bit to 0; when using an 11-inch panel, set this bit to 1. Without splitting, the platform_BootPerf test will fail. BUG=b:374428465 TEST= 1. can match VBT with SSFC -When SSFC is set to 0x40: $ cat /sys/firmware/log | grep vbt Bit 6 of SSFC is 1, use vbt-teliks_panel_11_inch.bin CBFS: Found 'vbt-teliks_panel_11_inch.bin' @0x1c6140 size 0x50f in mcache @0x76adda14 -When SSFC is set to 0x0: $ cat /sys/firmware/log | grep vbt Bit 6 of SSFC is 0, use vbt-teliks.bin CBFS: Found 'vbt-teliks.bin' @0x1c5bc0 size 0x50e in mcache @0x76add9b0 2. can pass platform_BootPerf test The platform_BootPerf time measured for all SKUs is less than 1.55s. Change-Id: Ia8fb45aede5ead4826d983760506c366a70643ee Signed-off-by: Qinghong Zeng <zengqinghong(a)huaqin.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84871 Reviewed-by: Paul Menzel <paulepanter(a)mailbox.org> Reviewed-by: Eric Lai <ericllai(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Jianeng Ceng <cengjianeng(a)huaqin.corp-partner.google.com> Reviewed-by: Subrata Banik <subratabanik(a)google.com> --- M src/mainboard/google/brya/variants/teliks/variant.c 1 file changed, 58 insertions(+), 0 deletions(-) Approvals: Jianeng Ceng: Looks good to me, but someone else must approve Paul Menzel: Looks good to me, but someone else must approve Subrata Banik: Looks good to me, approved Eric Lai: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/mainboard/google/brya/variants/teliks/variant.c b/src/mainboard/google/brya/variants/teliks/variant.c index 7e0f02d..7da0043 100644 --- a/src/mainboard/google/brya/variants/teliks/variant.c +++ b/src/mainboard/google/brya/variants/teliks/variant.c @@ -6,6 +6,9 @@ #include <sar.h> #include <soc/gpio_soc_defs.h> #include <intelblocks/graphics.h> +#include <drivers/intel/gma/opregion.h> +#include <console/console.h> +#include <ec/google/chromeec/ec.h> /* Per-pipe DDI Function Control 2 */ #define TRANS_DDI_FUNC_CTL2_A 0x60404 @@ -55,3 +58,58 @@ graphics_gtt_rmw(TRANS_DDI_FUNC_CTL2_A, ~TRANS_DDI_AUDIO_MUTE_OVERRIDE_BITS_FIELDS, TRANS_DDI_AUDIO_MUTE_OVERRIDE_BITS_FIELDS); } + +static int get_ssfc(uint32_t *val) +{ + static uint32_t known_value; + static enum { + SSFC_NOT_READ, + SSFC_AVAILABLE, + } ssfc_state = SSFC_NOT_READ; + + if (ssfc_state == SSFC_AVAILABLE) { + *val = known_value; + return 0; + } + + /* + * If SSFC field is not in the CBI then the value of SSFC will be 0 for + * further processing later since 0 of each bits group means default + * component in a variant. For more detail, please refer to cbi_ssfc.h. + */ + if (google_chromeec_cbi_get_ssfc(&known_value) != 0) { + printk(BIOS_DEBUG, "SSFC not set in CBI\n"); + return -1; + } + + ssfc_state = SSFC_AVAILABLE; + *val = known_value; + printk(BIOS_INFO, "SSFC 0x%x.\n", known_value); + return 0; +} + +const char *mainboard_vbt_filename(void) +{ + uint32_t ssfc; + if (get_ssfc(&ssfc)) { + printk(BIOS_INFO, "Failed to read SSFC, using default vbt-teliks.bin\n"); + return "vbt-teliks.bin"; + } + + /* + * Determine if the panel is 11 inches based on the SSFC register. + * + * Bit 6 of the SSFC register indicates the panel size: + * 0: 12.2 inch panel + * 1: 11.6 inch panel + */ + bool is_panel_11_inch = (ssfc >> 6) & 0x1; + + if (is_panel_11_inch) { + printk(BIOS_INFO, "Bit 6 of SSFC is 1, use vbt-teliks_panel_11_inch.bin\n"); + return "vbt-teliks_panel_11_inch.bin"; + } + + printk(BIOS_INFO, "Bit 6 of SSFC is 0, use vbt-teliks.bin\n"); + return "vbt-teliks.bin"; +} -- To view, visit https://review.coreboot.org/c/coreboot/+/84871?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia8fb45aede5ead4826d983760506c366a70643ee Gerrit-Change-Number: 84871 Gerrit-PatchSet: 17 Gerrit-Owner: Qinghong Zeng <zengqinghong(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Jianeng Ceng <cengjianeng(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Derek Huang <derekhuang(a)google.com> Gerrit-CC: Dolan Liu <liuyong5(a)huaqin.corp-partner.google.com> Gerrit-CC: Edward Dai <edwarddai(a)google.com> Gerrit-CC: Ricky Chang <rickytlchang(a)google.com>

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coreboot-gerrit October 2024