Tony Huang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/80156?usp=email )
Change subject: mb/google/rex/variants/deku: update USB-C port configuration
......................................................................
mb/google/rex/variants/deku: update USB-C port configuration
This CL update setting according to schematic v0.4.
BUG=b:320201111
BRANCH=firmware-rex-15709.B
TEST=Built FW image correctly.
Change-Id: Ia4570d26ee9fd175ed9099bd057cee3c30c95704
Signed-off-by: Tony Huang <tony-huang(a)quanta.corp-partner.google.com>
---
M src/mainboard/google/rex/variants/deku/overridetree.cb
1 file changed, 5 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/80156/1
diff --git a/src/mainboard/google/rex/variants/deku/overridetree.cb b/src/mainboard/google/rex/variants/deku/overridetree.cb
index 9c35338..711d3b6 100644
--- a/src/mainboard/google/rex/variants/deku/overridetree.cb
+++ b/src/mainboard/google/rex/variants/deku/overridetree.cb
@@ -117,21 +117,21 @@
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(BACK, RIGHT, ACPI_PLD_GROUP(2, 1))"
- device ref tcss_usb3_port1 on end
+ device ref tcss_usb3_port2 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C2""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(BACK, CENTER, ACPI_PLD_GROUP(3, 1))"
- device ref tcss_usb3_port2 on end
+ device ref tcss_usb3_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C3""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(FRONT, LEFT, ACPI_PLD_GROUP(4, 1))"
- device ref tcss_usb3_port2 on end
+ device ref tcss_usb3_port3 on end
end
end
end
@@ -156,7 +156,7 @@
end
chip drivers/intel/usb4/retimer
register "dfp[1].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B22)"
- use tcss_usb3_port3 as dfp[0].typec_port
+ use tcss_usb3_port3 as dfp[1].typec_port
device generic 0 on end
end
end
@@ -298,7 +298,7 @@
chip drivers/intel/pmc_mux/conn
#USB2_C3
use usb2_port5 as usb2_port
- use tcss_usb3_port1 as usb3_port
+ use tcss_usb3_port3 as usb3_port
device generic 3 alias conn3 on end
end
end
--
To view, visit https://review.coreboot.org/c/coreboot/+/80156?usp=email
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: Ia4570d26ee9fd175ed9099bd057cee3c30c95704
Gerrit-Change-Number: 80156
Gerrit-PatchSet: 1
Gerrit-Owner: Tony Huang <tony-huang(a)quanta.corp-partner.google.com>
Gerrit-MessageType: newchange
Aryan Arora has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/80185?usp=email )
Change subject: src/device/oprom/include/x86emu/regs.h: Fix checkpatch errors Add space after keywords, scope with a do-while loop for a multiline macro and split a single line if-else to multiline.
......................................................................
src/device/oprom/include/x86emu/regs.h: Fix checkpatch errors
Add space after keywords, scope with a do-while loop for a multiline macro
and split a single line if-else to multiline.
Change-Id: Ia66aed706469c9f077a1d5eb6b4af662341c913c
Signed-off-by: Aryan Arora <aryanarora.w1(a)gmail.com>
---
M src/device/oprom/include/x86emu/regs.h
1 file changed, 7 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/80185/1
diff --git a/src/device/oprom/include/x86emu/regs.h b/src/device/oprom/include/x86emu/regs.h
index 52f599d..dd3ffaa 100644
--- a/src/device/oprom/include/x86emu/regs.h
+++ b/src/device/oprom/include/x86emu/regs.h
@@ -206,8 +206,13 @@
#define ACCESS_FLAG(flag) (M.x86.R_FLG & (flag))
#define CLEARALL_FLAG(m) (M.x86.R_FLG = 0)
-#define CONDITIONAL_SET_FLAG(COND,FLAG) \
- if (COND) SET_FLAG(FLAG); else CLEAR_FLAG(FLAG)
+#define CONDITIONAL_SET_FLAG(COND, FLAG) \
+ do { \
+ if (COND) \
+ SET_FLAG(FLAG); \
+ else \
+ CLEAR_FLAG(FLAG) \
+ } while (0)
#define F_PF_CALC 0x010000 /* PARITY flag has been calced */
#define F_ZF_CALC 0x020000 /* ZERO flag has been calced */
--
To view, visit https://review.coreboot.org/c/coreboot/+/80185?usp=email
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: Ia66aed706469c9f077a1d5eb6b4af662341c913c
Gerrit-Change-Number: 80185
Gerrit-PatchSet: 1
Gerrit-Owner: Aryan Arora <aryanarora.w1(a)gmail.com>
Gerrit-MessageType: newchange
Attention is currently required from: Julius Werner.
Maximilian Brune has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80184?usp=email )
Change subject: arch/arm64/armv8: Add exception output without printk
......................................................................
Patch Set 1:
(1 comment)
File src/arch/arm64/armv8/exception.c:
https://review.coreboot.org/c/coreboot/+/80184/comment/dfb5074c_e43ce94b :
PS1, Line 113: if (idx < 10)
: __uart_tx_byte('0' + (char)idx);
: else if (idx < 16)
: __uart_tx_byte('A' - 10 + (char)idx);
: __uart_tx_byte('!');
: UART_DIRECT_PRINT(raw_read_esr(), 32)
: __uart_tx_byte('!');
I may overdid it a bit with this output, so I am open to leave it out if others think it is too much.
But for me personally it really helped when printk didn't work and I got exceptions.
--
To view, visit https://review.coreboot.org/c/coreboot/+/80184?usp=email
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I2f858730469fff3cae120fd7c32fec53b3d309ca
Gerrit-Change-Number: 80184
Gerrit-PatchSet: 1
Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com>
Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org>
Gerrit-Attention: Julius Werner <jwerner(a)chromium.org>
Gerrit-Comment-Date: Wed, 24 Jan 2024 06:51:38 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Gerrit-MessageType: comment
Maximilian Brune has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/80184?usp=email )
Change subject: arch/arm64/armv8: Add exception output without printk
......................................................................
arch/arm64/armv8: Add exception output without printk
In case printk does not work the current exception handler will print a
simple "!" to notify the developer that coreboot is actually there but
something went wrong.
The "!" can be quite confusing when it actually happens that printk does
not work. Since "!" doesn't really say much (if you don't know the
exception arm64 code) the developer (like me) can easily assume that
something went wrong while configuring clocks or baud rate of UART,
since the output seemingly does not seem to make sense.
This adds a little bit more output to assure the developer that what was
printed was actually intended to be printed. Therefore it prints "FAIL"
which assures the developer that this was intended output. It also adds
a comment above so that developer can more easily grep for this message.
Signed-off-by: Maximilian Brune <maximilian.brune(a)9elements.com>
Change-Id: I2f858730469fff3cae120fd7c32fec53b3d309ca
---
M src/arch/arm64/armv8/exception.c
M src/arch/arm64/include/armv8/arch/exception.h
2 files changed, 30 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/80184/1
diff --git a/src/arch/arm64/armv8/exception.c b/src/arch/arm64/armv8/exception.c
index 15d7e38..220a1d7 100644
--- a/src/arch/arm64/armv8/exception.c
+++ b/src/arch/arm64/armv8/exception.c
@@ -101,10 +101,22 @@
static void print_exception_info(struct exc_state *state, uint64_t idx)
{
- /* Poor man's sign of life in case printk() is shot. */
+ // Sign of life in case printk() is shot. Prints !FAIL!idx!esr_register! to UART
__uart_tx_byte('\r');
__uart_tx_byte('\n');
__uart_tx_byte('!');
+ __uart_tx_byte('F');
+ __uart_tx_byte('A');
+ __uart_tx_byte('I');
+ __uart_tx_byte('L');
+ __uart_tx_byte('!');
+ if (idx < 10)
+ __uart_tx_byte('0' + (char)idx);
+ else if (idx < 16)
+ __uart_tx_byte('A' - 10 + (char)idx);
+ __uart_tx_byte('!');
+ UART_DIRECT_PRINT(raw_read_esr(), 32)
+ __uart_tx_byte('!');
printk(BIOS_DEBUG, "\nexception %s\n",
idx < NUM_EXC_VIDS ? exception_names[idx] : "_unknown");
diff --git a/src/arch/arm64/include/armv8/arch/exception.h b/src/arch/arm64/include/armv8/arch/exception.h
index 2c5b7f9..9eac768 100644
--- a/src/arch/arm64/include/armv8/arch/exception.h
+++ b/src/arch/arm64/include/armv8/arch/exception.h
@@ -6,6 +6,23 @@
#include <arch/transition.h>
#include <types.h>
+/*
+ * Directly prints to the UART interface.
+ * data: number to be printed
+ * bits: size of data in bits
+ * Example usage:
+ * void *stack_pointer = (void *)0x0123456789ABCDEF
+ * UART_DIRECT_PRINT((unsigned long)stack_pointer)
+ */
+#define UART_DIRECT_PRINT(data, bits) \
+ for (int i = bits - 4; i >= 0; i -= 4) { \
+ int nibble = (data >> i) & 15; \
+ if (nibble < 10) \
+ __uart_tx_byte('0' + nibble); \
+ else \
+ __uart_tx_byte('A' - 10 + nibble); \
+ }
+
/* Initialize the exception handling on the current CPU. */
void exception_init(void);
--
To view, visit https://review.coreboot.org/c/coreboot/+/80184?usp=email
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I2f858730469fff3cae120fd7c32fec53b3d309ca
Gerrit-Change-Number: 80184
Gerrit-PatchSet: 1
Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com>
Gerrit-MessageType: newchange
Tony Huang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/80155?usp=email )
Change subject: mb/google/rex/variants/deku: update USB-C port configuration
......................................................................
mb/google/rex/variants/deku: update USB-C port configuration
This CL update setting according to schematic v0.4.
BUG=b:320201111
BRANCH=firmware-rex-15709.B
TEST=Built FW image correctly.
Change-Id: I47077d1947aa26d9f2abb6598408a8e4e3ddc925
Signed-off-by: Tony Huang <tony-huang(a)quanta.corp-partner.google.com>
---
M src/mainboard/google/rex/variants/deku/overridetree.cb
1 file changed, 5 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/80155/1
diff --git a/src/mainboard/google/rex/variants/deku/overridetree.cb b/src/mainboard/google/rex/variants/deku/overridetree.cb
index 9c35338..711d3b6 100644
--- a/src/mainboard/google/rex/variants/deku/overridetree.cb
+++ b/src/mainboard/google/rex/variants/deku/overridetree.cb
@@ -117,21 +117,21 @@
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(BACK, RIGHT, ACPI_PLD_GROUP(2, 1))"
- device ref tcss_usb3_port1 on end
+ device ref tcss_usb3_port2 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C2""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(BACK, CENTER, ACPI_PLD_GROUP(3, 1))"
- device ref tcss_usb3_port2 on end
+ device ref tcss_usb3_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C3""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(FRONT, LEFT, ACPI_PLD_GROUP(4, 1))"
- device ref tcss_usb3_port2 on end
+ device ref tcss_usb3_port3 on end
end
end
end
@@ -156,7 +156,7 @@
end
chip drivers/intel/usb4/retimer
register "dfp[1].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B22)"
- use tcss_usb3_port3 as dfp[0].typec_port
+ use tcss_usb3_port3 as dfp[1].typec_port
device generic 0 on end
end
end
@@ -298,7 +298,7 @@
chip drivers/intel/pmc_mux/conn
#USB2_C3
use usb2_port5 as usb2_port
- use tcss_usb3_port1 as usb3_port
+ use tcss_usb3_port3 as usb3_port
device generic 3 alias conn3 on end
end
end
--
To view, visit https://review.coreboot.org/c/coreboot/+/80155?usp=email
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I47077d1947aa26d9f2abb6598408a8e4e3ddc925
Gerrit-Change-Number: 80155
Gerrit-PatchSet: 1
Gerrit-Owner: Tony Huang <tony-huang(a)quanta.corp-partner.google.com>
Gerrit-MessageType: newchange
Attention is currently required from: Derek Huang, Eric Lai, Kapil Porwal, Nick Vaccaro, Subrata Banik.
Jamie Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80152?usp=email )
Change subject: mb/google/brya/var/omniknight: Add WIFI SAR table
......................................................................
Patch Set 9:
(1 comment)
File src/mainboard/google/brya/variants/omnigul/variant.c:
https://review.coreboot.org/c/coreboot/+/80152/comment/841d3d7c_513a79e7 :
PS8, Line 8: if (fw_config_probe(FW_CONFIG(WIFI_SAR_TABLE, OMNIGUL_WIFI_SAR_0)))
> You can use get_wifi_sar_fw_config_filename
Done
--
To view, visit https://review.coreboot.org/c/coreboot/+/80152?usp=email
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I70e79577612b3d5c4dc0f92211f87cbea0532d5d
Gerrit-Change-Number: 80152
Gerrit-PatchSet: 9
Gerrit-Owner: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com>
Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com>
Gerrit-Reviewer: Eric Lai <ericllai(a)google.com>
Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com>
Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org>
Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com>
Gerrit-CC: Ian Feng <ian_feng(a)compal.corp-partner.google.com>
Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com>
Gerrit-Attention: Eric Lai <ericllai(a)google.com>
Gerrit-Attention: Subrata Banik <subratabanik(a)google.com>
Gerrit-Attention: Derek Huang <derekhuang(a)google.com>
Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com>
Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org>
Gerrit-Comment-Date: Wed, 24 Jan 2024 06:22:54 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: Eric Lai <ericllai(a)google.com>
Gerrit-MessageType: comment
Tony Huang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/80154?usp=email )
Change subject: mb/google/rex/variants/deku: update USB-C port configuration
......................................................................
mb/google/rex/variants/deku: update USB-C port configuration
This CL update setting according to schematic v0.4.
BUG=b:320201111
BRANCH=firmware-rex-15709.B
TEST=Built FW image correctly.
Change-Id: I2c1e1cbd71d451d5c909561e8bcb09f954fecad9
Signed-off-by: Tony Huang <tony-huang(a)quanta.corp-partner.google.com>
---
M src/mainboard/google/rex/variants/deku/overridetree.cb
1 file changed, 5 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/80154/1
diff --git a/src/mainboard/google/rex/variants/deku/overridetree.cb b/src/mainboard/google/rex/variants/deku/overridetree.cb
index 9c35338..711d3b6 100644
--- a/src/mainboard/google/rex/variants/deku/overridetree.cb
+++ b/src/mainboard/google/rex/variants/deku/overridetree.cb
@@ -117,21 +117,21 @@
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(BACK, RIGHT, ACPI_PLD_GROUP(2, 1))"
- device ref tcss_usb3_port1 on end
+ device ref tcss_usb3_port2 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C2""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(BACK, CENTER, ACPI_PLD_GROUP(3, 1))"
- device ref tcss_usb3_port2 on end
+ device ref tcss_usb3_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C3""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(FRONT, LEFT, ACPI_PLD_GROUP(4, 1))"
- device ref tcss_usb3_port2 on end
+ device ref tcss_usb3_port3 on end
end
end
end
@@ -156,7 +156,7 @@
end
chip drivers/intel/usb4/retimer
register "dfp[1].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B22)"
- use tcss_usb3_port3 as dfp[0].typec_port
+ use tcss_usb3_port3 as dfp[1].typec_port
device generic 0 on end
end
end
@@ -298,7 +298,7 @@
chip drivers/intel/pmc_mux/conn
#USB2_C3
use usb2_port5 as usb2_port
- use tcss_usb3_port1 as usb3_port
+ use tcss_usb3_port3 as usb3_port
device generic 3 alias conn3 on end
end
end
--
To view, visit https://review.coreboot.org/c/coreboot/+/80154?usp=email
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I2c1e1cbd71d451d5c909561e8bcb09f954fecad9
Gerrit-Change-Number: 80154
Gerrit-PatchSet: 1
Gerrit-Owner: Tony Huang <tony-huang(a)quanta.corp-partner.google.com>
Gerrit-MessageType: newchange