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Change subject: device/pciexp_device.c: Fix setting Max Payload Size
......................................................................
Patch Set 4: Code-Review+1
(3 comments)
Patchset:
PS2:
> Implemented your suggested approach, Nico. […]
Thanks, looks good! Only two minor suggestions...
Let's let others have a look.
File src/device/pciexp_device.c:
https://review.coreboot.org/c/coreboot/+/77338/comment/e3fc1a71_9ba9ebdc :
PS4, Line 603: pci_write_config16(dev, pcie_cap + PCI_EXP_DEVCTL, devctl);
We have pci_update_config*() functions now, so this could also be
pci_update_config16(dev, pcie_cap + PCI_EXP_DEVCTL, ~PCI_EVP_DEVCTL_PAYLOAD, max_payload << 5);
https://review.coreboot.org/c/coreboot/+/77338/comment/3a6c3c68_e5782ab0 :
PS4, Line 654: {
As a small optimization we could look up the caps here and pass the
offsets down. pciexp_tune_dev() already knows them and could pass them
to pciexp_configure_max_payload() respectively.
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Change subject: soc/amd/genoa: Add minimal viable code for compilation
......................................................................
Patch Set 8:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/76495/comment/70293db2_a5342f28 :
PS7, Line 9: and mainboard (onyx)
> Sorry - remove this?
Done
File src/soc/amd/genoa/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/76495/comment/c48c0888_518a196b :
PS7, Line 1: ## SPDX-License-Identifier: GPL-2.0-only
> If you wanted to, you could add a blank line after this, but it's not required.
Done
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Change subject: soc/amd/genoa: Add minimal viable code for compilation
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Patch Set 7: Code-Review+2
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Change subject: mb/amd/onyx: Add FMD file and update romsize
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Patch Set 6: Code-Review+2
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Change subject: soc/amd/common: Use CBFSTOOL_ADD_CMD_OPTIONS when adding psp image
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Patch Set 6: Code-Review+2
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Patch Set 1: Code-Review+2
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Change subject: soc/amd/genoa: Add minimal viable code for compilation
......................................................................
Patch Set 7:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/76495/comment/6e041fe7_5b80d2f7 :
PS7, Line 9: and mainboard (onyx)
Sorry - remove this?
File src/soc/amd/genoa/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/76495/comment/51d203bf_0cf1ed83 :
PS7, Line 1: ## SPDX-License-Identifier: GPL-2.0-only
If you wanted to, you could add a blank line after this, but it's not required.
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Patch Set 1: Code-Review+2
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