coreboot-gerrit June 2023

coreboot-gerrit@coreboot.org

1 participants
5387 discussions

[L] Change in coreboot[master]: acpi/acpi.c: Reduce boilerplate
by Arthur Heymans (Code Review) 29 Jun '23

29 Jun '23

Attention is currently required from: Lance Zhao. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76127?usp=email ) Change subject: acpi/acpi.c: Reduce boilerplate ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: Rebased to add SPCR -- To view, visit https://review.coreboot.org/c/coreboot/+/76127?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If4915b8cdfcfdbb34284ea75fa8a0fd23554152d Gerrit-Change-Number: 76127 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Comment-Date: Thu, 29 Jun 2023 07:33:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: mb/google/nissa/var/uldren: Modify DPTF parameters
by Dtrain Hsu (Code Review) 29 Jun '23

29 Jun '23

Attention is currently required from: Shou-Chieh Hsu, Sumeet R Pawnikar, Tarun Tuli. Dtrain Hsu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76105?usp=email ) Change subject: mb/google/nissa/var/uldren: Modify DPTF parameters ...................................................................... Patch Set 1: (1 comment) File src/mainboard/google/brya/variants/uldren/overridetree.cb: https://review.coreboot.org/c/coreboot/+/76105/comment/56df309f_ef65726d : PS1, Line 180: 130 > Hi Sumeet, […] Hi Sumeet, Would you please help to check it? Thank you. -- To view, visit https://review.coreboot.org/c/coreboot/+/76105?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic5bbb3aa3b036a1eae8a95f63b570db2dc6da978 Gerrit-Change-Number: 76105 Gerrit-PatchSet: 1 Gerrit-Owner: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Ivan Chen <yulunchen(a)google.com> Gerrit-Reviewer: Paul Yang <paul.f.yang(a)intel.corp-partner.google.com> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Attention: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Comment-Date: Thu, 29 Jun 2023 07:32:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Comment-In-Reply-To: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-MessageType: comment

1 0

[XS] Change in coreboot[master]: WIP:grunt/vboot: The hash read out are all 0 in in S3 resume
by Paul Menzel (Code Review) 29 Jun '23

29 Jun '23

Attention is currently required from: Bao Zheng, Julius Werner, Yu-Ping Wu, Zheng Bao. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76141?usp=email ) Change subject: WIP:grunt/vboot: The hash read out are all 0 in in S3 resume ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/76141/comment/1acf7783_f0191a07 : PS2, Line 7: The hash read out are all 0 in in S3 resume Please make it a statement about the action. -- To view, visit https://review.coreboot.org/c/coreboot/+/76141?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I48aa8eda74999ecfb95e31c642d332f6e978bd69 Gerrit-Change-Number: 76141 Gerrit-PatchSet: 2 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Zheng Bao Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Thu, 29 Jun 2023 07:30:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

[M] Change in coreboot[master]: vendorcode/amd/fsp/common: Refactor dmi_info.h
by Paul Menzel (Code Review) 29 Jun '23

29 Jun '23

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Konrad Adamczyk, Matt DeVillier, Raul Rangel. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76107?usp=email ) Change subject: vendorcode/amd/fsp/common: Refactor dmi_info.h ...................................................................... Patch Set 2: (1 comment) File src/vendorcode/amd/fsp/common/dmi_info.h: https://review.coreboot.org/c/coreboot/+/76107/comment/106dfbdb_d2aa6776 : PS2, Line 31: * This code was copied from src/vendorcode/amd/pi/00670F00/AGESA.h Why remove the comment, and not extend it? -- To view, visit https://review.coreboot.org/c/coreboot/+/76107?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5e0109af51b78360f7038b20a2975aceb721a7d5 Gerrit-Change-Number: 76107 Gerrit-PatchSet: 2 Gerrit-Owner: Konrad Adamczyk <konrada(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Konrad Adamczyk <konrada(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Konrad Adamczyk <konrada(a)google.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 29 Jun 2023 07:28:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

[XS] Change in coreboot[master]: mb/google/nissa/var/joxer: support for different WiFi SAR tables
by Derek Huang (Code Review) 29 Jun '23

29 Jun '23

Attention is currently required from: Felix Held, Mark Hsieh, Shou-Chieh Hsu, Tarun Tuli. Derek Huang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76144?usp=email ) Change subject: mb/google/nissa/var/joxer: support for different WiFi SAR tables ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/76144?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibea62c77ecad9b2c475452b706779e4cfc6b06d4 Gerrit-Change-Number: 76144 Gerrit-PatchSet: 1 Gerrit-Owner: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anfernee Chen <anfernee_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-CC: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-CC: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Zoey Wu <zoey_wu(a)wistron.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Attention: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 29 Jun 2023 07:05:23 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: mb/siemens/mc_apl5: Correct the Tx signal from SATA port 0
by Mario Scheithauer (Code Review) 29 Jun '23

29 Jun '23

Attention is currently required from: Mario Scheithauer, Werner Zeh. Hello Paul Menzel, Werner Zeh, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/76175?usp=email to look at the new patch set (#2). Change subject: mb/siemens/mc_apl5: Correct the Tx signal from SATA port 0 ...................................................................... mb/siemens/mc_apl5: Correct the Tx signal from SATA port 0 Because of an incorrect transmit voltage swing, the signal must be adjusted. The factor of slices for full swing level can be corrected via the High Speed I/O Transmit Control Register 3. The appropriate value of 0.7 V was determined by using an oscilloscope. Change-Id: I965960004ca44f1b37b16ce6484000fa7fd8ad90 Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com> --- M src/mainboard/siemens/mc_apl1/variants/mc_apl5/mainboard.c 1 file changed, 10 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/76175/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/76175?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I965960004ca44f1b37b16ce6484000fa7fd8ad90 Gerrit-Change-Number: 76175 Gerrit-PatchSet: 2 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-MessageType: newpatchset

1 0

[XS] Change in coreboot[master]: mb/siemens/mc_apl1: Rename macro 'TX_DWORD3' to 'TX_DWORD3_P1'
by Mario Scheithauer (Code Review) 29 Jun '23

29 Jun '23

Attention is currently required from: Mario Scheithauer, Werner Zeh. Hello Paul Menzel, Werner Zeh, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/76174?usp=email to look at the new patch set (#2). Change subject: mb/siemens/mc_apl1: Rename macro 'TX_DWORD3' to 'TX_DWORD3_P1' ...................................................................... mb/siemens/mc_apl1: Rename macro 'TX_DWORD3' to 'TX_DWORD3_P1' The offset '0xa8c' for the High Speed I/O Transmit Control Register 3 refers to SATA port 1 only. To make this clear, change the name of the define from 'TX_DWORD3' to 'TX_DWORD3_P1'. Change-Id: I09d17eeffbe84939297e739586f6b74ed3e2258b Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com> --- M src/mainboard/siemens/mc_apl1/variants/mc_apl1/mainboard.c 1 file changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/76174/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/76174?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I09d17eeffbe84939297e739586f6b74ed3e2258b Gerrit-Change-Number: 76174 Gerrit-PatchSet: 2 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-MessageType: newpatchset

1 0

[S] Change in coreboot[master]: mb/siemens/mc_apl5: Correct the Tx signal from SATA port 0
by Paul Menzel (Code Review) 29 Jun '23

29 Jun '23

Attention is currently required from: Mario Scheithauer, Werner Zeh. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76175?usp=email ) Change subject: mb/siemens/mc_apl5: Correct the Tx signal from SATA port 0 ...................................................................... Patch Set 1: Code-Review+1 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/76175/comment/29aaaa83_e13f06e5 : PS1, Line 11: appropriate value _ of 0.7 V … -- To view, visit https://review.coreboot.org/c/coreboot/+/76175?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I965960004ca44f1b37b16ce6484000fa7fd8ad90 Gerrit-Change-Number: 76175 Gerrit-PatchSet: 1 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Thu, 29 Jun 2023 06:45:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[XS] Change in coreboot[master]: mb/siemens/mc_apl1: Change define name from 'TX_DWORD3' to 'TX_DWORD3...
by Paul Menzel (Code Review) 29 Jun '23

29 Jun '23

Attention is currently required from: Mario Scheithauer, Werner Zeh. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76174?usp=email ) Change subject: mb/siemens/mc_apl1: Change define name from 'TX_DWORD3' to 'TX_DWORD3_P1' ...................................................................... Patch Set 1: Code-Review+1 (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/76174/comment/5adfc185_df8c6059 : PS1, Line 7: Change define name from 'TX_DWORD3' to 'TX_DWORD3_P1' Change name → Rename Maybe: > Rename macro `TX_DWORD3` to `TX_DWORD3_P1` https://review.coreboot.org/c/coreboot/+/76174/comment/293cffc7_5ce01db8 : PS1, Line 11: § Shift key was pressed. ;-) -- To view, visit https://review.coreboot.org/c/coreboot/+/76174?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I09d17eeffbe84939297e739586f6b74ed3e2258b Gerrit-Change-Number: 76174 Gerrit-PatchSet: 1 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Thu, 29 Jun 2023 06:44:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: intelblocks/pep: Send All Monitor Off/On command only in FWCM case
by Paul Menzel (Code Review) 29 Jun '23

29 Jun '23

Attention is currently required from: Usha P. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75717?usp=email ) Change subject: intelblocks/pep: Send All Monitor Off/On command only in FWCM case ...................................................................... Patch Set 10: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/75717/comment/e44b0a3e_c698be7a : PS10, Line 10: TBT controller needs to be notified about ALL_MONITOR_OFF(TBT Displays OFF) only when Firmware Connection Manager(FWCM) is in use during S0ix Entry/Exit. When configured for SWCM this command should not be sent. Any idea, why Jenkins missed this unwrapped line? -- To view, visit https://review.coreboot.org/c/coreboot/+/75717?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I110fb971846f110e7d93a524ceda3bf4bfc15c13 Gerrit-Change-Number: 75717 Gerrit-PatchSet: 10 Gerrit-Owner: Usha P <usha.p(a)intel.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Utkarsh H Patel <utkarsh.h.patel(a)intel.com> Gerrit-Reviewer: Utkarsh H Patel <utkarsh.h.patel(a)intel.corp-partner.google.com> Gerrit-Reviewer: Vikrant Jadeja Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Usha P <usha.p(a)intel.com> Gerrit-Comment-Date: Thu, 29 Jun 2023 06:39:28 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit June 2023