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Change subject: Documentation: fix link to Driver Devicetree Entries page
......................................................................
Patch Set 1: Code-Review+2
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Change subject: mb/google/skyrim/var/markarth: Add custom ABL
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Change subject: mb/google/skyrim/var/markarth: Add amdfw.cfg
......................................................................
Patch Set 3: Code-Review+2
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Change subject: mb/google/rex: Configure ISH GPIO's based on FW_CONFIG
......................................................................
Patch Set 6:
(3 comments)
File src/mainboard/google/rex/variants/rex0/fw_config.c:
https://review.coreboot.org/c/coreboot/+/75525/comment/18e7988b_51c3796f :
PS6, Line 50: net NC is not present in the given design
SOC_ISH_ACCEL_INT_L
https://review.coreboot.org/c/coreboot/+/75525/comment/ab5a3c82_d91b8ce8 :
PS6, Line 52: net NC is not present in the given design
SOC_ISH_ALS_INT_L
https://review.coreboot.org/c/coreboot/+/75525/comment/f6282fe4_de2f61da :
PS6, Line 58: static const struct pad_config ish_gpp_pads_board2[] = {
Those two are also needed in proto 2.
PAD_CFG_NF(GPP_B08, NONE, DEEP, NF4),
PAD_CFG_NF(GPP_F22, NONE, DEEP, NF8),
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Change subject: mb/google/brya/acpi: NV12 enable signal should be off on GCOFF entry
......................................................................
Patch Set 5: Code-Review+2
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Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/75628?usp=email )
Change subject: mb/google/myst: Correct CROS_WP_GPIO to active high
......................................................................
mb/google/myst: Correct CROS_WP_GPIO to active high
HW has invert the signal, set it to active high.
BUG=b:285964562
TEST=check crossystem wpsw_cur change as expected.
Signed-off-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com>
Change-Id: I54c578e5df5f1b24743cc9506e1e31b0b18bfb25
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75628
Reviewed-by: Jon Murphy <jpmurphy(a)google.com>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Tim Van Patten <timvp(a)google.com>
Reviewed-by: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com>
---
M src/mainboard/google/myst/chromeos.c
1 file changed, 1 insertion(+), 1 deletion(-)
Approvals:
Ivy Jian: Looks good to me, approved
Tim Van Patten: Looks good to me, approved
build bot (Jenkins): Verified
Jon Murphy: Looks good to me, approved
diff --git a/src/mainboard/google/myst/chromeos.c b/src/mainboard/google/myst/chromeos.c
index e488e81..83ff403 100644
--- a/src/mainboard/google/myst/chromeos.c
+++ b/src/mainboard/google/myst/chromeos.c
@@ -8,6 +8,6 @@
static const struct cros_gpio cros_gpios[] = {
CROS_GPIO_REC_AL(CROS_GPIO_VIRTUAL, GPIO_DEVICE_NAME),
- CROS_GPIO_WP_AL(CROS_WP_GPIO, GPIO_DEVICE_NAME),
+ CROS_GPIO_WP_AH(CROS_WP_GPIO, GPIO_DEVICE_NAME),
};
DECLARE_CROS_GPIOS(cros_gpios);
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Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/75624?usp=email )
(
1 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
)Change subject: soc/intel/common: Make get_ramtop_addr non static
......................................................................
soc/intel/common: Make get_ramtop_addr non static
Make get_ramtop_addr not static to allow other code to use it.
Bug=b:276120526
TEST=Able to build rex
Signed-off-by: Pratikkumar Prajapati <pratikkumar.v.prajapati(a)intel.com>
Change-Id: I8ef8a65b93645f25ca5e887342b18679d65e74b4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75624
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Subrata Banik <subratabanik(a)google.com>
---
M src/soc/intel/common/basecode/include/intelbasecode/ramtop.h
M src/soc/intel/common/basecode/ramtop/ramtop.c
2 files changed, 4 insertions(+), 1 deletion(-)
Approvals:
build bot (Jenkins): Verified
Subrata Banik: Looks good to me, approved
diff --git a/src/soc/intel/common/basecode/include/intelbasecode/ramtop.h b/src/soc/intel/common/basecode/include/intelbasecode/ramtop.h
index 067dd6b..fa3c8b1 100644
--- a/src/soc/intel/common/basecode/include/intelbasecode/ramtop.h
+++ b/src/soc/intel/common/basecode/include/intelbasecode/ramtop.h
@@ -11,4 +11,7 @@
/* Update the RAMTOP if required based on the input top_of_ram address */
void update_ramtop(uint32_t addr);
+/* Get RAMTOP */
+uint32_t get_ramtop_addr(void);
+
#endif
diff --git a/src/soc/intel/common/basecode/ramtop/ramtop.c b/src/soc/intel/common/basecode/ramtop/ramtop.c
index 83af44d..90717e0 100644
--- a/src/soc/intel/common/basecode/ramtop/ramtop.c
+++ b/src/soc/intel/common/basecode/ramtop/ramtop.c
@@ -104,7 +104,7 @@
printk(BIOS_DEBUG, "Updated the RAMTOP address into CMOS 0x%x\n", ramtop.addr);
}
-static uint32_t get_ramtop_addr(void)
+uint32_t get_ramtop_addr(void)
{
struct ramtop_table ramtop;
--
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Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/75660?usp=email )
Change subject: mb/google/myst: Enable USB WWAN
......................................................................
mb/google/myst: Enable USB WWAN
Add usb wwan device tree entry. Also set wwan_rst to high due to
HW design active high.
BUG=b:285792436
TEST=check FM101 is detected by Linux kernel.
Bus 002 Device 002: ID 2cb7:01a2 Fibocom Wireless Inc.
Signed-off-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com>
Change-Id: I0aa60cb284d4b7f99e16643a92ee58467a355026
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75660
Reviewed-by: Tim Van Patten <timvp(a)google.com>
Reviewed-by: Paul Menzel <paulepanter(a)mailbox.org>
Reviewed-by: Martin Roth <martin.roth(a)amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
---
M src/mainboard/google/myst/variants/baseboard/devicetree.cb
M src/mainboard/google/myst/variants/baseboard/gpio.c
2 files changed, 20 insertions(+), 1 deletion(-)
Approvals:
Paul Menzel: Looks good to me, but someone else must approve
Tim Van Patten: Looks good to me, approved
Martin Roth: Looks good to me, approved
build bot (Jenkins): Verified
diff --git a/src/mainboard/google/myst/variants/baseboard/devicetree.cb b/src/mainboard/google/myst/variants/baseboard/devicetree.cb
index f53f5b7..01a4389 100644
--- a/src/mainboard/google/myst/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/myst/variants/baseboard/devicetree.cb
@@ -293,6 +293,25 @@
end
end
end
+ device ref xhci_1 on
+ chip drivers/usb/acpi
+ register "type" = "UPC_TYPE_HUB"
+ device ref xhci_1_root_hub on
+ chip drivers/usb/acpi
+ register "desc" = ""USB3 WWAN""
+ register "type" = "UPC_TYPE_INTERNAL"
+ register "has_power_resource" = "1"
+ register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_6)"
+ register "enable_delay_ms" = "20"
+ register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_11)"
+ register "reset_off_delay_ms" = "20"
+ device ref usb3_port7 on
+ probe WWAN WWAN_FM101GL
+ end
+ end
+ end
+ end
+ end
device ref acp on end # Audio Processor (ACP)
device ref mp2 on end # Sensor Fusion Hub (MP2)
end
diff --git a/src/mainboard/google/myst/variants/baseboard/gpio.c b/src/mainboard/google/myst/variants/baseboard/gpio.c
index 7979763..efd654e 100644
--- a/src/mainboard/google/myst/variants/baseboard/gpio.c
+++ b/src/mainboard/google/myst/variants/baseboard/gpio.c
@@ -28,7 +28,7 @@
/* EN_PP3300_WLAN */
PAD_GPO(GPIO_9, HIGH),
/* WWAN_RST */
- PAD_GPO(GPIO_11, LOW),
+ PAD_GPO(GPIO_11, HIGH),
/* Unused */
PAD_NC(GPIO_12),
/* GPIO_13 - GPIO_15: Not available */
--
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