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Change subject: soc/intel/jasperlake: Add per-SKU power limits
......................................................................
soc/intel/jasperlake: Add per-SKU power limits
Add JSL SKUs ID and add PLx from JSL PDG in project devicetree.
BUG=b:281479111
TEST=emerge-dedede coreboot and read correct value on dibbi
Signed-off-by: Chia-Ling Hou <chia-ling.hou(a)intel.com>
Change-Id: Ic086e32a2692f4f5f9b661585b216fa207fc56fd
---
M src/mainboard/google/dedede/variants/baseboard/devicetree.cb
M src/mainboard/google/dedede/variants/blipper/overridetree.cb
M src/mainboard/google/dedede/variants/drawcia/overridetree.cb
M src/mainboard/google/dedede/variants/haboki/overridetree.cb
M src/mainboard/google/dedede/variants/kracko/overridetree.cb
M src/mainboard/google/dedede/variants/lalala/overridetree.cb
M src/mainboard/google/dedede/variants/lantis/overridetree.cb
M src/mainboard/google/dedede/variants/madoo/overridetree.cb
M src/mainboard/google/dedede/variants/magolor/overridetree.cb
M src/mainboard/google/dedede/variants/metaknight/overridetree.cb
M src/mainboard/google/dedede/variants/sasukette/overridetree.cb
M src/mainboard/google/dedede/variants/shotzo/overridetree.cb
M src/mainboard/google/dedede/variants/storo/overridetree.cb
M src/soc/intel/jasperlake/chip.h
M src/soc/intel/jasperlake/systemagent.c
15 files changed, 178 insertions(+), 54 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/75679/3
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Gerrit-Change-Number: 75679
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Change subject: mb/google/rex: Configure ISH GPIO's based on FW_CONFIG
......................................................................
Patch Set 7:
(3 comments)
File src/mainboard/google/rex/variants/rex0/fw_config.c:
https://review.coreboot.org/c/coreboot/+/75525/comment/d9f0a2d4_e6095950 :
PS6, Line 50: net NC is not present in the given design
> SOC_ISH_ACCEL_INT_L
Done
https://review.coreboot.org/c/coreboot/+/75525/comment/976234d3_a6eba0e9 :
PS6, Line 52: net NC is not present in the given design
> SOC_ISH_ALS_INT_L
Done
https://review.coreboot.org/c/coreboot/+/75525/comment/c4c2a875_ece6be11 :
PS6, Line 58: static const struct pad_config ish_gpp_pads_board2[] = {
> Those two are also needed in proto 2. […]
Done
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I'd like you to reexamine a change. Please visit
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Change subject: mb/google/rex: Configure ISH GPIO's based on FW_CONFIG
......................................................................
mb/google/rex: Configure ISH GPIO's based on FW_CONFIG
Configures ISH related GPIO's based on FW_CONFIG obtained from CBI.
BUG=b:280329972,b:283023296
TEST= Set bit 21 of FW_CONFIG with CBI
Boot rex board
Check that ISH is enabled, loaded, and functional
Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com>
Change-Id: I3f0f9a7c8318fa9ae59b6f613eafdacbfa07c749
---
M src/mainboard/google/rex/variants/rex0/fw_config.c
1 file changed, 58 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/75525/7
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Change subject: mb/google/brya/acpi: NV12 enable signal should be off on GCOFF entry
......................................................................
Patch Set 5: Code-Review+2
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Change subject: soc/amd: add ops xhci_pci_ops to XHCI controllers in devicetree
......................................................................
Patch Set 2: Code-Review+2
(1 comment)
Patchset:
PS2:
LGTM!
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Change subject: Documentation: fix link to Driver Devicetree Entries page
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Patch Set 1: Code-Review+2
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