coreboot-gerrit April 2023

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[S] Change in coreboot[master]: payloads/edk2: Set max variable size to 0x8000 for SMMSTORE
by Benjamin Doron (Code Review) 03 Apr '23

03 Apr '23

Attention is currently required from: Sean Rhodes, Martin L Roth, Matt DeVillier, Stefan Reinauer. Benjamin Doron has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74176 ) Change subject: payloads/edk2: Set max variable size to 0x8000 for SMMSTORE ...................................................................... Patch Set 3: (1 comment) Patchset: PS2: > Just as your edk2 patch wont make it into edk2 master Why not squash it into the SMMSTORE patch? I'm starting to use: ``` !if $(VARIABLE_SUPPORT) == "SMMSTORE" gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x8000 !else gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x10000 !endif ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/74176 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I10d2a5a0c1d729d83e0b62bb9430863317b883cc Gerrit-Change-Number: 74176 Gerrit-PatchSet: 3 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Comment-Date: Mon, 03 Apr 2023 15:47:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Sean Rhodes <sean(a)starlabs.systems> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: Makefile.inc: introduce all_x86 target
by Matt DeVillier (Code Review) 03 Apr '23

03 Apr '23

Attention is currently required from: Martin L Roth, Kyösti Mälkki, Felix Held. Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74150 ) Change subject: Makefile.inc: introduce all_x86 target ...................................................................... Patch Set 1: (1 comment) File Makefile.inc: https://review.coreboot.org/c/coreboot/+/74150/comment/315d397d_deec79c3 PS1, Line 117: $(call add-special-class,all_x86) : all_x86-handler = $(foreach class,bootblock verstage_x86 romstage postcar ramstage,$(eval $(class)-y += $(2))) looks like this needs to go above the expansion for verstage_x86 above -- To view, visit https://review.coreboot.org/c/coreboot/+/74150 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9d0184182b931185990094d0874b49c0b5cb9f7e Gerrit-Change-Number: 74150 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 03 Apr 2023 15:39:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: payloads/edk2: Set max variable size to 0x8000 for SMMSTORE
by Sean Rhodes (Code Review) 03 Apr '23

03 Apr '23

Attention is currently required from: Benjamin Doron, Matt DeVillier. Sean Rhodes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74176 ) Change subject: payloads/edk2: Set max variable size to 0x8000 for SMMSTORE ...................................................................... Patch Set 2: (1 comment) This change is ready for review. Patchset: PS2: Just as your edk2 patch wont make it into edk2 master -- To view, visit https://review.coreboot.org/c/coreboot/+/74176 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I10d2a5a0c1d729d83e0b62bb9430863317b883cc Gerrit-Change-Number: 74176 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Comment-Date: Mon, 03 Apr 2023 15:32:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: Makefile.inc: introduce all_x86 target
by Fred Reitberger (Code Review) 03 Apr '23

03 Apr '23

Attention is currently required from: Martin L Roth, Kyösti Mälkki, Felix Held. Fred Reitberger has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74150 ) Change subject: Makefile.inc: introduce all_x86 target ...................................................................... Patch Set 1: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/74150/comment/5bcb0f7a_0ac53653 PS1, Line 14: verstage_x8 nit: verstage_x86 https://review.coreboot.org/c/coreboot/+/74150/comment/7c9a7fbd_001f7161 PS1, Line 19: per nit: pre-Zen? -- To view, visit https://review.coreboot.org/c/coreboot/+/74150 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9d0184182b931185990094d0874b49c0b5cb9f7e Gerrit-Change-Number: 74150 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 03 Apr 2023 15:30:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/amd/cezanne,glinda,mendocino,phoenix,picasso/Kconfig: use all target
by Felix Held (Code Review) 03 Apr '23

03 Apr '23

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/74149 ) Change subject: soc/amd/cezanne,glinda,mendocino,phoenix,picasso/Kconfig: use all target ...................................................................... soc/amd/cezanne,glinda,mendocino,phoenix,picasso/Kconfig: use all target The i2c.c compilation unit is added to all stages in all cases, so use the all target instead of adding it to all stages separately. Also order the all targets alphabetically. TEST=Timeless build on Mandolin results in identical image. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: Ie90380075a3c87d226cdcb0f41f7e94275eaaa42 Reviewed-on: https://review.coreboot.org/c/coreboot/+/74149 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred(a)gmail.com> --- M src/soc/amd/cezanne/Makefile.inc M src/soc/amd/glinda/Makefile.inc M src/soc/amd/mendocino/Makefile.inc M src/soc/amd/phoenix/Makefile.inc M src/soc/amd/picasso/Makefile.inc 5 files changed, 29 insertions(+), 25 deletions(-) Approvals: build bot (Jenkins): Verified Fred Reitberger: Looks good to me, approved diff --git a/src/soc/amd/cezanne/Makefile.inc b/src/soc/amd/cezanne/Makefile.inc index c21e219..bf57698 100644 --- a/src/soc/amd/cezanne/Makefile.inc +++ b/src/soc/amd/cezanne/Makefile.inc @@ -5,22 +5,20 @@ subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += psp_verstage # Beware that all-y also adds the compilation unit to verstage on PSP -all-y += config.c all-y += aoac.c +all-y += config.c +all-y += i2c.c bootblock-y += early_fch.c bootblock-y += espi_util.c bootblock-y += gpio.c -bootblock-y += i2c.c bootblock-y += uart.c -verstage-y += i2c.c verstage_x86-y += gpio.c verstage_x86-y += uart.c romstage-y += fsp_m_params.c romstage-y += gpio.c -romstage-y += i2c.c romstage-y += romstage.c romstage-y += uart.c @@ -32,7 +30,6 @@ ramstage-y += fsp_s_params.c ramstage-y += gpio.c ramstage-y += graphics.c -ramstage-y += i2c.c ramstage-y += mca.c ramstage-y += root_complex.c ramstage-y += uart.c diff --git a/src/soc/amd/glinda/Makefile.inc b/src/soc/amd/glinda/Makefile.inc index 7e4c425..81033e9 100644 --- a/src/soc/amd/glinda/Makefile.inc +++ b/src/soc/amd/glinda/Makefile.inc @@ -8,23 +8,21 @@ subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += psp_verstage # Beware that all-y also adds the compilation unit to verstage on PSP -all-y += config.c all-y += aoac.c +all-y += config.c +all-y += i2c.c bootblock-y += early_fch.c bootblock-y += espi_util.c bootblock-y += gpio.c -bootblock-y += i2c.c bootblock-y += uart.c -verstage-y += i2c.c verstage-y += espi_util.c verstage_x86-y += gpio.c verstage_x86-y += uart.c romstage-y += fsp_m_params.c romstage-y += gpio.c -romstage-y += i2c.c romstage-y += romstage.c romstage-y += uart.c @@ -35,7 +33,6 @@ ramstage-y += fch.c ramstage-y += fsp_s_params.c ramstage-y += gpio.c -ramstage-y += i2c.c ramstage-y += mca.c ramstage-y += root_complex.c ramstage-y += uart.c diff --git a/src/soc/amd/mendocino/Makefile.inc b/src/soc/amd/mendocino/Makefile.inc index 9700381..5ed8386 100644 --- a/src/soc/amd/mendocino/Makefile.inc +++ b/src/soc/amd/mendocino/Makefile.inc @@ -5,23 +5,21 @@ subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += psp_verstage # Beware that all-y also adds the compilation unit to verstage on PSP -all-y += config.c all-y += aoac.c +all-y += config.c +all-y += i2c.c bootblock-y += early_fch.c bootblock-y += espi_util.c bootblock-y += gpio.c -bootblock-y += i2c.c bootblock-y += uart.c -verstage-y += i2c.c verstage-y += espi_util.c verstage_x86-y += gpio.c verstage_x86-y += uart.c romstage-y += fsp_m_params.c romstage-y += gpio.c -romstage-y += i2c.c romstage-y += romstage.c romstage-y += uart.c @@ -33,7 +31,6 @@ ramstage-y += fsp_misc_data_hob.c ramstage-y += fsp_s_params.c ramstage-y += gpio.c -ramstage-y += i2c.c ramstage-y += mca.c ramstage-y += root_complex.c ramstage-y += uart.c diff --git a/src/soc/amd/phoenix/Makefile.inc b/src/soc/amd/phoenix/Makefile.inc index 78c29bb..27e5abc 100644 --- a/src/soc/amd/phoenix/Makefile.inc +++ b/src/soc/amd/phoenix/Makefile.inc @@ -8,23 +8,21 @@ subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += psp_verstage # Beware that all-y also adds the compilation unit to verstage on PSP -all-y += config.c all-y += aoac.c +all-y += config.c +all-y += i2c.c bootblock-y += early_fch.c bootblock-y += espi_util.c bootblock-y += gpio.c -bootblock-y += i2c.c bootblock-y += uart.c -verstage-y += i2c.c verstage-y += espi_util.c verstage_x86-y += gpio.c verstage_x86-y += uart.c romstage-y += fsp_m_params.c romstage-y += gpio.c -romstage-y += i2c.c romstage-y += romstage.c romstage-y += soc_util.c romstage-y += uart.c @@ -37,7 +35,6 @@ ramstage-y += fsp_s_params.c ramstage-y += gpio.c ramstage-y += graphics.c -ramstage-y += i2c.c ramstage-y += mca.c ramstage-y += root_complex.c ramstage-y += soc_util.c diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc index 62aba4f..b5957b9 100644 --- a/src/soc/amd/picasso/Makefile.inc +++ b/src/soc/amd/picasso/Makefile.inc @@ -6,21 +6,19 @@ subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += ../common/psp_verstage # Beware that all-y also adds the compilation unit to verstage on PSP -all-y += config.c all-y += aoac.c +all-y += config.c +all-y += i2c.c bootblock-y += early_fch.c bootblock-y += gpio.c -bootblock-y += i2c.c bootblock-y += uart.c romstage-y += fsp_m_params.c romstage-y += gpio.c -romstage-y += i2c.c romstage-y += romstage.c romstage-y += uart.c -verstage-y += i2c.c verstage_x86-y += gpio.c verstage_x86-y += uart.c @@ -32,7 +30,6 @@ ramstage-y += fsp_s_params.c ramstage-y += gpio.c ramstage-y += graphics.c -ramstage-y += i2c.c ramstage-y += mca.c ramstage-y += pcie_gpp.c ramstage-y += root_complex.c -- To view, visit https://review.coreboot.org/c/coreboot/+/74149 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie90380075a3c87d226cdcb0f41f7e94275eaaa42 Gerrit-Change-Number: 74149 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[M] Change in coreboot[master]: soc/amd/cezanne,glinda,mendocino,phoenix,picasso/Kconfig: use all target
by Fred Reitberger (Code Review) 03 Apr '23

03 Apr '23

Attention is currently required from: Jason Glenesk, Raul Rangel, Matt DeVillier, Felix Held. Fred Reitberger has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74149 ) Change subject: soc/amd/cezanne,glinda,mendocino,phoenix,picasso/Kconfig: use all target ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/74149 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie90380075a3c87d226cdcb0f41f7e94275eaaa42 Gerrit-Change-Number: 74149 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 03 Apr 2023 15:26:50 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: Revert "mb/starlabs/*: Remove sleepstates.asl"
by Benjamin Doron (Code Review) 03 Apr '23

03 Apr '23

Attention is currently required from: Sean Rhodes, Maximilian Brune, Angel Pons. Benjamin Doron has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73894 ) Change subject: Revert "mb/starlabs/*: Remove sleepstates.asl" ...................................................................... Patch Set 2: Code-Review+2 (1 comment) Patchset: PS2: > Ah right, edk2 has a different patches workflow. Thanks, good to hear! […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/73894 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3e90266e66192b328b9af51c5e614774a248ddf0 Gerrit-Change-Number: 73894 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Mon, 03 Apr 2023 15:20:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Sean Rhodes <sean(a)starlabs.systems> Comment-In-Reply-To: Benjamin Doron <benjamin.doron00(a)gmail.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: Revert "mb/starlabs/*: Remove sleepstates.asl"
by Benjamin Doron (Code Review) 03 Apr '23

03 Apr '23

Attention is currently required from: Sean Rhodes, Maximilian Brune, Angel Pons. Benjamin Doron has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73894 ) Change subject: Revert "mb/starlabs/*: Remove sleepstates.asl" ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: > Tried that patch on TGL, seems to assert on: […] Ah right, edk2 has a different patches workflow. Thanks, good to hear! I think the variable size is another issue, SMMSTORE has a size limitation due to the communication region size, I believe? That's fixed by setting `gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x8000` in UefiPayloadPkg.dsc, but it doesn't make sense to upstream it without SMMSTORE. I've squashed some SMMSTORE fixes into https://github.com/benjamindoron/edk2/commit/be6df2cebf1f572a3eeb510315815c…. -- To view, visit https://review.coreboot.org/c/coreboot/+/73894 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3e90266e66192b328b9af51c5e614774a248ddf0 Gerrit-Change-Number: 73894 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Mon, 03 Apr 2023 15:14:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Sean Rhodes <sean(a)starlabs.systems> Comment-In-Reply-To: Benjamin Doron <benjamin.doron00(a)gmail.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/amd/birman/port_descriptors: split files for phoenix/glinda
by Felix Held (Code Review) 03 Apr '23

03 Apr '23

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/74123 ) Change subject: mb/amd/birman/port_descriptors: split files for phoenix/glinda ...................................................................... mb/amd/birman/port_descriptors: split files for phoenix/glinda Glinda and Phoenix have different requirements, so split the birman port_descriptors file to betty apply to each SoC. Signed-off-by: Fred Reitberger <reitbergerfred(a)gmail.com> Change-Id: Ia28cf4172b6adada10809e0135b2459077fa3da0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/74123 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de> --- M src/mainboard/amd/birman/Makefile.inc R src/mainboard/amd/birman/port_descriptors_glinda.c C src/mainboard/amd/birman/port_descriptors_phoenix.c 3 files changed, 20 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Felix Held: Looks good to me, approved diff --git a/src/mainboard/amd/birman/Makefile.inc b/src/mainboard/amd/birman/Makefile.inc index df931d9..079e72b 100644 --- a/src/mainboard/amd/birman/Makefile.inc +++ b/src/mainboard/amd/birman/Makefile.inc @@ -4,11 +4,13 @@ bootblock-y += early_gpio.c bootblock-y += ec.c -romstage-y += port_descriptors.c +romstage-$(CONFIG_BOARD_AMD_BIRMAN_PHOENIX) += port_descriptors_phoenix.c +romstage-$(CONFIG_BOARD_AMD_BIRMAN_GLINDA) += port_descriptors_glinda.c ramstage-y += chromeos.c ramstage-y += gpio.c -ramstage-y += port_descriptors.c +ramstage-$(CONFIG_BOARD_AMD_BIRMAN_PHOENIX) += port_descriptors_phoenix.c +ramstage-$(CONFIG_BOARD_AMD_BIRMAN_GLINDA) += port_descriptors_glinda.c ifneq ($(wildcard $(MAINBOARD_BLOBS_DIR)/APCB_FP8_LPDDR5.bin),) APCB_SOURCES = $(MAINBOARD_BLOBS_DIR)/APCB_FP8_LPDDR5.bin diff --git a/src/mainboard/amd/birman/port_descriptors.c b/src/mainboard/amd/birman/port_descriptors_glinda.c similarity index 100% rename from src/mainboard/amd/birman/port_descriptors.c rename to src/mainboard/amd/birman/port_descriptors_glinda.c diff --git a/src/mainboard/amd/birman/port_descriptors.c b/src/mainboard/amd/birman/port_descriptors_phoenix.c similarity index 100% copy from src/mainboard/amd/birman/port_descriptors.c copy to src/mainboard/amd/birman/port_descriptors_phoenix.c -- To view, visit https://review.coreboot.org/c/coreboot/+/74123 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia28cf4172b6adada10809e0135b2459077fa3da0 Gerrit-Change-Number: 74123 Gerrit-PatchSet: 2 Gerrit-Owner: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[M] Change in coreboot[master]: soc/amd/mendocino: Consume fsp misc_data hob
by Felix Held (Code Review) 03 Apr '23

03 Apr '23

Attention is currently required from: Jason Glenesk. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73747 ) Change subject: soc/amd/mendocino: Consume fsp misc_data hob ...................................................................... Patch Set 7: (1 comment) File src/soc/amd/mendocino/include/fsp/amd_misc_data_hob.h: PS7: shouldn't this file have been put under vendorcode/amd/fsp/mendocino instead? -- To view, visit https://review.coreboot.org/c/coreboot/+/73747 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9f0d8cdd616726c5a714e99504b83b0126dd273b Gerrit-Change-Number: 73747 Gerrit-PatchSet: 7 Gerrit-Owner: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com> Gerrit-Comment-Date: Mon, 03 Apr 2023 13:41:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit April 2023