coreboot-gerrit April 2023

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[master]: mb/siemens/mc_ehl2: Fix GPIO settings for latest HW revision
by Mario Scheithauer (Code Review) 04 Apr '23

04 Apr '23

Attention is currently required from: Paul Menzel, Werner Zeh. Mario Scheithauer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74201 ) Change subject: mb/siemens/mc_ehl2: Fix GPIO settings for latest HW revision ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/74201/comment/c4b3586f_b7f14cae PS1, Line 7: Fix GPIO settings > Maybe: […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/74201 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia06f93aee4eccb0e4230f0c3ef53922d42701f21 Gerrit-Change-Number: 74201 Gerrit-PatchSet: 2 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Jan Samek <jan.samek(a)siemens.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Tue, 04 Apr 2023 09:53:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/siemens/mc_ehl2: Fix GPIO settings for latest HW revision
by Mario Scheithauer (Code Review) 04 Apr '23

04 Apr '23

Attention is currently required from: Mario Scheithauer, Werner Zeh. Hello build bot (Jenkins), Werner Zeh, Jan Samek, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/74201 to look at the new patch set (#2). Change subject: mb/siemens/mc_ehl2: Fix GPIO settings for latest HW revision ...................................................................... mb/siemens/mc_ehl2: Fix GPIO settings for latest HW revision With the latest hardware revision, the two GPIOs GPD11 and GPP_C8 are no longer used. BUG=none TEST=Checked output verbose GPIO debug messages Change-Id: Ia06f93aee4eccb0e4230f0c3ef53922d42701f21 Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com> --- M src/mainboard/siemens/mc_ehl/variants/mc_ehl2/gpio.c 1 file changed, 18 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/74201/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/74201 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia06f93aee4eccb0e4230f0c3ef53922d42701f21 Gerrit-Change-Number: 74201 Gerrit-PatchSet: 2 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Jan Samek <jan.samek(a)siemens.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: nb/intel/gm45: Export EDID-reading routine as a function
by Arthur Heymans (Code Review) 04 Apr '23

04 Apr '23

Attention is currently required from: Bill XIE. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74180 ) Change subject: nb/intel/gm45: Export EDID-reading routine as a function ...................................................................... Patch Set 2: (1 comment) File src/northbridge/intel/gm45/gma.c: https://review.coreboot.org/c/coreboot/+/74180/comment/24510d8a_dd27209b PS2, Line 161: /* : * GTT base is at a 2M offset and is 2M big. If GTT is smaller than 2M : * cycles are simply not decoded which is fine. : */ : pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER); : memset(mmio + 2 * MiB, 0, 2 * MiB); > Should it be moved into gma_func0_init()? yes -- To view, visit https://review.coreboot.org/c/coreboot/+/74180 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibdbe4d76f9b59e7ae83b60cda042c2d1c39827ca Gerrit-Change-Number: 74180 Gerrit-PatchSet: 2 Gerrit-Owner: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Comment-Date: Tue, 04 Apr 2023 09:43:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Bill XIE <persmule(a)hardenedlinux.org> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/siemens/mc_ehl2: Fix GPIO settings
by Paul Menzel (Code Review) 04 Apr '23

04 Apr '23

Attention is currently required from: Mario Scheithauer, Werner Zeh. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74201 ) Change subject: mb/siemens/mc_ehl2: Fix GPIO settings ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/74201/comment/db4ea441_c68c29ad PS1, Line 7: Fix GPIO settings Maybe: > Fix GPIO settings for latest HW revision -- To view, visit https://review.coreboot.org/c/coreboot/+/74201 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia06f93aee4eccb0e4230f0c3ef53922d42701f21 Gerrit-Change-Number: 74201 Gerrit-PatchSet: 1 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Jan Samek <jan.samek(a)siemens.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Tue, 04 Apr 2023 09:42:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: nb/intel/gm45: Export EDID-reading routine as a function
by Bill XIE (Code Review) 04 Apr '23

04 Apr '23

Attention is currently required from: Arthur Heymans. Bill XIE has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74180 ) Change subject: nb/intel/gm45: Export EDID-reading routine as a function ...................................................................... Patch Set 2: (1 comment) File src/northbridge/intel/gm45/gma.c: https://review.coreboot.org/c/coreboot/+/74180/comment/9de8d783_33c63916 PS2, Line 161: /* : * GTT base is at a 2M offset and is 2M big. If GTT is smaller than 2M : * cycles are simply not decoded which is fine. : */ : pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER); : memset(mmio + 2 * MiB, 0, 2 * MiB); > Not needed for getting EDID. Should it be moved into gma_func0_init()? -- To view, visit https://review.coreboot.org/c/coreboot/+/74180 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibdbe4d76f9b59e7ae83b60cda042c2d1c39827ca Gerrit-Change-Number: 74180 Gerrit-PatchSet: 2 Gerrit-Owner: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Tue, 04 Apr 2023 09:42:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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[L] Change in coreboot[master]: mb/ibm: Add IBM SBP1
by Paul Menzel (Code Review) 04 Apr '23

04 Apr '23

Attention is currently required from: Patrick Rudolph, David Hendricks, Shuo Liu, Nill Ge. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73392 ) Change subject: mb/ibm: Add IBM SBP1 ...................................................................... Patch Set 9: Code-Review+1 (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/73392/comment/c880171b_3261319c PS9, Line 7: Add IBM SBP1 Maybe more specific: > Add 4 SPR sockets server board IBM SBP1 https://review.coreboot.org/c/coreboot/+/73392/comment/73b722d3_c25a46e8 PS9, Line 26: Linux What Linux kernel did you test with? https://review.coreboot.org/c/coreboot/+/73392/comment/1278f124_c9c98929 PS9, Line 29: Is `dmesg --level crit,alert,err,warn` empty? -- To view, visit https://review.coreboot.org/c/coreboot/+/73392 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie21c744224e8d9e5232d63b8366d2981c9575d70 Gerrit-Change-Number: 73392 Gerrit-PatchSet: 9 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Nill Ge <geshijian(a)bytedance.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Nill Ge <geshijian(a)bytedance.com> Gerrit-Comment-Date: Tue, 04 Apr 2023 09:39:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: nb/intel/gm45: Export EDID-reading routine as a function
by Arthur Heymans (Code Review) 04 Apr '23

04 Apr '23

Attention is currently required from: Bill XIE. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74180 ) Change subject: nb/intel/gm45: Export EDID-reading routine as a function ...................................................................... Patch Set 2: (1 comment) File src/northbridge/intel/gm45/gma.c: https://review.coreboot.org/c/coreboot/+/74180/comment/84dc904a_7a426f22 PS2, Line 161: /* : * GTT base is at a 2M offset and is 2M big. If GTT is smaller than 2M : * cycles are simply not decoded which is fine. : */ : pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER); : memset(mmio + 2 * MiB, 0, 2 * MiB); Not needed for getting EDID. -- To view, visit https://review.coreboot.org/c/coreboot/+/74180 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibdbe4d76f9b59e7ae83b60cda042c2d1c39827ca Gerrit-Change-Number: 74180 Gerrit-PatchSet: 2 Gerrit-Owner: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Comment-Date: Tue, 04 Apr 2023 09:38:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: util/ifdtool: Add option to create FMAP template
by Maximilian Brune (Code Review) 04 Apr '23

04 Apr '23

Maximilian Brune has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73487 ) Change subject: util/ifdtool: Add option to create FMAP template ...................................................................... Patch Set 9: (1 comment) File Makefile.inc: https://review.coreboot.org/c/coreboot/+/73487/comment/80a8b403_71483c0c PS7, Line 941: -p $(CONFIG_IFD_CHIPSET) > According to ifdtool's integrated help, -p is used to handle platform-specific quirks. […] The help is not entirely correct. If you supply a platform it will use the IFD format of that platform. If you don't supply a platform, than IFDTOOL will guess the IFD format. But that guessing only works for older platforms (if I remember correctly) and on the platform I tested this on the IFD format was always guessed wrong and it is not always easy to catch that in an entire coreboot build log. But this is meant only as a fallback for those mainboards that don't supply their own FMAP. Also IMHO: I am not a fan of guessing, especially while building. -- To view, visit https://review.coreboot.org/c/coreboot/+/73487 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I82cb252fff456773af69943e188480a4998736fd Gerrit-Change-Number: 73487 Gerrit-PatchSet: 9 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Comment-Date: Tue, 04 Apr 2023 09:26:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/xeon_sp/spr: Default to X2APIC support
by Johnny Lin (Code Review) 04 Apr '23

04 Apr '23

Attention is currently required from: Patrick Rudolph, Jonathan Zhang, Christian Walter, Tim Chu. Johnny Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74184 ) Change subject: soc/intel/xeon_sp/spr: Default to X2APIC support ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: With or without setting x2apic to 1 in devicetree.cb, my AC will see LinuxBoot kernel panic, maybe add this under mainboard? APIC: Switch to symmetric I/O mode setup Switched APIC routing to physical flat. ------------[ cut here ]------------ kernel BUG at arch/x86/kernel/apic/apic.c:1588! invalid opcode: 0000 [#1] SMP NOPTI CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.10.50 #3 Hardware name: Intel Archer City CRB/Archer City CRB, BIOS 4.19-1079-g696228fa65-dirty 04/04/2023 RIP: 0010:setup_local_APIC+0x68/0x245 Code: e3 fb ff ff bf f0 00 00 00 80 e4 fe 89 c6 e8 e4 fb ff ff 48 8b 05 02 71 b9 00 48 8b 80 a0 00 00 00 e8 56 f2 7c 00 85 c00 RSP: 0000:ffffffff8de03e78 EFLAGS: 00010246 RAX: 0000000000000000 RBX: 0000000000000000 RCX: 00000000ffffbfff RDX: 0000000000000000 RSI: 00000000fffffeff RDI: 0000000000000020 RBP: 0000000000000000 R08: 0000000000000000 R09: 00000000ffffbfff R10: ffffffff8de03d38 R11: ffffffff8de03d30 R12: ffffffff8e030920 R13: ffffffff8e037ae0 R14: ff24e82d234b0680 R15: 0000000000000000 FS: 0000000000000000(0000) GS:ff24e82d20a00000(0000) knlGS:0000000000000000 CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 CR2: ff24e82cf9401000 CR3: 0000000038a0a001 CR4: 00000000000616b0 DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 DR3: 0000000000000000 DR6: 00000000fffe07f0 DR7: 0000000000000400 Call Trace: ? printk+0x53/0x6a ? apic_intr_mode_init+0xc4/0xe3 ? x86_late_time_init+0x1b/0x2b ? start_kernel+0x47e/0x507 ? secondary_startup_64_no_verify+0xc2/0xcb ---[ end trace 7240cedd57090ff1 ]--- RIP: 0010:setup_local_APIC+0x68/0x245 Code: e3 fb ff ff bf f0 00 00 00 80 e4 fe 89 c6 e8 e4 fb ff ff 48 8b 05 02 71 b9 00 48 8b 80 a0 00 00 00 e8 56 f2 7c 00 85 c00 RSP: 0000:ffffffff8de03e78 EFLAGS: 00010246 RAX: 0000000000000000 RBX: 0000000000000000 RCX: 00000000ffffbfff RDX: 0000000000000000 RSI: 00000000fffffeff RDI: 0000000000000020 RBP: 0000000000000000 R08: 0000000000000000 R09: 00000000ffffbfff R10: ffffffff8de03d38 R11: ffffffff8de03d30 R12: ffffffff8e030920 R13: ffffffff8e037ae0 R14: ff24e82d234b0680 R15: 0000000000000000 FS: 0000000000000000(0000) GS:ff24e82d20a00000(0000) knlGS:0000000000000000 CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 CR2: ff24e82cf9401000 CR3: 0000000038a0a001 CR4: 00000000000616b0 DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 DR3: 0000000000000000 DR6: 00000000fffe07f0 DR7: 0000000000000400 Kernel panic - not syncing: Attempted to kill the idle task! -- To view, visit https://review.coreboot.org/c/coreboot/+/74184 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3e84cfbd2a7f05b142dc4d782764edce81646c8a Gerrit-Change-Number: 74184 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Tue, 04 Apr 2023 09:22:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/lenovo/x200/blc: Add LTN121AT07L02 at 750Hz
by Bill XIE (Code Review) 04 Apr '23

04 Apr '23

Attention is currently required from: Stefan Ott, Bill XIE, Alexander Couzens. Hello Stefan Ott, build bot (Jenkins), Arthur Heymans, Alexander Couzens, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/74182 to look at the new patch set (#4). Change subject: mb/lenovo/x200/blc: Add LTN121AT07L02 at 750Hz ...................................................................... mb/lenovo/x200/blc: Add LTN121AT07L02 at 750Hz The vendor sets BLC_PWM_CTL to 0x31313131. This value seems working well on the x200 with this panel, which is said to be LED. Change-Id: I8b0ec04c6f6fcb6d4027a5114698db87d7718191 Signed-off-by: Bill XIE <persmule(a)hardenedlinux.org> --- M src/mainboard/lenovo/x200/blc.c 1 file changed, 16 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/74182/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/74182 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8b0ec04c6f6fcb6d4027a5114698db87d7718191 Gerrit-Change-Number: 74182 Gerrit-PatchSet: 4 Gerrit-Owner: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Stefan Ott <coreboot(a)desire.ch> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Stefan Ott <coreboot(a)desire.ch> Gerrit-Attention: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-MessageType: newpatchset

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coreboot-gerrit April 2023