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Change subject: mb/google/myst: Add ACPI configuration for USB ports
......................................................................
Patch Set 13:
(2 comments)
File src/mainboard/google/myst/variants/baseboard/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/74106/comment/637969cb_5a216962
PS12, Line 9: device ref iommu on end
> ref1
Ack
https://review.coreboot.org/c/coreboot/+/74106/comment/c3e16f42_0c2410a2
PS12, Line 89: device ref iommu on end
> You have it above already. See `ref1`.
Ack, bad rebase.
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Change subject: mb/google/myst: Add ACPI configuration for USB ports
......................................................................
mb/google/myst: Add ACPI configuration for USB ports
The USB port configuration was derived from the PPR and schematics.
Primary functions are:
2 USB-C ports
1 USB SS+ type A port
2 Cameras (World/User facing)
1 Bluetooth transceiver
1 WWAN
BUG=b:275905635
TEST=builds
Signed-off-by: Jon Murphy <jpmurphy(a)google.com>
Change-Id: Iecb256cad7b2daea1fddfc8323e88ff5c38d1e51
---
M src/mainboard/google/myst/variants/baseboard/devicetree.cb
1 file changed, 99 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/74106/14
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Tim Van Patten has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74095 )
Change subject: mb/google/myst: First pass GPIO configuration for Myst
......................................................................
Patch Set 7:
(1 comment)
File src/mainboard/google/myst/variants/baseboard/gpio.c:
https://review.coreboot.org/c/coreboot/+/74095/comment/a0a3eabb_e9c6a5cb
PS7, Line 116: /* SPI_SOC_DO_TCHSCR_DO_R */
: PAD_NF(GPIO_105, SPI2_DAT1, PULL_NONE),
> Defined as EGPIO105 at cumulative GPIO 57
Looks like this is misnamed here. Should be: `SPI_SOC_DI_TCHSCR_DO_R`
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build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74099 )
Change subject: mb/google/myst: Enable chromeOS EC
......................................................................
Patch Set 9:
(2 comments)
File src/mainboard/google/myst/variants/baseboard/include/baseboard/ec.h:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-173206):
https://review.coreboot.org/c/coreboot/+/74099/comment/57f8aea9_79ae32da
PS9, Line 71: #define SIO_EC_PS2K_IRQ Interrupt (ResourceConsumer, Level, ActiveLow, Shared) {1}
space prohibited between function name and open parenthesis '('
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-173206):
https://review.coreboot.org/c/coreboot/+/74099/comment/88cbd904_3c8c8e45
PS9, Line 71: #define SIO_EC_PS2K_IRQ Interrupt (ResourceConsumer, Level, ActiveLow, Shared) {1}
Macros with complex values should be enclosed in parentheses
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Hello build bot (Jenkins), Raul Rangel, Tim Van Patten, Karthik Ramasubramanian, Mark Hasemeyer,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/74106
to look at the new patch set (#13).
Change subject: mb/google/myst: Add ACPI configuration for USB ports
......................................................................
mb/google/myst: Add ACPI configuration for USB ports
The USB port configuration was derived from the PPR and schematics.
Primary functions are:
2 USB-C ports
1 USB SS+ type A port
2 Cameras (World/User facing)
1 Bluetooth transceiver
1 WWAN
BUG=b:275905635
TEST=builds
Signed-off-by: Jon Murphy <jpmurphy(a)google.com>
Change-Id: Iecb256cad7b2daea1fddfc8323e88ff5c38d1e51
---
M src/mainboard/google/myst/variants/baseboard/devicetree.cb
1 file changed, 100 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/74106/13
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I'd like you to reexamine a change. Please visit
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Change subject: mb/google/myst: Configure WLAN
......................................................................
mb/google/myst: Configure WLAN
Configure PCIe Clk Source and Clk Request mapping. Configure GPIOs used
for WLAN. Mapping derived from myst schematic.
BUG=b:275965982
TEST=Builds
Signed-off-by: Jon Murphy <jpmurphy(a)google.com>
Change-Id: I5059be0bc011978e74ab4245e6ae037aa177ef9b
---
M src/mainboard/google/myst/Kconfig
M src/mainboard/google/myst/bootblock.c
A src/mainboard/google/myst/romstage.c
M src/mainboard/google/myst/variants/baseboard/Makefile.inc
M src/mainboard/google/myst/variants/baseboard/devicetree.cb
M src/mainboard/google/myst/variants/baseboard/gpio.c
M src/mainboard/google/myst/variants/baseboard/include/baseboard/variants.h
7 files changed, 96 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/74113/17
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I'd like you to reexamine a change. Please visit
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Change subject: mb/google/myst: Add eSPI configuration
......................................................................
mb/google/myst: Add eSPI configuration
Add eSPI configuration for myst. Ensure the additional windows are used
and remove unnecessary addresses from the range used on skyrim.
BUG=b:275953893
TEST=builds
Change-Id: I7b40adec78d4e0b596596fa6e2951c79bd3bd8c7
Signed-off-by: Jon Murphy <jpmurphy(a)google.com>
---
M src/mainboard/google/myst/Kconfig
M src/mainboard/google/myst/bootblock.c
M src/mainboard/google/myst/variants/baseboard/devicetree.cb
M src/mainboard/google/myst/variants/baseboard/gpio.c
M src/mainboard/google/myst/variants/baseboard/include/baseboard/variants.h
5 files changed, 91 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/74110/15
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Change subject: mb/google/myst: Enable chromeOS EC
......................................................................
mb/google/myst: Enable chromeOS EC
BUG=b:270624655
TEST=builds
Signed-off-by: Jon Murphy <jpmurphy(a)google.com>
Change-Id: Id18a311097d575973087eb92fd446a5c511f570e
---
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M src/mainboard/google/myst/Makefile.inc
M src/mainboard/google/myst/dsdt.asl
A src/mainboard/google/myst/ec.c
M src/mainboard/google/myst/mainboard.c
M src/mainboard/google/myst/variants/baseboard/devicetree.cb
A src/mainboard/google/myst/variants/baseboard/include/baseboard/ec.h
7 files changed, 140 insertions(+), 1 deletion(-)
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Change subject: mb/google/myst: First pass GPIO configuration for Myst
......................................................................
mb/google/myst: First pass GPIO configuration for Myst
Initial GPIO configuration for Myst.
BUG=b:270596581
TEST=builds
Signed-off-by: Jon Murphy <jpmurphy(a)google.com>
Change-Id: Ia019704c7b027f14d46281e0de0ffdbc4906a20b
---
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1 file changed, 175 insertions(+), 1 deletion(-)
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Anil Kumar K has uploaded a new patch set (#15) to the change originally created by Ravishankar Sarawadi. ( https://review.coreboot.org/c/coreboot/+/72881 )
Change subject: mb/google/rex: Enable audio BT offload
......................................................................
mb/google/rex: Enable audio BT offload
This patch enables BT offload feature on Rex over SSP1.
BT mode is selected via FW_CONFIG and corresponding VGPIOs are
programmed.
BUG=b:275538390
TEST=Verified audio playback using BT speaker/headset in I2S mode on google/rex.
Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi(a)intel.com>
Change-Id: I46e9702add37464122ffc78826ebf8a6c5b5b07c
---
M src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb
M src/mainboard/google/rex/variants/rex0/fw_config.c
2 files changed, 64 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/72881/15
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