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Change subject: soc/mediatek/mt8186: Reduce GPIO code size in bootblock
......................................................................
Patch Set 2:
(1 comment)
File src/soc/mediatek/mt8186/gpio.c:
https://review.coreboot.org/c/coreboot/+/74062/comment/7355b2a3_96c26887
PS2, Line 23: spi
Since TDM_RX_* are not SPI GPIOs (am I right?), we should rename this to `bootblock_gpio_driving_info`.
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Hello build bot (Jenkins), ritul guru, Eric Lai, Fred Reitberger, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/74057
to look at the new patch set (#4).
Change subject: configs/config.amd_mayan: Add defconfig file for Mayan board
......................................................................
configs/config.amd_mayan: Add defconfig file for Mayan board
Signed-off-by: Anand Vaikar <a.vaikar2021(a)gmail.com>
Change-Id: Ibddd49a6611e95c2c986c4de1d7052e70622ad32
---
A configs/config.amd_mayan
1 file changed, 51 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/74057/4
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Change subject: mb/google/rex: Enable audio BT offload
......................................................................
Patch Set 15:
(1 comment)
Patchset:
PS13:
> Can you share the CPFE OS version which you are using for the above steps? […]
With Rex CPFE OS R114-15405 - BT has worked fined
If the ask is for BT offload, then kernel patches, topology changes and coreboot with this changes needs to be updated
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Change subject: mb/google/skyrim: Hide unused GPP port
......................................................................
Patch Set 1: Code-Review+1
(1 comment)
File src/mainboard/google/skyrim/variants/baseboard/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/73862/comment/97b61d6e_3ac89eb6
PS1, Line 110: device ref gpp_bridge_3 hidden end
> oh, I see it's the FSP different. […]
the chipset devicetree configures the bridges to the different pcie ports as off, but coreboot will complain about leftover devices if it doesn't see the bridge that's being disabled. when the bridge isn't used for an enabled pcie engine in the port descriptor list, the bridge won't show up at all. setting it to hidden in the mainboard code avoids this warning
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Change subject: configs/config.amd_mayan: Add defconfig file for Mayan board
......................................................................
Patch Set 3:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/74057/comment/202fac8a_0c008329
PS2, Line 11: Signed-off-by: Anand Vaikar <a.vaikar2021(a)gmail.com>
> Duplicate signature
Please fix.
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Change subject: mb/msi/ms7d25/vboot-rwab.fmd: Add 32KiB HSPHY cache region
......................................................................
Patch Set 8:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/68988/comment/38e9d84f_18930bb1
PS6, Line 8:
> It is explained in the previous patch in relation chain. E.g. ME disabling.
As commit messages should be self-contained, it be nice if you copied or summarized it.
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Change subject: configs/config.amd_mayan: Add defconfig file for Mayan board
......................................................................
Patch Set 3:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/74057/comment/ad8db22e_c3d4855b
PS2, Line 8:
> This file (config.amd_mayan) introduces the set of default configs we are using for mayan. […]
Hmm, then it’s getting build tested already as far as I know. It only makes sense to add a config file, that differs from the default.
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Change subject: mb/intel/mtlrvp: Fix the file name (chromeos.debug-fsp.fmd) typo
......................................................................
Patch Set 1:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/74217/comment/5d05af41_aa0674aa
PS1, Line 7: Fix the file name (chromeos.debug-fsp.fmd) typo
Maybe: Use - over . in `chromeos-debug-fsp.fmd`
https://review.coreboot.org/c/coreboot/+/74217/comment/f46b66d1_61a8ad8d
PS1, Line 9: file(chromeos.debug-fsp.fmd)
Please add a space before the (.
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Change subject: util/lint/stable-017: Update full config patern matching
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/74220/comment/9cc170ab_8f32f08a
PS1, Line 7: patern
pattern
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