Attention is currently required from: Lance Zhao, Subrata Banik, Caveh Jalali, Reka Norman, Tim Wawrzynczak, Sumeet R Pawnikar, Boris Mittelberg.
Hello Lance Zhao, build bot (Jenkins), Subrata Banik, Caveh Jalali, Reka Norman, Tim Wawrzynczak, Boris Mittelberg,
I'd like you to reexamine a change. Please visit
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Change subject: Reland drivers/intel/dptf: Add multiple fan support under dptf
......................................................................
Reland drivers/intel/dptf: Add multiple fan support under dptf
This reverts commit 4dba71fd25c91a9e610287c61238a8fe24452e4e.
Add multiple fan support for dptf policies.
This also fixes the Google Meet resolution drop issue as per
b:246535768 comment#12. When system starts Google Meet video call,
it uses the hardware accelerated encoder as expected. But, as soon as
another system connects to the call, an immediate fallback is observed
from hardware to software encoder. Due to this, Google Meet resolution
dropped from 720p to 180p. This issue is observed on Alder Lake-N SoC
based fanless platforms. This same issue was not seen on fan based
systems. With the fix in dptf driver where fan configures appropriate
setting for only fan participant, not for other device participants,
able to see consistent 720p resolution.
BUG=b:246535768,b:235254828
BRANCH=None
TEST=Built and tested on Alder Lake-P Redrix system for two fans
support and on Alder Lake-N fanless systems. With this code change
Google Meet resolution drop not observed.
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar(a)intel.com>
Change-Id: Id07d279ff962253c22be9d395ed7be0d732aeaa7
---
M src/acpi/acpigen_dptf.c
M src/drivers/intel/dptf/chip.h
M src/drivers/intel/dptf/dptf.c
M src/ec/google/chromeec/acpi/emem.asl
M src/ec/google/chromeec/chip.h
M src/ec/google/chromeec/ec_acpi.c
M src/ec/google/chromeec/ec_dptf_helpers.c
M src/ec/google/common/dptf.h
M src/include/acpi/acpigen_dptf.h
9 files changed, 240 insertions(+), 47 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/73249/4
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Dinesh Gehlot has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74209 )
Change subject: soc/intel/cmn/block/cse: Implement an API to get ISH version
......................................................................
Patch Set 4:
(1 comment)
File src/soc/intel/common/block/cse/cse.c:
https://review.coreboot.org/c/coreboot/+/74209/comment/b8913879_6debd2a3
PS3, Line 1233: if (memcmp(&version->ish_partition_info.prev_cse_fw_version,
: &version->cur_cse_fw_version, size)) {
> i still don't understand why u need to check the cse version here ? what is the value? […]
Acknowledged.
Initially I kept it to ensure the stored ISH version data is not outdated, but yes there is no software reason for the same.
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Change subject: soc/intel/cmd/block: Implement an API to get firmware partition details
......................................................................
Patch Set 16:
(1 comment)
File src/soc/intel/common/block/cse/cse.c:
https://review.coreboot.org/c/coreboot/+/74005/comment/ee3894af_3feef040
PS15, Line 1243: return false;
> wondering if we have to add a print statement to let the user know the ISH partition is not availabl […]
Ack
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Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/74209
to look at the new patch set (#4).
Change subject: soc/intel/cmn/block/cse: Implement an API to get ISH version
......................................................................
soc/intel/cmn/block/cse: Implement an API to get ISH version
This patch adds an API that will fetch the current ISH version from
cbmem. It alerts the user if the current ISH version is outdated.
BUG=b:273661726
Test=The ISHC version, 5.4.2.7779, was retrieved on the Nissa board.
Signed-off-by: Dinesh Gehlot <digehlot(a)google.com>
Change-Id: Ib3f983d5de5b169474bcdb1e9e2934174a9dadf8
---
M src/soc/intel/common/block/cse/cse.c
M src/soc/intel/common/block/include/intelblocks/cse.h
2 files changed, 45 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/74209/4
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Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/74208
to look at the new patch set (#6).
Change subject: soc/intel/cmn/block: Store CSE and ISH version into cbmem table
......................................................................
soc/intel/cmn/block: Store CSE and ISH version into cbmem table
The patch stores the ISH and CSE version in the CBMEM table. It
verifies CSE has been updated by comparing old and current CSE versions.
If it has, the patch updates the current CSE version in the CBMEM table.
It then updates the CBMEM table with the current ISH version.
BUG=b:273661726
Test=The current and old cse and ish versions are verified on the nissa
during cold and warm reboots. Additionally, version updates are verified
by a debug patch that purposely updated the stored cse version.
Signed-off-by: Dinesh Gehlot <digehlot(a)google.com>
Change-Id: Ie5c5faf926c75b05d189fb1118020fff024fc3e0
---
M src/commonlib/bsd/include/commonlib/bsd/cbmem_id.h
M src/soc/intel/common/block/cse/cse_lite.c
M src/soc/intel/common/block/include/intelblocks/cse.h
3 files changed, 80 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/74208/6
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Hello build bot (Jenkins), SRIDHAR SIRICILLA, Subrata Banik, Kangheui Won, Haribalaraman Ramasubramanian, Rizwan Qureshi, Reka Norman, Kapil Porwal, Meera Ravindranath,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/74005
to look at the new patch set (#16).
Change subject: soc/intel/cmd/block: Implement an API to get firmware partition details
......................................................................
soc/intel/cmd/block: Implement an API to get firmware partition details
This patch retrieves details of a specified firmware partition. The
information retrieved includes the mkhi header, current firmware
version, and other information about the partition. The patch
communicates with the ME using the HECI command to acquire this
information.
BUG=b:273661726
Test=Verified the changes for ISHC partition on nissa board.
Signed-off-by: Dinesh Gehlot <digehlot(a)google.com>
Change-Id: I0582010bbb836bd4734f843a8c74dee49d203fd8
---
M src/soc/intel/common/block/cse/cse.c
M src/soc/intel/common/block/include/intelblocks/cse.h
2 files changed, 82 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/74005/16
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Change subject: soc/intel/alderlake/{chipset.cb,chipset_pch_s.cb}: Set P2SB as hidden
......................................................................
Patch Set 5: Code-Review+2
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