build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74322 )
Change subject: Update intel-sec-tools submodule to upstream master
......................................................................
Patch Set 1:
(2 comments)
Commit Message:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-173782):
https://review.coreboot.org/c/coreboot/+/74322/comment/e30a44a8_5982c5cb
PS1, Line 9: Updating from commit id 0031ac7:
Possible unwrapped commit description (prefer a maximum 72 chars per line)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-173782):
https://review.coreboot.org/c/coreboot/+/74322/comment/eb8c8436_184e9b51
PS1, Line 12: to commit id 237c035:
Possible unwrapped commit description (prefer a maximum 72 chars per line)
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build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74321 )
Change subject: Update cmocka submodule to upstream master
......................................................................
Patch Set 1:
(2 comments)
Commit Message:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-173781):
https://review.coreboot.org/c/coreboot/+/74321/comment/320830fb_af94b860
PS1, Line 9: Updating from commit id 8931845:
Possible unwrapped commit description (prefer a maximum 72 chars per line)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-173781):
https://review.coreboot.org/c/coreboot/+/74321/comment/fe578fdf_575ae3a7
PS1, Line 12: to commit id 309ee5e:
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build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74320 )
Change subject: Update opensbi submodule to upstream master
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-173780):
https://review.coreboot.org/c/coreboot/+/74320/comment/e8397a4f_202bb85f
PS1, Line 12: to commit id 2868f26:
Possible unwrapped commit description (prefer a maximum 72 chars per line)
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build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74319 )
Change subject: Update arm-trusted-firmware submodule to upstream master
......................................................................
Patch Set 1:
(2 comments)
Commit Message:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-173779):
https://review.coreboot.org/c/coreboot/+/74319/comment/53250f7e_350ca7bc
PS1, Line 9: Updating from commit id 4c985e867:
Possible unwrapped commit description (prefer a maximum 72 chars per line)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-173779):
https://review.coreboot.org/c/coreboot/+/74319/comment/c8cebb78_f26a0655
PS1, Line 12: to commit id 04f59c4a6:
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Dinesh Gehlot has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74256 )
Change subject: soc/intel/: Store CSE firmware version into cbmem table
......................................................................
Patch Set 4:
(3 comments)
File src/soc/intel/alderlake/romstage/romstage.c:
https://review.coreboot.org/c/coreboot/+/74256/comment/c1fc97ec_e773aa0c
PS3, Line 235: DRIVERS_INTEL_ISH
> if (CONFIG(SOC_INTEL_CSE_LITE_SYNC_IN_ROMSTAGE) && CONFIG(SOC_INTEL_GET_FIRMWARE_VERSIONS_FROM_CSE))
Ack
File src/soc/intel/common/block/cse/cse_lite.c:
https://review.coreboot.org/c/coreboot/+/74256/comment/8dc03b04_fad16e6c
PS3, Line 1087: if (!cse_get_bp_info(&cse_bp_info))
> > suspect code indent for conditional statements (8, 24) […]
Ack
https://review.coreboot.org/c/coreboot/+/74256/comment/f5b072a4_6ef610fb
PS3, Line 1184: ENV_RAMSTAGE
> if (CONFIG(SOC_INTEL_CSE_LITE_SYNC_IN_RAMSTAGE) && CONFIG(SOC_INTEL_GET_FIRMWARE_VERSIONS_FROM_CSE))
Check for `SOC_INTEL_CSE_LITE_SYNC_IN_RAMSTAGE` may not require, it is already checked at parent if condition.
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Hello build bot (Jenkins), Tarun Tuli, Subrata Banik,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/74256
to look at the new patch set (#4).
Change subject: soc/intel/: Store CSE firmware version into cbmem table
......................................................................
soc/intel/: Store CSE firmware version into cbmem table
The patch implements an API that stores the CSE firmware version in the
CBMEM table. The API will be called either from RAMSTAGE or ROMSTAGE
based on underlying platform.
BUG=b:273661726
Signed-off-by: Dinesh Gehlot <digehlot(a)google.com>
Change-Id: I923049d2f1f589f87e1a29e1ac94af7f5fccc2c8
---
M src/commonlib/bsd/include/commonlib/bsd/cbmem_id.h
M src/soc/intel/alderlake/romstage/romstage.c
M src/soc/intel/common/block/cse/cse_lite.c
M src/soc/intel/common/block/include/intelblocks/cse.h
4 files changed, 62 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/74256/4
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