coreboot-gerrit April 2023

coreboot-gerrit@coreboot.org

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5761 discussions

[M] Change in coreboot[master]: soc/intel/apollolake: Communicate with the PMC over Trusted Sideband
by Felix Singer (Code Review) 13 Apr '23

13 Apr '23

Attention is currently required from: Sean Rhodes, Arthur Heymans. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67076 ) Change subject: soc/intel/apollolake: Communicate with the PMC over Trusted Sideband ...................................................................... Patch Set 7: (1 comment) File src/soc/intel/apollolake/acpi/pmc_ipc.asl: https://review.coreboot.org/c/coreboot/+/67076/comment/908784ec_1f95c112 PS7, Line 44: Or (ShiftLeft (And (Arg0, 0xff), 0), Local0, Local0) /* 7:0 Command ID */ > `Local0 = (ShiftLeft((Arg0 & 0xff), 0)) | Local0; /* 7:0 Command ID */` ? The shift operation is left, but otherwise it looks good ``` Local0 = ((Arg0 & 0xff) << 0) | Local0; /* 7:0 Command ID */ Local0 = ((Arg1 & 0x0f) << 12) | Local0; /* 15:12 Sub Command ID */ Local0 = ((Arg2 & 0xff) << 16) | Local0; /* 23:16 Size */ ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/67076 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ide33c2deca4c254a18e4878d22e8f1279b39428e Gerrit-Change-Number: 67076 Gerrit-PatchSet: 7 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Thu, 13 Apr 2023 20:09:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <felixsinger(a)posteo.net> Comment-In-Reply-To: Sean Rhodes <sean(a)starlabs.systems> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/amd: Clarify ACPI _PRT entry generation
by Felix Held (Code Review) 13 Apr '23

13 Apr '23

Attention is currently required from: Jason Glenesk, Raul Rangel, Matt DeVillier, Kyösti Mälkki, Fred Reitberger. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74314 ) Change subject: soc/amd: Clarify ACPI _PRT entry generation ...................................................................... Patch Set 2: Code-Review+2 (2 comments) File src/soc/amd/common/block/pci/acpi_prt.c: https://review.coreboot.org/c/coreboot/+/74314/comment/9fbfb4b6_986e1b73 PS2, Line 10: /* GNB IO-APIC is located after the FCH IO-APIC */ the existing comment works, but i'd reword this a bit; maybe something like: "The FCH IOAPIC is the first IOAPIC in the system, so the GNB IOAPIC's IRQ numbers start right after the FCH IOAPIC's IRQs" if you think that it should be kept like it was before, feel free to just ACK this comment https://review.coreboot.org/c/coreboot/+/74314/comment/68a854c1_99abd8bb PS2, Line 11: #define FCH_IOAPIC_INTERRUPTS 24 out of scope for this patch, but i wonder if would it make sense to use ioapic_get_max_vectors(VIO_APIC_VADDR) instead of the hardcoded value of 24. it'll be 24 for all fch ioapics though, so it's not really necessary -- To view, visit https://review.coreboot.org/c/coreboot/+/74314 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2d862e37424f9fea7f269cd09e9e90056531b643 Gerrit-Change-Number: 74314 Gerrit-PatchSet: 2 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Comment-Date: Thu, 13 Apr 2023 20:02:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: AMD binaryPI: Declare IOAPIC IDs
by Felix Held (Code Review) 13 Apr '23

13 Apr '23

Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74315 ) Change subject: AMD binaryPI: Declare IOAPIC IDs ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/74315 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I65888550e359e55402d99e8816ece2061cfcccbc Gerrit-Change-Number: 74315 Gerrit-PatchSet: 3 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Comment-Date: Thu, 13 Apr 2023 19:27:39 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: AMD binaryPI: Use madt_ioapic_from_hw()
by Felix Held (Code Review) 13 Apr '23

13 Apr '23

Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55570 ) Change subject: AMD binaryPI: Use madt_ioapic_from_hw() ...................................................................... Patch Set 14: (1 comment) Patchset: PS14: have you validated this on hardware? i have an apu2 board here, but haven't had the time to set it up to test patches on it which is also why i have some WIP patches for this soc that have been sitting for a while in gerrit -- To view, visit https://review.coreboot.org/c/coreboot/+/55570 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic8ba395bc220fdb691118719f7b32dd7400931f4 Gerrit-Change-Number: 55570 Gerrit-PatchSet: 14 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Thu, 13 Apr 2023 19:25:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: AMD binaryPI: Use madt_ioapic_from_hw()
by Felix Held (Code Review) 13 Apr '23

13 Apr '23

Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55570 ) Change subject: AMD binaryPI: Use madt_ioapic_from_hw() ...................................................................... Patch Set 14: Code-Review+1 (1 comment) Patchset: PS14: looks good to me, but despite having an apu2 here, i haven't gotten around to set it up for testing patches yet -- To view, visit https://review.coreboot.org/c/coreboot/+/55570 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic8ba395bc220fdb691118719f7b32dd7400931f4 Gerrit-Change-Number: 55570 Gerrit-PatchSet: 14 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Thu, 13 Apr 2023 19:20:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/google/rex: Enable audio BT offload
by Anil Kumar K (Code Review) 13 Apr '23

13 Apr '23

Attention is currently required from: Tarun Tuli, Subrata Banik, Ravishankar Sarawadi, Kapil Porwal, Paul Menzel, Sridhar Siricilla, Uday Bhat, Anil Kumar K, Jairaj Arava. Anil Kumar K has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72881 ) Change subject: mb/google/rex: Enable audio BT offload ...................................................................... Patch Set 16: (1 comment) Patchset: PS13: > Sure Hi Kapil.. are we good to merge this patch ? -- To view, visit https://review.coreboot.org/c/coreboot/+/72881 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I46e9702add37464122ffc78826ebf8a6c5b5b07c Gerrit-Change-Number: 72881 Gerrit-PatchSet: 16 Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Harsha B R <harsha.b.r(a)intel.com> Gerrit-Reviewer: Jairaj Arava <jairaj.arava(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Uday Bhat <uday.m.bhat(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.corp-partner.google.com> Gerrit-CC: Uday M Bhat Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Uday Bhat <uday.m.bhat(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.corp-partner.google.com> Gerrit-Attention: Jairaj Arava <jairaj.arava(a)intel.com> Gerrit-Comment-Date: Thu, 13 Apr 2023 19:15:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Anil Kumar K <anil.kumar.k(a)intel.com> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Kapil Porwal <kapilporwal(a)google.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Uday Bhat <uday.m.bhat(a)intel.com> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/intel/apollolake: Communicate with the PMC over Trusted Sideband
by Sean Rhodes (Code Review) 13 Apr '23

13 Apr '23

Attention is currently required from: Felix Singer, Arthur Heymans. Sean Rhodes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67076 ) Change subject: soc/intel/apollolake: Communicate with the PMC over Trusted Sideband ...................................................................... Patch Set 7: (1 comment) File src/soc/intel/apollolake/acpi/pmc_ipc.asl: https://review.coreboot.org/c/coreboot/+/67076/comment/1b767f26_8b4195e7 PS7, Line 44: Or (ShiftLeft (And (Arg0, 0xff), 0), Local0, Local0) /* 7:0 Command ID */ > Please use ASL 2. […] `Local0 = (ShiftLeft((Arg0 & 0xff), 0)) | Local0; /* 7:0 Command ID */` ? -- To view, visit https://review.coreboot.org/c/coreboot/+/67076 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ide33c2deca4c254a18e4878d22e8f1279b39428e Gerrit-Change-Number: 67076 Gerrit-PatchSet: 7 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Thu, 13 Apr 2023 19:10:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <felixsinger(a)posteo.net> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: sb,soc/amd,intel: Add and use ACPI_COMMON_MADT_LAPIC
by Kyösti Mälkki (Code Review) 13 Apr '23

13 Apr '23

Attention is currently required from: Lance Zhao, Jason Glenesk, Nico Huber, Raul Rangel, Matt DeVillier, Sridhar Siricilla, Arthur Heymans, Fred Reitberger, Felix Held. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74316 ) Change subject: sb,soc/amd,intel: Add and use ACPI_COMMON_MADT_LAPIC ...................................................................... Patch Set 3: (2 comments) File src/acpi/acpi.c: https://review.coreboot.org/c/coreboot/+/74316/comment/eeaee83f_e757615b PS2, Line 296: if (CONFIG(ACPI_COMMON_MADT_LAPIC)) > I'll add it in the commit message. Further work on asus/p2b could land in CB:74348 ? File src/soc/intel/common/block/acpi/acpi.c: https://review.coreboot.org/c/coreboot/+/74316/comment/b10623bd_2bbff1d8 PS2, Line 90: ACPI_COMMON_MADT_LAPIC > I would prefer to keep the original SOC_INTEL_COMMON_ACPI_CPU_HYBRID. If […] ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPU_HYBRID) += cpu_hybrid.c I think it would just fail to build. BTW: I try to merge the CPU sorting from cpu_hybrid and ultimately remove the Kconfig. -- To view, visit https://review.coreboot.org/c/coreboot/+/74316 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1f8d7ee9891553742d73a92b55a87c04fa95a132 Gerrit-Change-Number: 74316 Gerrit-PatchSet: 3 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 13 Apr 2023 19:05:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: sb,soc/amd,intel: Add and use ACPI_COMMON_MADT_LAPIC
by Kyösti Mälkki (Code Review) 13 Apr '23

13 Apr '23

Attention is currently required from: Lance Zhao, Jason Glenesk, Nico Huber, Raul Rangel, Matt DeVillier, Sridhar Siricilla, Arthur Heymans, Fred Reitberger, Felix Held. Hello Lance Zhao, build bot (Jenkins), Jason Glenesk, Nico Huber, Raul Rangel, Matt DeVillier, Tim Wawrzynczak, Sridhar Siricilla, Arthur Heymans, Fred Reitberger, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/74316 to look at the new patch set (#3). Change subject: sb,soc/amd,intel: Add and use ACPI_COMMON_MADT_LAPIC ...................................................................... sb,soc/amd,intel: Add and use ACPI_COMMON_MADT_LAPIC Boards with SOC_INTEL_COMMON_BLOCK_ACPI_CPU_HYBRID have special handling for the time being. Change of aopen/dxplplusu is coupled with sb/intel/i82801dx. Change of emulation/qemu-i440fx is coupled with intel/i82371eb. For asus/p2b, this adds MADT LAPIC entries, even though platform has ACPI_NO_MADT selected. Even previously ACPI_NO_MADT creates the MADT, including an entry for LAPIC address. Change-Id: I1f8d7ee9891553742d73a92b55a87c04fa95a132 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/acpi/Kconfig M src/acpi/acpi.c M src/mainboard/aopen/dxplplusu/acpi_tables.c M src/mainboard/emulation/qemu-i440fx/acpi_tables.c M src/northbridge/amd/pi/00730F01/acpi_tables.c M src/soc/amd/cezanne/acpi.c M src/soc/amd/common/block/acpi/Kconfig M src/soc/amd/glinda/acpi.c M src/soc/amd/mendocino/acpi.c M src/soc/amd/phoenix/acpi.c M src/soc/amd/picasso/acpi.c M src/soc/amd/stoneyridge/acpi.c M src/soc/intel/baytrail/Kconfig M src/soc/intel/baytrail/acpi.c M src/soc/intel/braswell/Kconfig M src/soc/intel/braswell/acpi.c M src/soc/intel/broadwell/pch/Kconfig M src/soc/intel/common/block/acpi/Kconfig M src/soc/intel/common/block/acpi/acpi.c M src/southbridge/amd/pi/hudson/Kconfig M src/southbridge/intel/bd82x6x/Kconfig M src/southbridge/intel/common/madt.c M src/southbridge/intel/i82371eb/Kconfig M src/southbridge/intel/i82801dx/Kconfig M src/southbridge/intel/i82801gx/Kconfig M src/southbridge/intel/i82801gx/lpc.c M src/southbridge/intel/i82801ix/Kconfig M src/southbridge/intel/i82801ix/madt.c M src/southbridge/intel/i82801jx/Kconfig M src/southbridge/intel/i82801jx/lpc.c M src/southbridge/intel/ibexpeak/Kconfig M src/southbridge/intel/ibexpeak/madt.c M src/southbridge/intel/lynxpoint/Kconfig 33 files changed, 41 insertions(+), 51 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/74316/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/74316 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1f8d7ee9891553742d73a92b55a87c04fa95a132 Gerrit-Change-Number: 74316 Gerrit-PatchSet: 3 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: AMD binaryPI: Use madt_ioapic_from_hw()
by Kyösti Mälkki (Code Review) 13 Apr '23

13 Apr '23

Kyösti Mälkki has submitted this change. ( https://review.coreboot.org/c/coreboot/+/55570 ) Change subject: AMD binaryPI: Use madt_ioapic_from_hw() ...................................................................... AMD binaryPI: Use madt_ioapic_from_hw() Read IOAPIC ID and number of interrupts from programmed registers. Change-Id: Ic8ba395bc220fdb691118719f7b32dd7400931f4 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55570 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/northbridge/amd/pi/00730F01/acpi_tables.c M src/northbridge/amd/pi/00730F01/northbridge.c M src/northbridge/amd/pi/00730F01/state_machine.c D src/southbridge/amd/pi/hudson/ioapic.h M src/southbridge/amd/pi/hudson/sm.c 5 files changed, 22 insertions(+), 23 deletions(-) Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved diff --git a/src/northbridge/amd/pi/00730F01/acpi_tables.c b/src/northbridge/amd/pi/00730F01/acpi_tables.c index bb510cd..ef240c1 100644 --- a/src/northbridge/amd/pi/00730F01/acpi_tables.c +++ b/src/northbridge/amd/pi/00730F01/acpi_tables.c @@ -3,7 +3,6 @@ #include <acpi/acpi.h> #include <arch/ioapic.h> #include <northbridge/amd/nb_common.h> -#include <southbridge/amd/pi/hudson/ioapic.h> unsigned long acpi_fill_madt(unsigned long current) { @@ -11,12 +10,10 @@ current = acpi_create_madt_lapics_with_nmis(current); /* Write SB800 IOAPIC, only one */ - current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, FCH_IOAPIC_ID, - IO_APIC_ADDR, 0); + current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, IO_APIC_ADDR); /* TODO: Remove the hardcode */ - current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, GNB_IOAPIC_ID, - IO_APIC2_ADDR, 24); + current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, IO_APIC2_ADDR); current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *) current, 0, 0, 2, 0); diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c index 644e2d5..5f3b4d9 100644 --- a/src/northbridge/amd/pi/00730F01/northbridge.c +++ b/src/northbridge/amd/pi/00730F01/northbridge.c @@ -23,7 +23,6 @@ #include <northbridge/amd/nb_common.h> #include <northbridge/amd/agesa/agesa_helper.h> #include <southbridge/amd/pi/hudson/pci_devs.h> -#include <southbridge/amd/pi/hudson/ioapic.h> #include <amdblocks/cpu.h> #define MAX_NODE_NUMS MAX_NODES @@ -222,7 +221,7 @@ static void northbridge_init(struct device *dev) { - setup_ioapic((u8 *)IO_APIC2_ADDR, GNB_IOAPIC_ID); + register_new_ioapic((u8 *)IO_APIC2_ADDR); } static unsigned long acpi_fill_hest(acpi_hest_t *hest) @@ -254,17 +253,16 @@ ivhd_ioapic->dte_setting = IVHD_DTE_LINT_1_PASS | IVHD_DTE_LINT_0_PASS | IVHD_DTE_SYS_MGT_NO_TRANS | IVHD_DTE_NMI_PASS | IVHD_DTE_EXT_INT_PASS | IVHD_DTE_INIT_PASS; - ivhd_ioapic->handle = FCH_IOAPIC_ID; + ivhd_ioapic->handle = get_ioapic_id(VIO_APIC_VADDR); ivhd_ioapic->source_dev_id = PCI_DEVFN(SMBUS_DEV, SMBUS_FUNC); ivhd_ioapic->variety = IVHD_SPECIAL_DEV_IOAPIC; current += sizeof(ivrs_ivhd_special_t); ivhd_ioapic = (ivrs_ivhd_special_t *)current; - ivhd_ioapic->type = IVHD_DEV_8_BYTE_EXT_SPECIAL_DEV; ivhd_ioapic->reserved = 0x0000; ivhd_ioapic->dte_setting = 0x00; - ivhd_ioapic->handle = GNB_IOAPIC_ID; + ivhd_ioapic->handle = get_ioapic_id((u8 *)IO_APIC2_ADDR); ivhd_ioapic->source_dev_id = PCI_DEVFN(0, 1); ivhd_ioapic->variety = IVHD_SPECIAL_DEV_IOAPIC; current += sizeof(ivrs_ivhd_special_t); diff --git a/src/northbridge/amd/pi/00730F01/state_machine.c b/src/northbridge/amd/pi/00730F01/state_machine.c index 0693a5d..9128c24 100644 --- a/src/northbridge/amd/pi/00730F01/state_machine.c +++ b/src/northbridge/amd/pi/00730F01/state_machine.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <amdblocks/biosram.h> +#include <amdblocks/ioapic.h> #include "Porting.h" #include "AGESA.h" @@ -9,7 +10,6 @@ #include <northbridge/amd/agesa/state_machine.h> #include <northbridge/amd/agesa/agesa_helper.h> #include <northbridge/amd/nb_common.h> -#include <southbridge/amd/pi/hudson/ioapic.h> void platform_BeforeInitReset(struct sysinfo *cb, AMD_RESET_PARAMS *Reset) { diff --git a/src/southbridge/amd/pi/hudson/ioapic.h b/src/southbridge/amd/pi/hudson/ioapic.h deleted file mode 100644 index 757e5c8..0000000 --- a/src/southbridge/amd/pi/hudson/ioapic.h +++ /dev/null @@ -1,10 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#ifndef AMD_BLOCK_IOAPIC_H -#define AMD_BLOCK_IOAPIC_H - -/* Since the old APIC bus isn't used any more, the IOAPIC IDs could be < CONFIG_MAX_CPUS */ -#define FCH_IOAPIC_ID (CONFIG_MAX_CPUS) -#define GNB_IOAPIC_ID (CONFIG_MAX_CPUS + 1) - -#endif /* AMD_BLOCK_IOAPIC_H */ diff --git a/src/southbridge/amd/pi/hudson/sm.c b/src/southbridge/amd/pi/hudson/sm.c index c40bf5e..2dc2ae3 100644 --- a/src/southbridge/amd/pi/hudson/sm.c +++ b/src/southbridge/amd/pi/hudson/sm.c @@ -5,7 +5,6 @@ #include <device/pci_ids.h> #include <device/smbus.h> #include <arch/ioapic.h> -#include <southbridge/amd/pi/hudson/ioapic.h> #include "hudson.h" #include "smbus.c" @@ -22,7 +21,7 @@ static void sm_init(struct device *dev) { - setup_ioapic(VIO_APIC_VADDR, FCH_IOAPIC_ID); + register_new_ioapic_gsi0(VIO_APIC_VADDR); } static int lsmbus_recv_byte(struct device *dev) -- To view, visit https://review.coreboot.org/c/coreboot/+/55570 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic8ba395bc220fdb691118719f7b32dd7400931f4 Gerrit-Change-Number: 55570 Gerrit-PatchSet: 14 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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coreboot-gerrit April 2023