coreboot-gerrit April 2023

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[S] Change in coreboot[master]: soc/amd/phoenix/devicetree: drop i2s_ac97 device
by Fred Reitberger (Code Review) 19 Apr '23

19 Apr '23

Attention is currently required from: Jason Glenesk, Felix Held. Fred Reitberger has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74564 ) Change subject: soc/amd/phoenix/devicetree: drop i2s_ac97 device ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/74564 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibd115953bdd60e1dfcc79797b0c2158e5d861636 Gerrit-Change-Number: 74564 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 19 Apr 2023 20:08:07 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/amd/phoenix/include/soc/pci_devs: update defines to match the PPR
by Fred Reitberger (Code Review) 19 Apr '23

19 Apr '23

Attention is currently required from: Jason Glenesk, Felix Held. Fred Reitberger has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74565 ) Change subject: soc/amd/phoenix/include/soc/pci_devs: update defines to match the PPR ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/74565 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie9429c03839bb0199a04cd6cafe9a955ebdacc91 Gerrit-Change-Number: 74565 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 19 Apr 2023 20:08:02 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/amd/phoenix/xhci: Correct counting of xhci_sci_sources
by Fred Reitberger (Code Review) 19 Apr '23

19 Apr '23

Fred Reitberger has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74528 ) Change subject: soc/amd/phoenix/xhci: Correct counting of xhci_sci_sources ...................................................................... soc/amd/phoenix/xhci: Correct counting of xhci_sci_sources Signed-off-by: Fred Reitberger <reitbergerfred(a)gmail.com> Change-Id: Iabba97e003d1a5140c98e3fc5a3496f66f8795c2 --- M src/soc/amd/phoenix/xhci.c 1 file changed, 11 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/74528/1 diff --git a/src/soc/amd/phoenix/xhci.c b/src/soc/amd/phoenix/xhci.c index ef1b60a..06481ed 100644 --- a/src/soc/amd/phoenix/xhci.c +++ b/src/soc/amd/phoenix/xhci.c @@ -49,7 +49,7 @@ static void configure_xhci_sci(void *unused) { - gpe_configure_sci(xhci_sci_sources, ARRAY_SIZE(xhci_sci_sources) - 1); + gpe_configure_sci(xhci_sci_sources, ARRAY_SIZE(xhci_sci_sources)); } BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_ENTRY, configure_xhci_sci, NULL); -- To view, visit https://review.coreboot.org/c/coreboot/+/74528 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iabba97e003d1a5140c98e3fc5a3496f66f8795c2 Gerrit-Change-Number: 74528 Gerrit-PatchSet: 1 Gerrit-Owner: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[master]: mb/google/myst: Enable PCIe devices in devicetree
by Jon Murphy (Code Review) 19 Apr '23

19 Apr '23

Attention is currently required from: Raul Rangel, Martin L Roth, Tim Van Patten, Felix Held. Hello build bot (Jenkins), Raul Rangel, Martin L Roth, Tim Van Patten, Karthik Ramasubramanian, Felix Held, Mark Hasemeyer, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/74112 to look at the new patch set (#39). Change subject: mb/google/myst: Enable PCIe devices in devicetree ...................................................................... mb/google/myst: Enable PCIe devices in devicetree Ensure that DXIO descriptors are updated using info from AMD and Myst board schematics. BUG=b:275960920,b:276744321 TEST=builds Change-Id: Icdad785bcb90de036095bcc4219c15f55f4277fe Signed-off-by: Jon Murphy <jpmurphy(a)google.com> --- M src/mainboard/google/myst/port_descriptors.c M src/mainboard/google/myst/variants/baseboard/devicetree.cb M src/mainboard/google/myst/variants/baseboard/include/baseboard/variants.h 3 files changed, 123 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/74112/39 -- To view, visit https://review.coreboot.org/c/coreboot/+/74112 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icdad785bcb90de036095bcc4219c15f55f4277fe Gerrit-Change-Number: 74112 Gerrit-PatchSet: 39 Gerrit-Owner: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Mark Hasemeyer <markhas(a)google.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Tim Van Patten <timvp(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: mb/google/myst: Enable PCIe devices in devicetree
by Jon Murphy (Code Review) 19 Apr '23

19 Apr '23

Attention is currently required from: Raul Rangel, Martin L Roth, Tim Van Patten, Felix Held. Jon Murphy has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74112 ) Change subject: mb/google/myst: Enable PCIe devices in devicetree ...................................................................... Patch Set 38: (2 comments) File src/mainboard/google/myst/variants/baseboard/devicetree.cb: https://review.coreboot.org/c/coreboot/+/74112/comment/4a3799cd_98190bd3 PS38, Line 77: register "gpp_clk_config[0]" = "GPP_CLK_REQ" > might be nice to add comments to which device each one is connected to Done File src/mainboard/google/myst/variants/baseboard/include/baseboard/variants.h: https://review.coreboot.org/c/coreboot/+/74112/comment/34b55f8b_8771e8ad PS38, Line 11: PCIE_GPP_2_0_DEVFN > pushed CB:74565 Done -- To view, visit https://review.coreboot.org/c/coreboot/+/74112 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icdad785bcb90de036095bcc4219c15f55f4277fe Gerrit-Change-Number: 74112 Gerrit-PatchSet: 38 Gerrit-Owner: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Mark Hasemeyer <markhas(a)google.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Tim Van Patten <timvp(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 19 Apr 2023 20:05:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: arch/risc/mcall.h: Make the stack pointer global
by build bot (Jenkins) (Code Review) 19 Apr '23

19 Apr '23

Attention is currently required from: Philipp Hug, ron minnich. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74570 ) Change subject: arch/risc/mcall.h: Make the stack pointer global ...................................................................... Patch Set 1: (2 comments) Commit Message: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-174558): https://review.coreboot.org/c/coreboot/+/74570/comment/4459930c_f89c96c9 PS1, Line 8: Possible unwrapped commit description (prefer a maximum 72 chars per line) File src/arch/riscv/include/mcall.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-174558): https://review.coreboot.org/c/coreboot/+/74570/comment/a18770cc_57d10a54 PS1, Line 61: (void*)((current_stack_pointer + RISCV_PGSIZE) & -RISCV_PGSIZE); }) "(foo*)" should be "(foo *)" -- To view, visit https://review.coreboot.org/c/coreboot/+/74570 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I24602372833aa9d413bf396853b223263fd873ed Gerrit-Change-Number: 74570 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Philipp Hug <philipp(a)hug.cx> Gerrit-Attention: ron minnich <rminnich(a)gmail.com> Gerrit-Comment-Date: Wed, 19 Apr 2023 20:05:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: arch/riscv/trap_handler.c: Use new names for CSR
by build bot (Jenkins) (Code Review) 19 Apr '23

19 Apr '23

Attention is currently required from: Philipp Hug, ron minnich. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74569 ) Change subject: arch/riscv/trap_handler.c: Use new names for CSR ...................................................................... Patch Set 1: (1 comment) Commit Message: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-174557): https://review.coreboot.org/c/coreboot/+/74569/comment/6a1843a2_5d4bf823 PS1, Line 8: Possible unwrapped commit description (prefer a maximum 72 chars per line) -- To view, visit https://review.coreboot.org/c/coreboot/+/74569 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5c8fa82b6131dec10f55e8ebcf36b34e30b57bad Gerrit-Change-Number: 74569 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Philipp Hug <philipp(a)hug.cx> Gerrit-Attention: ron minnich <rminnich(a)gmail.com> Gerrit-Comment-Date: Wed, 19 Apr 2023 20:05:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: arch/riscv: Add clang as supported architecture
by Arthur Heymans (Code Review) 19 Apr '23

19 Apr '23

Attention is currently required from: Philipp Hug, ron minnich. Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74571 ) Change subject: arch/riscv: Add clang as supported architecture ...................................................................... arch/riscv: Add clang as supported architecture All targets properly compile and boot to the same extend as with gcc. Change-Id: I11ddd9347c2638fb7c26cd4939aa96ff8ddd1e66 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/arch/riscv/Kconfig 1 file changed, 13 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/74571/1 diff --git a/src/arch/riscv/Kconfig b/src/arch/riscv/Kconfig index 8369afe..2578b12 100644 --- a/src/arch/riscv/Kconfig +++ b/src/arch/riscv/Kconfig @@ -8,6 +8,7 @@ config ARCH_RISCV bool + select ARCH_SUPPORTS_CLANG if ARCH_RISCV -- To view, visit https://review.coreboot.org/c/coreboot/+/74571 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I11ddd9347c2638fb7c26cd4939aa96ff8ddd1e66 Gerrit-Change-Number: 74571 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-Attention: Philipp Hug <philipp(a)hug.cx> Gerrit-Attention: ron minnich <rminnich(a)gmail.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: arch/risc/mcall.h: Make the stack pointer global
by Arthur Heymans (Code Review) 19 Apr '23

19 Apr '23

Attention is currently required from: Philipp Hug, ron minnich. Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74570 ) Change subject: arch/risc/mcall.h: Make the stack pointer global ...................................................................... arch/risc/mcall.h: Make the stack pointer global Clang complains about the stack pointer register variable being uninitialized. This can remediated by making the variable global. Change to be more unambiguous. Change-Id: I24602372833aa9d413bf396853b223263fd873ed Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/arch/riscv/include/mcall.h 1 file changed, 17 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/74570/1 diff --git a/src/arch/riscv/include/mcall.h b/src/arch/riscv/include/mcall.h index 803ee3e..bb60979 100644 --- a/src/arch/riscv/include/mcall.h +++ b/src/arch/riscv/include/mcall.h @@ -54,10 +54,11 @@ sizeof(hls_t) == HLS_SIZE, "HLS_SIZE must equal to sizeof(hls_t)"); +register unsigned long current_stack_pointer __asm__("sp"); + #define MACHINE_STACK_TOP() ({ \ /* coverity[uninit_use] : FALSE */ \ - register uintptr_t sp asm ("sp"); \ - (void*)((sp + RISCV_PGSIZE) & -RISCV_PGSIZE); }) + (void*)((current_stack_pointer + RISCV_PGSIZE) & -RISCV_PGSIZE); }) // hart-local storage, at top of stack #define HLS() ((hls_t*)(MACHINE_STACK_TOP() - HLS_SIZE)) -- To view, visit https://review.coreboot.org/c/coreboot/+/74570 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I24602372833aa9d413bf396853b223263fd873ed Gerrit-Change-Number: 74570 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-Attention: Philipp Hug <philipp(a)hug.cx> Gerrit-Attention: ron minnich <rminnich(a)gmail.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: arch/riscv/trap_handler.c: Use new names for CSR
by Arthur Heymans (Code Review) 19 Apr '23

19 Apr '23

Attention is currently required from: Philipp Hug, ron minnich. Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74569 ) Change subject: arch/riscv/trap_handler.c: Use new names for CSR ...................................................................... arch/riscv/trap_handler.c: Use new names for CSR sbadaddr and mbadaddr are deprecated names. This fixes compilation with clang. Change-Id: I5c8fa82b6131dec10f55e8ebcf36b34e30b57bad Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/arch/riscv/trap_handler.c M src/arch/riscv/trap_util.S 2 files changed, 14 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/74569/1 diff --git a/src/arch/riscv/trap_handler.c b/src/arch/riscv/trap_handler.c index f5953d3..8cb27de 100644 --- a/src/arch/riscv/trap_handler.c +++ b/src/arch/riscv/trap_handler.c @@ -150,7 +150,7 @@ /* This function used to redirect trap to s-mode. */ void redirect_trap(void) { - write_csr(sbadaddr, read_csr(mbadaddr)); + write_csr(stval, read_csr(mtval)); write_csr(sepc, read_csr(mepc)); write_csr(scause, read_csr(mcause)); write_csr(mepc, read_csr(stvec)); diff --git a/src/arch/riscv/trap_util.S b/src/arch/riscv/trap_util.S index 6b03eb5..c5691c5 100644 --- a/src/arch/riscv/trap_util.S +++ b/src/arch/riscv/trap_util.S @@ -80,7 +80,7 @@ csrrw t0,mscratch,x0 csrr s0,mstatus csrr t1,mepc - csrr t2,mbadaddr + csrr t2,mtval csrr t3,mcause STORE t0,2*REGBYTES(x2) STORE s0,32*REGBYTES(x2) -- To view, visit https://review.coreboot.org/c/coreboot/+/74569 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5c8fa82b6131dec10f55e8ebcf36b34e30b57bad Gerrit-Change-Number: 74569 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-Attention: Philipp Hug <philipp(a)hug.cx> Gerrit-Attention: ron minnich <rminnich(a)gmail.com> Gerrit-MessageType: newchange

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coreboot-gerrit April 2023