coreboot-gerrit March 2023

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[M] Change in coreboot[master]: mb/google/geralt: Set +-5.7V to TPS65132s EEPROM
by Yu-Ping Wu (Code Review) 06 Mar '23

06 Mar '23

Attention is currently required from: cong yang. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73443 ) Change subject: mb/google/geralt: Set +-5.7V to TPS65132s EEPROM ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/73443 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I29236818444cac84d42386a371cd8934048ff948 Gerrit-Change-Number: 73443 Gerrit-PatchSet: 5 Gerrit-Owner: cong yang <yangcong5(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: cong yang <yangcong5(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Mon, 06 Mar 2023 09:12:38 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/skyrim/var/markarth: Update RAM ID table
by John Su (Code Review) 06 Mar '23

06 Mar '23

John Su has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/73510 ) Change subject: mb/google/skyrim/var/markarth: Update RAM ID table ...................................................................... mb/google/skyrim/var/markarth: Update RAM ID table Add new ram_id:0011 for micron MT62F1G32D2DS-023 WT:B. Add new ram_id:0100 for micron MT62F2G32D4DS-023 WT:B. DRAM Part Name ID to assign K3KL8L80CM-MGCT 0 (0000) H58G56BK7BX068 0 (0000) MT62F1G32D2DS-026 WT:B 0 (0000) K3KL9L90CM-MGCT 1 (0001) H58G66BK7BX067 1 (0001) MT62F2G32D4DS-026 WT:B 1 (0001) MT62F512M32D2DR-031 WT:B 2 (0010) H58G56BK8BX068 3 (0011) MT62F1G32D2DS-023 WT:B 3 (0011) H58G66BK8BX067 4 (0100) MT62F2G32D4DS-023 WT:B 4 (0100) BUG=b:271188237 BRANCH=None TEST=FW_NAME=markarth emerge-skyrim coreboot Change-Id: I59a6a6dff249cd4fe982a4de824848f1bac0ecba Signed-off-by: John Su <john_su(a)compal.corp-partner.google.com> --- M src/mainboard/google/skyrim/variants/markarth/memory/Makefile.inc M src/mainboard/google/skyrim/variants/markarth/memory/dram_id.generated.txt M src/mainboard/google/skyrim/variants/markarth/memory/mem_parts_used.txt 3 files changed, 36 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/73510/1 diff --git a/src/mainboard/google/skyrim/variants/markarth/memory/Makefile.inc b/src/mainboard/google/skyrim/variants/markarth/memory/Makefile.inc index 9daef26..b5d6315 100644 --- a/src/mainboard/google/skyrim/variants/markarth/memory/Makefile.inc +++ b/src/mainboard/google/skyrim/variants/markarth/memory/Makefile.inc @@ -7,5 +7,5 @@ SPD_SOURCES += spd/lp5/set-1/spd-7.hex # ID = 0(0b0000) Parts = K3KL8L80CM-MGCT, H58G56BK7BX068, MT62F1G32D2DS-026 WT:B SPD_SOURCES += spd/lp5/set-1/spd-8.hex # ID = 1(0b0001) Parts = K3KL9L90CM-MGCT, H58G66BK7BX067, MT62F2G32D4DS-026 WT:B SPD_SOURCES += spd/lp5/set-1/spd-1.hex # ID = 2(0b0010) Parts = MT62F512M32D2DR-031 WT:B -SPD_SOURCES += spd/lp5/set-1/spd-11.hex # ID = 3(0b0011) Parts = H58G56BK8BX068 -SPD_SOURCES += spd/lp5/set-1/spd-10.hex # ID = 4(0b0100) Parts = H58G66BK8BX067 +SPD_SOURCES += spd/lp5/set-1/spd-11.hex # ID = 3(0b0011) Parts = H58G56BK8BX068, MT62F1G32D2DS-023 WT:B +SPD_SOURCES += spd/lp5/set-1/spd-10.hex # ID = 4(0b0100) Parts = H58G66BK8BX067, MT62F2G32D4DS-023 WT:B diff --git a/src/mainboard/google/skyrim/variants/markarth/memory/dram_id.generated.txt b/src/mainboard/google/skyrim/variants/markarth/memory/dram_id.generated.txt index 17fca15..6dc99bd 100644 --- a/src/mainboard/google/skyrim/variants/markarth/memory/dram_id.generated.txt +++ b/src/mainboard/google/skyrim/variants/markarth/memory/dram_id.generated.txt @@ -12,4 +12,6 @@ MT62F2G32D4DS-026 WT:B 1 (0001) MT62F512M32D2DR-031 WT:B 2 (0010) H58G56BK8BX068 3 (0011) +MT62F1G32D2DS-023 WT:B 3 (0011) H58G66BK8BX067 4 (0100) +MT62F2G32D4DS-023 WT:B 4 (0100) diff --git a/src/mainboard/google/skyrim/variants/markarth/memory/mem_parts_used.txt b/src/mainboard/google/skyrim/variants/markarth/memory/mem_parts_used.txt index eb7bd8f..ce58bb1 100644 --- a/src/mainboard/google/skyrim/variants/markarth/memory/mem_parts_used.txt +++ b/src/mainboard/google/skyrim/variants/markarth/memory/mem_parts_used.txt @@ -7,3 +7,5 @@ MT62F512M32D2DR-031 WT:B, H58G56BK8BX068, H58G66BK8BX067, +MT62F1G32D2DS-023 WT:B, +MT62F2G32D4DS-023 WT:B, -- To view, visit https://review.coreboot.org/c/coreboot/+/73510 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I59a6a6dff249cd4fe982a4de824848f1bac0ecba Gerrit-Change-Number: 73510 Gerrit-PatchSet: 1 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: spd/lp5: Add new memory part to LP5 list
by John Su (Code Review) 06 Mar '23

06 Mar '23

John Su has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/73489 ) Change subject: spd/lp5: Add new memory part to LP5 list ...................................................................... spd/lp5: Add new memory part to LP5 list Add MICRON memory part MT62F1G32D2DS-023 and MT62F2G32D4DS-023 to LP5 global list. Attributes are derived from data sheets. Also, regenerate the SPD files for SoC using the newly added parts. BUG=b:271188237 TEST=util/spd_tools/bin/spd_gen spd/lp5/memory_parts.json lp5 Change-Id: I6675a68b7a515bd6d21db3ea2da762b06dee017a Signed-off-by: John Su <john_su(a)compal.corp-partner.google.com> --- M spd/lp5/memory_parts.json M spd/lp5/set-0/parts_spd_manifest.generated.txt M spd/lp5/set-1/parts_spd_manifest.generated.txt 3 files changed, 42 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/73489/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/73489 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6675a68b7a515bd6d21db3ea2da762b06dee017a Gerrit-Change-Number: 73489 Gerrit-PatchSet: 2 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: spd/lp5: Add new memory part to LP5 list
by build bot (Jenkins) (Code Review) 06 Mar '23

06 Mar '23

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73489 ) Change subject: spd/lp5: Add new memory part to LP5 list ...................................................................... Patch Set 1: (2 comments) Commit Message: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-171478): https://review.coreboot.org/c/coreboot/+/73489/comment/f5f5e730_7ee0d8c6 PS1, Line 8: Possible unwrapped commit description (prefer a maximum 72 chars per line) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-171478): https://review.coreboot.org/c/coreboot/+/73489/comment/763b470d_a3d04532 PS1, Line 9: Add MICRON memory part MT62F1G32D2DS-023 and MT62F2G32D4DS-023 to LP5 global Possible unwrapped commit description (prefer a maximum 72 chars per line) -- To view, visit https://review.coreboot.org/c/coreboot/+/73489 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6675a68b7a515bd6d21db3ea2da762b06dee017a Gerrit-Change-Number: 73489 Gerrit-PatchSet: 1 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 06 Mar 2023 08:53:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: spd/lp5: Add new memory part to LP5 list
by John Su (Code Review) 06 Mar '23

06 Mar '23

John Su has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/73489 ) Change subject: spd/lp5: Add new memory part to LP5 list ...................................................................... spd/lp5: Add new memory part to LP5 list Add MICRON memory part MT62F1G32D2DS-023 and MT62F2G32D4DS-023 to LP5 global list. Attributes are derived from data sheets. Also, regenerate the SPD files for SoC using the newly added parts. BUG=b:271188237 TEST=util/spd_tools/bin/spd_gen spd/lp5/memory_parts.json lp5 Change-Id: I6675a68b7a515bd6d21db3ea2da762b06dee017a Signed-off-by: John Su <john_su(a)compal.corp-partner.google.com> --- M spd/lp5/memory_parts.json M spd/lp5/set-0/parts_spd_manifest.generated.txt M spd/lp5/set-1/parts_spd_manifest.generated.txt 3 files changed, 43 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/73489/1 diff --git a/spd/lp5/memory_parts.json b/spd/lp5/memory_parts.json index fc2e120..6fb1955 100644 --- a/spd/lp5/memory_parts.json +++ b/spd/lp5/memory_parts.json @@ -218,6 +218,28 @@ "speedMbps": 8533, "lp5x": true } + }, + { + "name": "MT62F1G32D2DS-023 WT:B", + "attribs": { + "densityPerDieGb": 16, + "diesPerPackage": 2, + "bitWidthPerChannel": 16, + "ranksPerChannel": 1, + "speedMbps": 8533, + "lp5x": true + } + }, + { + "name": "MT62F2G32D4DS-023 WT:B", + "attribs": { + "densityPerDieGb": 16, + "diesPerPackage": 4, + "bitWidthPerChannel": 16, + "ranksPerChannel": 2, + "speedMbps": 8533, + "lp5x": true + } } ] } diff --git a/spd/lp5/set-0/parts_spd_manifest.generated.txt b/spd/lp5/set-0/parts_spd_manifest.generated.txt index 9e8e241..38c9708 100644 --- a/spd/lp5/set-0/parts_spd_manifest.generated.txt +++ b/spd/lp5/set-0/parts_spd_manifest.generated.txt @@ -22,3 +22,5 @@ H9JCNNNFA5MLYR-N6E,spd-4.hex H58G66BK8BX067,spd-10.hex H58G56BK8BX068,spd-11.hex +MT62F1G32D2DS-023 WT:B,spd-11.hex +MT62F2G32D4DS-023 WT:B,spd-10.hex diff --git a/spd/lp5/set-1/parts_spd_manifest.generated.txt b/spd/lp5/set-1/parts_spd_manifest.generated.txt index 9e8e241..38c9708 100644 --- a/spd/lp5/set-1/parts_spd_manifest.generated.txt +++ b/spd/lp5/set-1/parts_spd_manifest.generated.txt @@ -22,3 +22,5 @@ H9JCNNNFA5MLYR-N6E,spd-4.hex H58G66BK8BX067,spd-10.hex H58G56BK8BX068,spd-11.hex +MT62F1G32D2DS-023 WT:B,spd-11.hex +MT62F2G32D4DS-023 WT:B,spd-10.hex -- To view, visit https://review.coreboot.org/c/coreboot/+/73489 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6675a68b7a515bd6d21db3ea2da762b06dee017a Gerrit-Change-Number: 73489 Gerrit-PatchSet: 1 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[master]: mb/google/geralt: Set +-5.7V to TPS65132s EEPROM
by Rex-BC Chen (Code Review) 06 Mar '23

06 Mar '23

Attention is currently required from: cong yang, Yu-Ping Wu. Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73443 ) Change subject: mb/google/geralt: Set +-5.7V to TPS65132s EEPROM ...................................................................... Patch Set 5: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/73443 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I29236818444cac84d42386a371cd8934048ff948 Gerrit-Change-Number: 73443 Gerrit-PatchSet: 5 Gerrit-Owner: cong yang <yangcong5(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: cong yang <yangcong5(a)huaqin.corp-partner.google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Mon, 06 Mar 2023 08:47:36 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/google/geralt: Set +-5.7V to TPS65132s EEPROM
by cong yang (Code Review) 06 Mar '23

06 Mar '23

Attention is currently required from: Yu-Ping Wu. cong yang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73443 ) Change subject: mb/google/geralt: Set +-5.7V to TPS65132s EEPROM ...................................................................... Patch Set 5: (3 comments) File src/mainboard/google/geralt/display.c: https://review.coreboot.org/c/coreboot/+/73443/comment/5b2cfab5_4bf315f9 PS4, Line 24: void tps65132s_program_eeprom(void) > Move this below `configure_display()` to be consistent with the order in display.h. Done https://review.coreboot.org/c/coreboot/+/73443/comment/53110a79_96ca77ae PS4, Line 40: !(value == 0x11 && value1 == 0x11) > value != 0x11 || value1 != 0x11 Done File src/mainboard/google/geralt/panel_geralt.c: https://review.coreboot.org/c/coreboot/+/73443/comment/339ad825_c99dcd1b PS4, Line 32: tps65132s_program_eeprom(); > One blank line below. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/73443 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I29236818444cac84d42386a371cd8934048ff948 Gerrit-Change-Number: 73443 Gerrit-PatchSet: 5 Gerrit-Owner: cong yang <yangcong5(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Mon, 06 Mar 2023 08:43:31 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/brya/var/marasov: Configure Acoustic noise mitigation
by Frank Chu (Code Review) 06 Mar '23

06 Mar '23

Frank Chu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/73491 ) Change subject: mb/google/brya/var/marasov: Configure Acoustic noise mitigation ...................................................................... mb/google/brya/var/marasov: Configure Acoustic noise mitigation - Enable Acoustic noise mitigation - Set slow slew rate VCCIA and VCCGT to 8 - Set FastPkgCRampDisable VCCIA and VCCGT to 1 BUG=b:271788117 TEST=build FW and system power on. Signed-off-by: Frank Chu <Frank_Chu(a)pegatron.corp-partner.google.com> Change-Id: I411c91e1e70285afbf31750a56a039d60bbe093f --- M src/mainboard/google/brya/variants/marasov/overridetree.cb 1 file changed, 23 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/73491/1 diff --git a/src/mainboard/google/brya/variants/marasov/overridetree.cb b/src/mainboard/google/brya/variants/marasov/overridetree.cb index 4cc8790..c7db17b 100644 --- a/src/mainboard/google/brya/variants/marasov/overridetree.cb +++ b/src/mainboard/google/brya/variants/marasov/overridetree.cb @@ -24,6 +24,12 @@ end chip soc/intel/alderlake + # Acoustic settings + register "acoustic_noise_mitigation" = "1" + register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_8" + register "slow_slew_rate[VR_DOMAIN_GT]" = "SLEW_FAST_8" + register "fast_pkg_c_ramp_disable[VR_DOMAIN_IA]" = "1" + register "fast_pkg_c_ramp_disable[VR_DOMAIN_GT]" = "1" # Intel Common SoC Config #+-------------------+---------------------------+ -- To view, visit https://review.coreboot.org/c/coreboot/+/73491 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I411c91e1e70285afbf31750a56a039d60bbe093f Gerrit-Change-Number: 73491 Gerrit-PatchSet: 1 Gerrit-Owner: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[master]: mb/google/nissa/var/craask: Extend sd_hold for touchpad/touchscreen
by Eric Lai (Code Review) 06 Mar '23

06 Mar '23

Attention is currently required from: David Wu, Tarun Tuli, Kangheui Won, Ren Kuo, Reka Norman, Tyler Wang, Nick Vaccaro. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73349 ) Change subject: mb/google/nissa/var/craask: Extend sd_hold for touchpad/touchscreen ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/73349 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iec2f72da80ffe8d4dd494caabbe1a97e52a81e78 Gerrit-Change-Number: 73349 Gerrit-PatchSet: 4 Gerrit-Owner: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: David Wu <david_wu(a)quantatw.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Ren Kuo <ren.kuo(a)quantatw.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: David Wu <david_wu(a)quantatw.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Kangheui Won <khwon(a)chromium.org> Gerrit-Attention: Ren Kuo <ren.kuo(a)quantatw.com> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Comment-Date: Mon, 06 Mar 2023 08:38:22 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/google/geralt: Set +-5.7V to TPS65132s EEPROM
by cong yang (Code Review) 06 Mar '23

06 Mar '23

Attention is currently required from: cong yang. Hello build bot (Jenkins), Rex-BC Chen, Yidi Lin, Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/73443 to look at the new patch set (#5). Change subject: mb/google/geralt: Set +-5.7V to TPS65132s EEPROM ...................................................................... mb/google/geralt: Set +-5.7V to TPS65132s EEPROM It is necessary to increase the AVDD/AVEE of TPS65132s PMIC to +-5.7V for powering on BOE_TV110C9M_LL0. So we set the default value to +-5.7V and program the value to the EEPROM when configuring the display at the first time. In this way, TPS65132s could load the correct setting from the EEPROM after booting into kernel. BUG=b:268292556 TEST=test firmware display pass and AVDD/AVEE is +-5.7V on Geralt. Change-Id: I29236818444cac84d42386a371cd8934048ff948 Signed-off-by: yangcong <yangcong5(a)huaqin.corp-partner.google.com> --- M src/mainboard/google/geralt/display.c M src/mainboard/google/geralt/display.h M src/mainboard/google/geralt/panel_geralt.c 3 files changed, 70 insertions(+), 15 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/73443/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/73443 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I29236818444cac84d42386a371cd8934048ff948 Gerrit-Change-Number: 73443 Gerrit-PatchSet: 5 Gerrit-Owner: cong yang <yangcong5(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: cong yang <yangcong5(a)huaqin.corp-partner.google.com> Gerrit-MessageType: newpatchset

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coreboot-gerrit March 2023