Simon Chou has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/71960 )
Change subject: soc/intel/xeon_sp/util.c: Add support for spr-sp
......................................................................
Abandoned
obsolete by [CB:72400] and [CB:72403]
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Change subject: src/sbom/Makefile.inc: Fix variable expansion
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
would you please rebase on https://review.coreboot.org/c/coreboot/+/70251
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Change subject: mb/google/nissa/var/craask: Add DPTF settings for 15W CPU
......................................................................
Patch Set 9: Code-Review+1
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Hello Jason Glenesk, build bot (Jenkins), Zheng Bao, Fred Reitberger, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/72507
to look at the new patch set (#3).
Change subject: amdfwtool: Add entry RIB whose subprog equals 1
......................................................................
amdfwtool: Add entry RIB whose subprog equals 1
For the PHX, it uses subprog 0.
For the PHX2, it uses subprog 1.
Change-Id: Ib013f264fc9940ad95e559fe19bba72c06a19625
Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com>
---
M util/amdfwtool/amdfwtool.c
M util/amdfwtool/data_parse.c
2 files changed, 18 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/72507/3
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Hello Jason Glenesk, build bot (Jenkins), Marshall Dawson, ritul guru, Zheng Bao, Fred Reitberger, Felix Held,
I'd like you to reexamine a change. Please visit
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Change subject: amdfwtool: Set the level of RIB file as level 2
......................................................................
amdfwtool: Set the level of RIB file as level 2
It is about AB recovery layout which only has level 2.
Change-Id: I836f11ca0bf5ad37e5093419465244a5c83318cb
Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com>
---
M util/amdfwtool/amdfwtool.c
1 file changed, 13 insertions(+), 1 deletion(-)
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Jack Rosenthal has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72716 )
Change subject: security/vboot: Don't build with flashrom support
......................................................................
Patch Set 4: Code-Review+2
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Hello Zheng Bao,
I'd like you to do a code review.
Please visit
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to review the following change.
Change subject: amdfwtool: Add phoenix and glinda in get_psp_fw_type
......................................................................
amdfwtool: Add phoenix and glinda in get_psp_fw_type
Change-Id: If80cc5396703cef41cc615008c9f0dac0b7bbb09
Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com>
---
M util/amdfwtool/amdfwtool.c
1 file changed, 12 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/72717/1
diff --git a/util/amdfwtool/amdfwtool.c b/util/amdfwtool/amdfwtool.c
index f95070d..0e5f8fa 100644
--- a/util/amdfwtool/amdfwtool.c
+++ b/util/amdfwtool/amdfwtool.c
@@ -762,6 +762,8 @@
{
switch (soc_id) {
case PLATFORM_MENDOCINO:
+ case PLATFORM_PHOENIX:
+ case PLATFORM_GLINDA:
/* Fallback to fw_type if fw_id is not populated, which serves the same
purpose on older SoCs. */
return header->fw_id ? header->fw_id : header->fw_type;
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build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72660 )
Change subject: src/sbom/Makefile.inc: Fix variable expansion
......................................................................
Patch Set 1:
(3 comments)
Commit Message:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169679):
https://review.coreboot.org/c/coreboot/+/72660/comment/a330345b_c512eaa7
PS1, Line 11: the second expands all variables inside recipes and then executes the
'neccessary' may be misspelled - perhaps 'necessary'?
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169679):
https://review.coreboot.org/c/coreboot/+/72660/comment/8a39ae3b_a5d56440
PS1, Line 15: in the prerequisite for the sbom rule. That causes the
'matchin' may be misspelled - perhaps 'matching'?
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169679):
https://review.coreboot.org/c/coreboot/+/72660/comment/ee07141b_576b8ae8
PS1, Line 19: cpu_microcode_bins. That causes the goswid tooling to fail since the
'neccessary' may be misspelled - perhaps 'necessary'?
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Maximilian Brune has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63639 )
Change subject: Add SBOM (Software Bill of Materials) Generation
......................................................................
Patch Set 49:
(1 comment)
Patchset:
PS49:
> I forget to note that running the build will create "go" directory at my "/home"
sry for the late reply, I was quite busy these past few days.
I did test the implementation, but it turns out this bug is dependent on the mainboard you build for.
I fixed, tested and explained it in: CB:72660
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Change subject: amdfwtool: Allow the location to be a relative address
......................................................................
Patch Set 16:
(1 comment)
File util/amdfwtool/amdfwtool.c:
https://review.coreboot.org/c/coreboot/+/69856/comment/2f638627_64de1d51
PS12, Line 2462: if (efs_location & 0xFF000000)
: efs_location = efs_location - rom_base_address;
: if (body_location & 0xFF000000)
: body_location = body_location - rom_base_address;
> I like how that turned out. […]
Done
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