coreboot-gerrit February 2023

coreboot-gerrit@coreboot.org

1 participants
5082 discussions

[S] Change in coreboot[master]: [WIP] soc/intel/meteorlake: Enable Trace Hub
by Sukumar Ghorai (Code Review) 02 Feb '23

02 Feb '23

Attention is currently required from: Tarun Tuli, Subrata Banik, Kapil Porwal, Pratikkumar V Prajapati. Sukumar Ghorai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72723 ) Change subject: [WIP] soc/intel/meteorlake: Enable Trace Hub ...................................................................... Patch Set 1: (1 comment) File src/soc/intel/meteorlake/romstage/fsp_params.c: https://review.coreboot.org/c/coreboot/+/72723/comment/da436f43_a207c652 PS1, Line 278: m_cfg->PlatformDebugOption = 2; fixed value not recommended, add #define don't enable trace in Rex platform, as default. -- To view, visit https://review.coreboot.org/c/coreboot/+/72723 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I335b15788fefb83f9f62560b160d1e84494b262a Gerrit-Change-Number: 72723 Gerrit-PatchSet: 1 Gerrit-Owner: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-CC: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Comment-Date: Thu, 02 Feb 2023 03:56:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: mb/google/brya/var/skolas: update PL1 minimum value
by build bot (Jenkins) (Code Review) 02 Feb '23

02 Feb '23

Attention is currently required from: Tarun Tuli. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72727 ) Change subject: mb/google/brya/var/skolas: update PL1 minimum value ...................................................................... Patch Set 1: (1 comment) Commit Message: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169690): https://review.coreboot.org/c/coreboot/+/72727/comment/08ab4d97_e222f6b1 PS1, Line 8: Possible unwrapped commit description (prefer a maximum 72 chars per line) -- To view, visit https://review.coreboot.org/c/coreboot/+/72727 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1027ca2bf2323ac959474ee6c38e47fa530113da Gerrit-Change-Number: 72727 Gerrit-PatchSet: 1 Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Comment-Date: Thu, 02 Feb 2023 03:51:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: mb/google/brya/var/skolas: update PL1 minimum value
by Sumeet R Pawnikar (Code Review) 02 Feb '23

02 Feb '23

Attention is currently required from: Tarun Tuli. Sumeet R Pawnikar has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/72727 ) Change subject: mb/google/brya/var/skolas: update PL1 minimum value ...................................................................... mb/google/brya/var/skolas: update PL1 minimum value Update Power Limit1 (PL1) minimum value to 15W based on the skolas design. BRANCH=None BUG=b:235311241 TEST=Built and tested on Skolas system Change-Id: I1027ca2bf2323ac959474ee6c38e47fa530113da Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar(a)intel.com> --- M src/mainboard/google/brya/variants/skolas/overridetree.cb 1 file changed, 17 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/72727/1 diff --git a/src/mainboard/google/brya/variants/skolas/overridetree.cb b/src/mainboard/google/brya/variants/skolas/overridetree.cb index a0b0cf1..4f152cd 100644 --- a/src/mainboard/google/brya/variants/skolas/overridetree.cb +++ b/src/mainboard/google/brya/variants/skolas/overridetree.cb @@ -190,7 +190,7 @@ register "controls.power_limits" = "{ .pl1 = { - .min_power = 3000, + .min_power = 15000, .max_power = 15000, .time_window_min = 28 * MSECS_PER_SEC, .time_window_max = 32 * MSECS_PER_SEC, -- To view, visit https://review.coreboot.org/c/coreboot/+/72727 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1027ca2bf2323ac959474ee6c38e47fa530113da Gerrit-Change-Number: 72727 Gerrit-PatchSet: 1 Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-MessageType: newchange

1 0

[M] Change in coreboot[master]: mb/google/brya/var/skolas: update dptf thermal settings
by Sumeet R Pawnikar (Code Review) 02 Feb '23

02 Feb '23

Attention is currently required from: Sumeet R Pawnikar, Nick Vaccaro. Hello build bot (Jenkins), Tarun Tuli, Nick Vaccaro, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/71692 to look at the new patch set (#3). Change subject: mb/google/brya/var/skolas: update dptf thermal settings ...................................................................... mb/google/brya/var/skolas: update dptf thermal settings Update dptf thermal settings as per suggested by thermal team. Control fan based on TSR sensors, not based on CPU sensor temperature which changes too fast. This change is based on the discussion on bug:235311241 comment#7. BRANCH=None BUG=b:235311241, b:261749371 TEST=Built and tested on Skolas system Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar(a)intel.com> Change-Id: Ibeddce61b0d73d82a85f486e7cb5cbfa9568953c --- M src/mainboard/google/brya/variants/skolas/overridetree.cb 1 file changed, 58 insertions(+), 14 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/71692/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/71692 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibeddce61b0d73d82a85f486e7cb5cbfa9568953c Gerrit-Change-Number: 71692 Gerrit-PatchSet: 3 Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: AlanKY Lee <alanky_lee(a)compal.corp-partner.google.com> Gerrit-CC: Vidya Gopalakrishnan <vidya.gopalakrishnan(a)intel.com> Gerrit-Attention: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-MessageType: newpatchset

1 0

[S] Change in coreboot[master]: soc/intel/common/block/fast_spi: Add SPI BIOS decode lock
by TimLiu-SMCI (Code Review) 02 Feb '23

02 Feb '23

Attention is currently required from: Simon Chou, Jonathan Zhang, Ryback Hung, Angel Pons, Tim Chu. TimLiu-SMCI has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71953 ) Change subject: soc/intel/common/block/fast_spi: Add SPI BIOS decode lock ...................................................................... Patch Set 5: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/71953 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3366817b42a5878f16575698ebc546fa7852e285 Gerrit-Change-Number: 71953 Gerrit-PatchSet: 5 Gerrit-Owner: Simon Chou <simonchou(a)supermicro.com.tw> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Jian-Ming Wang <jianmingW(a)supermicro.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Ryback Hung <ryback.hung(a)quantatw.com> Gerrit-Reviewer: Shuming Chu (Shuming) <s1218944(a)gmail.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: TimLiu-SMCI Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Simon Chou <simonchou(a)supermicro.com.tw> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Ryback Hung <ryback.hung(a)quantatw.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Thu, 02 Feb 2023 03:33:10 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: soc/intel/common/block/fast_spi: Add SPI BIOS decode lock
by Jian-Ming Wang (Code Review) 02 Feb '23

02 Feb '23

Attention is currently required from: Simon Chou, Jonathan Zhang, TimLiu-SMCI, Ryback Hung, Angel Pons, Tim Chu. Jian-Ming Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71953 ) Change subject: soc/intel/common/block/fast_spi: Add SPI BIOS decode lock ...................................................................... Patch Set 5: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/71953 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3366817b42a5878f16575698ebc546fa7852e285 Gerrit-Change-Number: 71953 Gerrit-PatchSet: 5 Gerrit-Owner: Simon Chou <simonchou(a)supermicro.com.tw> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Jian-Ming Wang <jianmingW(a)supermicro.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Ryback Hung <ryback.hung(a)quantatw.com> Gerrit-Reviewer: Shuming Chu (Shuming) <s1218944(a)gmail.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: TimLiu-SMCI Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Simon Chou <simonchou(a)supermicro.com.tw> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: TimLiu-SMCI Gerrit-Attention: Ryback Hung <ryback.hung(a)quantatw.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Thu, 02 Feb 2023 03:17:45 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[XL] Change in coreboot[master]: soc/intel/xeon_sp/spr: add ACPI code
by Jian-Ming Wang (Code Review) 02 Feb '23

02 Feb '23

Attention is currently required from: Patrick Rudolph, Jonathan Zhang, Simon Chou, TimLiu-SMCI, Johnny Lin, Christian Walter, Shuming Chu (Shuming), Arthur Heymans. Jian-Ming Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71967 ) Change subject: soc/intel/xeon_sp/spr: add ACPI code ...................................................................... Patch Set 13: (1 comment) File src/soc/intel/xeon_sp/spr/romstage.c: https://review.coreboot.org/c/coreboot/+/71967/comment/ebb38984_56e9c961 PS2, Line 177: 0x3F8; > Have it depend on the port coreboot uses. SerialIoUartDebugIoBase in FSPM_UPD is used to control the debug message from Intel FSP. The correct configuration is depending on mainboard design. However, the romstage in soc layer only take care of the critical common configuration. The mainboard specific part should be override or further configured by romstage (mainboard_romstage_entry) in mainboard layer. Please reference the example to mainboard_config_upd in src/mainboard/ocp/deltalake.romstage.c. -- To view, visit https://review.coreboot.org/c/coreboot/+/71967 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic2a9be0222e122ae087b9cc8e1859d257e3411d6 Gerrit-Change-Number: 71967 Gerrit-PatchSet: 13 Gerrit-Owner: Simon Chou <simonchou(a)supermicro.com.tw> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Jian-Ming Wang <jianmingW(a)supermicro.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: TimLiu-SMCI Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Shuming Chu (Shuming) <s1218944(a)gmail.com> Gerrit-CC: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Simon Chou <simonchou(a)supermicro.com.tw> Gerrit-Attention: TimLiu-SMCI Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuming Chu (Shuming) <s1218944(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Thu, 02 Feb 2023 03:02:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

1 0

[M] Change in coreboot[master]: amdfwtool: Add a function to make the calling stack less deep
by Bao Zheng (Code Review) 02 Feb '23

02 Feb '23

Attention is currently required from: Jason Glenesk, Martin L Roth, Marshall Dawson, Zheng Bao, Felix Held. Bao Zheng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51881 ) Change subject: amdfwtool: Add a function to make the calling stack less deep ...................................................................... Patch Set 4: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/51881/comment/1030693f_23dae04b PS1, Line 7: amdfwtool: Add a function to make the calling stack less deep > do you mean less levels of indentations in the code? Done. Actually I have both purposes. -- To view, visit https://review.coreboot.org/c/coreboot/+/51881 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib8cae386eace4f423bde9c252992625e1ff3c690 Gerrit-Change-Number: 51881 Gerrit-PatchSet: 4 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 02 Feb 2023 02:46:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: mb/google/rex: update touchscreen report EN pin setting
by Ivy Jian (Code Review) 02 Feb '23

02 Feb '23

Ivy Jian has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/72725 ) Change subject: mb/google/rex: update touchscreen report EN pin setting ...................................................................... mb/google/rex: update touchscreen report EN pin setting Removed workaround since the latest schematics fixed. Power Sequencing of ELAN6918 (in ACPI) after this patch `POWER enabled -> RESET deasserted -> Report EN enabled` BUG=b:247029304 TEST=Verified ELAN touch panel is working as expected after booting Google/rex device to ChromeOS. Signed-off-by: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Change-Id: I19629262776f7e0cccbdebb2285890d177a8a8a6 --- M src/mainboard/google/rex/variants/rex0/gpio.c 1 file changed, 20 insertions(+), 14 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/72725/1 diff --git a/src/mainboard/google/rex/variants/rex0/gpio.c b/src/mainboard/google/rex/variants/rex0/gpio.c index 01fa95d..23732f2 100644 --- a/src/mainboard/google/rex/variants/rex0/gpio.c +++ b/src/mainboard/google/rex/variants/rex0/gpio.c @@ -107,20 +107,7 @@ /* GPP_C05 : [] ==> WWAN_PERST_L_STRAP */ PAD_CFG_GPO(GPP_C05, 1, PLTRST), /* GPP_C06 : [] ==> SOC_TCHSCR_RPT_EN */ - /* - * FIXME: Remove this code after resolving b/247029304. - * - * ELAN6918 Power Sequencing seems not perfectly matching - * with the previous platforms and setting GPP_C06 to high prior - * to the power sequencing is actually makes it work. - * - * Ideally Power Sequencing should be as below for ELAN6918 (in ACPI) - * `POWER enabled -> RESET deasserted -> Report EN enabled` - * - * But below sequence is only working currently: - * `Report EN enabled (ramstage) -> POWER enabled (ACPI) -> RESET deasserted (ACPI)` - */ - PAD_CFG_GPO(GPP_C06, 1, DEEP), + PAD_CFG_GPO(GPP_C06, 0, DEEP), /* GPP_C07 : [] ==> SOC_TCHSCR_INT */ PAD_CFG_GPI_APIC(GPP_C07, NONE, PLTRST, LEVEL, NONE), /* GPP_C08 : [] ==> SOCHOT_ODL */ -- To view, visit https://review.coreboot.org/c/coreboot/+/72725 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I19629262776f7e0cccbdebb2285890d177a8a8a6 Gerrit-Change-Number: 72725 Gerrit-PatchSet: 1 Gerrit-Owner: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-MessageType: newchange

1 0

[M] Change in coreboot[master]: xcompile: Add Zen compiler flag for AMD family 17h
by Bao Zheng (Code Review) 02 Feb '23

02 Feb '23

Bao Zheng has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/65224 ) Change subject: xcompile: Add Zen compiler flag for AMD family 17h ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/65224 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idc308c65d5239fe66062ec651e975c6c0fc9fb9b Gerrit-Change-Number: 65224 Gerrit-PatchSet: 15 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: abandon

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit February 2023