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Hello Hung-Te Lin, build bot (Jenkins), Rex-BC Chen, Yidi Lin, Yu-Ping Wu,
I'd like you to reexamine a change. Please visit
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Change subject: mb/google/geralt: Init MT6359P only once in ramstage
......................................................................
mb/google/geralt: Init MT6359P only once in ramstage
The regulator APIs are called by firmware display and SD card.
mt6359p_init() will call pmic_efuse_setting(), so pmic_efuse_setting()
will be called twice. 11 msecs will be increased on booting time.
Therefore, move mt6359p_init() to mainboard.c to initialize mt6359p only
once in ramstage.
BUG=b:244208960
TEST=test firmware display pass for BOE_TV110C9M_LL0 on Geralt.
Change-Id: I29498d186ba5665ae20e84985174fc10f8d4accd
Signed-off-by: Liju-Clr Chen <liju-clr.chen(a)mediatek.com>
---
M src/mainboard/google/geralt/mainboard.c
M src/soc/mediatek/mt8188/msdc.c
2 files changed, 22 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/72839/3
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John Su has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/72870 )
Change subject: mb/google/skyrim/var/markarth: Override SPI flash bus speed
......................................................................
mb/google/skyrim/var/markarth: Override SPI flash bus speed
Add configuration to bump up the SPI flash bus speed from 66 MHz to 100
MHz for starting next phase.
BUG=b:267539952
TEST=None
Signed-off-by: John Su <john_su(a)compal.corp-partner.google.com>
Change-Id: Id46201351780bb5bc05422ff36dad6972285690e
---
M src/mainboard/google/skyrim/Kconfig
1 file changed, 17 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/72870/1
diff --git a/src/mainboard/google/skyrim/Kconfig b/src/mainboard/google/skyrim/Kconfig
index 55b6ece..1d80bbf 100644
--- a/src/mainboard/google/skyrim/Kconfig
+++ b/src/mainboard/google/skyrim/Kconfig
@@ -158,6 +158,7 @@
hex
default 0x5 if BOARD_GOOGLE_SKYRIM
default 0x1 if BOARD_GOOGLE_FROSTFLOW
+ default 0x1 if BOARD_GOOGLE_MARKARTH
default 0xffffffff
help
Minimum board version starting which the Override EFS SPI Speed
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Attention is currently required from: Jason Glenesk, Matt DeVillier, Fred Reitberger, Felix Held.
Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72860 )
Change subject: soc/amd/picasso/soc_util: use cpuid_match
......................................................................
Patch Set 4:
(1 comment)
File src/soc/amd/picasso/soc_util.c:
https://review.coreboot.org/c/coreboot/+/72860/comment/b41c6a27_66f25215
PS4, Line 97: 0xffffff00
> that would be good, but i didn't find a good name for this mask. […]
CPUID_ALL_STEPPINGS_AND_BASE_MODELS_MASK? Don't know how to shorter this.
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Attention is currently required from: Tarun Tuli, Kapil Porwal, Nick Vaccaro.
Ron Lee has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71925 )
Change subject: mb/google/brya: Add usb_lpm_incapable for Type-C port with PS8815
......................................................................
Patch Set 8:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/71925/comment/871e5a96_986a12ec
PS6, Line 17: osiris MLB: C1
> After looking at "experiment spreadsheet", it seems like the port C0 is not impacted even though it […]
Check osiris schematic and ectool log, usb_lpm_incapable config should be applied for both MLB C0/C1 ports. Thanks for Kapil reminding.
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Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71294 )
Change subject: src/soc/intel: Fix using BS_OS_RESUME callbacks BS_ON_EXIT
......................................................................
Patch Set 2: Code-Review+1
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/71294/comment/21f4701a_7b87f7df
PS2, Line 13: Also add a static assertion to detect this in the future.
CB:72708 seems to have taken care of that already
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Hello build bot (Jenkins), Tarun Tuli, Kapil Porwal, Nick Vaccaro,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#8).
Change subject: mb/google/brya: Add usb_lpm_incapable for Type-C port with PS8815
......................................................................
mb/google/brya: Add usb_lpm_incapable for Type-C port with PS8815
Intel ADL-P USB Type-C ports are not compatible with Parade PS8815
retimer on USB U1/U2 transition. The usb_lpm_incapable config is
used to disable USB U1/U2 transition for these Type-C ports.
This patch add usb_lpm_incapable config for the following variants
with PS8815 retimer:
- kinox MLB: C0
- volmar DB: C1
- osiris MLB: C0/C1
- mithrax DB: C1
- felwinter DB: C1
- taeko DB: C1
- gimble DB: C1
- gimble4es DB: C1
- taniks DB: C1
- marasov DB: C2
- gaelin MLB: C0/C1
- skolas DB: C1
- skolas4es DB: C1
- brya0 DB: C1
BUG=b:253402457
TEST=Plug in device and check LPM sysfs nodes are disabled
localhost ~ # cat /sys/bus/usb/devices/2-X/power/usb3_hardware_lpm_u1
disabled
localhost ~ # cat /sys/bus/usb/devices/2-X/power/usb3_hardware_lpm_u2
disabled
Change-Id: Ie9246ff7908887404f49ec10ee781c8cba410557
Signed-off-by: Ron Lee <ron.lee(a)intel.com>
---
M src/mainboard/google/brya/variants/brya0/overridetree.cb
M src/mainboard/google/brya/variants/felwinter/overridetree.cb
M src/mainboard/google/brya/variants/gaelin/overridetree.cb
M src/mainboard/google/brya/variants/gimble/overridetree.cb
M src/mainboard/google/brya/variants/gimble4es/overridetree.cb
M src/mainboard/google/brya/variants/kinox/overridetree.cb
M src/mainboard/google/brya/variants/marasov/overridetree.cb
M src/mainboard/google/brya/variants/mithrax/overridetree.cb
M src/mainboard/google/brya/variants/osiris/overridetree.cb
M src/mainboard/google/brya/variants/skolas/overridetree.cb
M src/mainboard/google/brya/variants/skolas4es/overridetree.cb
M src/mainboard/google/brya/variants/taeko/overridetree.cb
M src/mainboard/google/brya/variants/taniks/overridetree.cb
M src/mainboard/google/brya/variants/volmar/overridetree.cb
14 files changed, 54 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/71925/8
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